Abstract
This paper describes how a reconfigurable computing engine can be used to accelerate DTP functions. We show how PostScript rendering can be accelerated using a commercially available FPGA co-processor card. Our method relies on dynamically swapping in pre-computed circuits to accelerate the compute intensive portions of PostScript rendering.
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© 1998 Springer-Verlag Berlin Heidelberg
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MacVicar, D., Singh, S. (1998). Accelerating DTP with reconfigurable computing engines. In: Hartenstein, R.W., Keevallik, A. (eds) Field-Programmable Logic and Applications From FPGAs to Computing Paradigm. FPL 1998. Lecture Notes in Computer Science, vol 1482. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055267
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DOI: https://doi.org/10.1007/BFb0055267
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