Abstract
The new memory technologies having the characteristic of non-volatile such as Phase-change RAM (PRAM), Ferroelectric RAM (FRAM), Magnetic RAM (MRAM) and Resistive RAM (RRAM) that can be replaced the DRAM as main memory have been emerged. Among these memories, PRAM is especially the most promising alternative for DRAM as main memory because of its high density and low power consumption. On the other hand, the slower latency by comparison with DRAM and endurance are caused to reduce performance. In order to exploit these degradations of performance, we propose a hybrid memory system consisting of PRAM and DRAM as a converter. The DRAM converter is comprised of an aggressive streaming buffer to assure better use of spatial locality and an adaptive filtering buffer for better use of temporal locality. Our architecture is designed to enhance the long latency as well as low endurance of PRAM. The proposed structure is implemented by a trace-driven simulator and experimented by using SPEC 2006 traces. Our experimental results indicate that it is able to achieve reducing access count by about 65 %, compared with only PRAM-based main memory system. According to this result, our proposed memory architecture can be used to substitute for the current DRAM main memory system.
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© 2013 Springer Science+Business Media Dordrecht
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Jang, SI., Kim, CG., Kim, SD. (2013). An Efficient DRAM Converter for Non-Volatile Based Main Memory. In: Kim, K., Chung, KY. (eds) IT Convergence and Security 2012. Lecture Notes in Electrical Engineering, vol 215. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-5860-5_49
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DOI: https://doi.org/10.1007/978-94-007-5860-5_49
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