A Communication Infrastructure for Emulating Large-Scale Neural Networks Models

This paper presents the SEPELYNS architecture that permits to interconnect multiple spiking neurons focused on hardware implementations. SEPELYNS can connect millions of neurons with thousands of synapses per neuron in a layered fabric that provides some capabilities such as connectivity, expansion, flexibility, bio-plausibility and reusing of resources that allows simulation of very large networks. We present the three layers of this architecture (neuronal, network adapters and networks on chip layers) and explain its performance parameters such as throughput, latency and hardware resources. Some application examples of large neural networks on SEPELYNS are studied; these will show that use of on-chip parallel networks could permit the hardware simulation of populations of spiking neurons.

Authors and Affiliations

1. Department of Electronic Engineering, Technical University of Catalunya, Barcelona, Spain

   Andres Gaona Barrera & Manuel Moreno Arostegui

2. Laboratory for Automation, Microelectronics and Computational Intelligence, District University, Bogota, Colombia

   Andres Gaona Barrera

Editors and Affiliations

1. Neuro Heuristic Research Group, University of Lausanne, 1015, Lausanne, Switzerland

   Alessandro E. P. Villa

2. Department of Informatics, Nicolaus Copernicus University, 87-100, Toruń, Poland

   Włodzisław Duch

3. Center for Complex Systems Studies, Kalamazoo College, 49006, Kalamazoo, MI, USA

   Péter Érdi

4. Dipartimento di Informatica e Scienze dell’Informazione, Università di Genova, 16146, Genoa, Italy

   Francesco Masulli

5. Institut für Neuroinformatik, Universität Ulm, 89069, Ulm, Germany

   Günther Palm

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© 2012 Springer-Verlag Berlin Heidelberg

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