Abstract
An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16-bit address space into an 8-bit one. The target technology is FPGA, where the search space of the algorithm is made of the combinational functions computed by cells, of the interconnection topologies and of the interconnections among cells. This circuit is readily applicable to the design of set-associative cache memories, with on-line tuning of the function during cache operation.
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References
Levi, D., Guccione, S. A.: GeneticFPGA: Evolving stable circuits on mainstream FPGA devices. In Proc. First NASA/DoD Workshop on Evolvable Hardware, Pasadena, CA, USA, July 1999. pp. 12–17
Patterson, D. A., Hennessy, J. L.: Computer Organization & Design: the Hardware/Software Interface. Morgan Kaufmann Publishers, San Francisco, CA, USA, 1994
Damiani, E., Liberali, V., Tettamanzi, A. G. B.: Evolutionary design of hashing function circuits using an FPGA. In Sipper, M., Mange, D., Pérez-Uribe, A. (Eds.), Proc. Second International Conference on Evolvable Systems (ICES’ 98), Lausanne, Switzerland, Sept. 1998. pp. 36–46
Damiani, E., Tettamanzi, A. G. B., Liberali, V.: On-line evolution of FPGA-based circuits: A case study on hash functions. In Proc. First NASA/DoD Workshop on Evolvable Hardware, Pasadena, CA, USA, July 1999. pp. 26–33
Damiani, E., Liberali, V., Tettamanzi, A. G. B.: FPGA-based hash circuit synthesis with evolutionary algorithms. IEICE Transactions on Fundamentals, Sept. 1999
Burkardt, W.: Locality aspects and cache memory utility in microcomputers. Euromicro Journal, vol. 26, 1989
Wilke, C., Altmeyer, S., Martinetz, T.: Large-scale evolution and extinction in a hierarchically structured environment. In Adami, C., Belew, R. K., Kitano, H., Taylor, C. (Eds.), Proceedings of the 6th International Conference on Artificial Life (ALIFE-98), MIT Press, Cambridge, MA, USA, June 27–29 1998. pp. 266–274
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Damiani, E., Liberali, V., Tettamanzi, A.G.B. (2000). Dynamic Optimisation of Non-linear Feed-Forward Circuits. In: Miller, J., Thompson, A., Thomson, P., Fogarty, T.C. (eds) Evolvable Systems: From Biology to Hardware. ICES 2000. Lecture Notes in Computer Science, vol 1801. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46406-9_5
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DOI: https://doi.org/10.1007/3-540-46406-9_5
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