Efficient parallel evaluation of straight-line code and arithmetic circuits

Abstract: We show that a 3-valued current mode CMOS 2-input BSC adder can be converted into a CMOS binary 4-2 counter or into a 1-digit Avizienis-like adder using a redundant number representation. Using a current mode algorithm to derive binary CMOS ...

Garbled Circuit (GC) techniques usually work with Boolean circuits. Despite intense interest, efficient arithmetic generalizations of GC were only known from strong assumptions, such as LWE.

We construct symmetric-key-based arithmetic garbled ...$$${\mathbb{}}_{}$$\mathrm{}$${}_{\mathrm{}}$${\mathbb{}}_{}$${\mathbb{}}_{}$$$${}^{\mathrm{}}$${}^{\mathrm{}}$

Abstract: This paper presents a new multiple-valued current-mode MOS integrated circuit for high-speed arithmetic systems with a low supply voltage. The use of a multiple-valued source-coupled logic circuit with dual-rail complementary inputs makes a ...