nd generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um2 SRAM cells, optimized for low power, high performance and high density SoC products.">nd generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um2 SRAM cells, optimized for low power, high performance and high density SoC products., dblp, computer science, bibliography, knowledge graph, author, editor, publication, conference, journal, book, thesis, database, collection, open data, bibtex">
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"A 14 nm SoC platform technology featuring 2nd generation ..."

Chia-Hong Jan et al. (2015)

Details and statistics

DOI: 10.1109/VLSIC.2015.7231380

access: closed

type: Conference or Workshop Paper

metadata version: 2021-12-02

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