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2020 – today
- 2024
[j16]Mehwish Raza
, Sharjeel Javed, Majida Kazmi, Arshad Aziz, Muhammad Fahim Ul Haque, Saad Ahmed Qazi:
Approximate Computing: Hardware and Software Techniques, Tools and Their Applications. J. Circuits Syst. Comput. 33(4): 2430001:1-2430001:61 (2024)- 2023
- [j15]Majida Kazmi, Maria Tabasum Shoaib, Arshad Aziz, Hashim Raza Khan, Saad Ahmed Qazi:
An Efficient IIoT-Based Smart Sensor Node for Predictive Maintenance of Induction Motors. Comput. Syst. Sci. Eng. 47(1): 255-272 (2023) - [i1]Muhammad Danyal Khan, Raheem Ali, Arshad Aziz:
Code-Switched Urdu ASR for Noisy Telephonic Environment using Data Centric Approach with Hybrid HMM and CNN-TDNN. CoRR abs/2307.12759 (2023) - 2020
- [j14]Majida Kazmi, Arshad Aziz, Hashim Raza Khan, Saad Ahmed Qazi, Lampros K. Stergioulas:
Resource-Efficient Image Buffer Architecture for Neighborhood Processors. IEEE Access 8: 181964-181975 (2020) - [j13]Dur-e-Shahwar Kundi, Ayesha Khalid, Arshad Aziz, Chenghua Wang, Máire O'Neill, Weiqiang Liu:
Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3. IEEE Trans. Circuits Syst. 67-I(12): 4869-4882 (2020)
2010 – 2019
- 2019
- [j12]Majida Kazmi, Arshad Aziz, Dur-e-Shahwar Kundi:
A Pareto-Optimal Multi-filter Architecture on FPGA for Image Processing Applications. Circuits Syst. Signal Process. 38(10): 4762-4786 (2019) - [j11]Majida Kazmi, Arshad Aziz, Pervez Akhtar:
An efficient and compact row buffer architecture on FPGA for real-time neighbourhood image processing. J. Real Time Image Process. 16(5): 1845-1858 (2019) - 2018
- [j10]Razia Zia, Pervez Akhtar, Arshad Aziz, Dur-e-Shahwar Kundi:
Multi-resolution transforms-based hybrid feature extraction technique for differentiating glioma grades. Int. J. Wavelets Multiresolution Inf. Process. 16(6): 1850048:1-1850048:16 (2018) - [j9]Razia Zia, Pervez Akhtar, Arshad Aziz:
A new rectangular window based image cropping method for generalization of brain neoplasm classification systems. Int. J. Imaging Syst. Technol. 28(3): 153-162 (2018) - 2017
- [c11]Razia Zia, Pervez Akhtar, Arshad Aziz, Maroof Ali Shah, Dur-e-Shahwar Kundi:
Non Sub-sampled Contourlet Transform Based Feature Extraction Technique for Differentiating Glioma Grades Using MRI Images. Australasian Conference on Artificial Intelligence 2017: 289-300 - 2016
- [j8]Dur-e-Shahwar Kundi, Arshad Aziz:
A low-power SHA-3 designs using embedded digital signal processing slice on FPGA. Comput. Electr. Eng. 55: 138-152 (2016) - [j7]Dur-e-Shahwar Kundi, Arshad Aziz, Nassar Ikram:
A high performance ST-Box based unified AES encryption/decryption architecture on FPGA. Microprocess. Microsystems 41: 37-46 (2016) - 2015
- [j6]Dur-e-Shahwar Kundi, Arshad Aziz, Majida Kazmi:
An efficient single unit T-box/T-1-box implementation for 128-bit AES on FPGA. Secur. Commun. Networks 8(9): 1725-1731 (2015) - 2013
- [c10]Munaza Yousuf, Riaz Mahmud, Arshad Aziz:
Simulation design of an efficient MTI processing module for embedded platform. MECO 2013: 75-78 - [c9]Aisha Malik, Arshad Aziz, Dur-e-Shahwar Kundi, Moiz Akhter:
Software implementation of Standard Hash Algorithm (SHA-3) Keccak on Intel core-i5 and Cavium Networks Octeon Plus embedded platform. MECO 2013: 79-83 - 2012
- [j5]Kashif Latif, Arshad Aziz, Athar Mahboob:
Look-Up Table Based Implementations of SHA-3 Finalists: JH, Keccak and Skein. KSII Trans. Internet Inf. Syst. 6(9): 2388-2404 (2012) - [c8]Kashif Latif, M. Muzaffar Rao, Athar Mahboob, Arshad Aziz:
Novel Arithmetic Architecture for High Performance Implementation of SHA-3 Finalist Keccak on FPGA Platforms. ARC 2012: 372-378 - [c7]Majida Kazmi, Arshad Aziz, Pervez Akhtar, Aliza Maftun, Wasay Bin Afaq:
Medical image denoising based on adaptive thresholding in contourlet domain. BMEI 2012: 313-318 - [c6]Muhammad Arsalan, Arshad Aziz:
Comparative Analysis of High Speed and Low Area Architectures of Blake SHA-3 Candidate on FPGA. FIT 2012: 248-253 - 2011
- [j4]Kashif Latif, Arshad Aziz, Athar Mahboob:
Optimal utilization of available reconfigurable hardware resources. Comput. Electr. Eng. 37(6): 1043-1057 (2011) - [c5]Kashif Latif, Athar Mahboob, Arshad Aziz:
High Throughput Hardware Implementation of Secure Hash Algorithm (SHA-3) Finalist: BLAKE. FIT 2011: 189-194 - [c4]Kashif Latif, Muhammad Tariq, Arshad Aziz, Athar Mahboob:
Efficient Hardware Implementation of Secure Hash Algorithm (SHA-3) Finalist - Skein. ICFCE 2011: 933-940 - 2010
- [j3]Dur-e-Shahwar Kundi, Arshad Aziz, Nassar Ikram:
Resource efficient implementation of T-Boxes in AES on Virtex-5 FPGA. Inf. Process. Lett. 110(10): 373-377 (2010)
2000 – 2009
- 2009
- [c3]Kashif Latif, Arshad Aziz, Athar Mahboob:
Efficient resource utilization of FPGAs. FIT 2009: 26:1-26:5 - 2007
- [j2]Arshad Aziz, Nassar Ikram:
An FPGA-based AES-CCM Crypto Core For IEEE 802.11i Architecture. Int. J. Netw. Secur. 5(2): 224-232 (2007) - [j1]Arshad Aziz, Nassar Ikram:
Memory Efficient Implementation of AES S-Boxes on FPGA. J. Circuits Syst. Comput. 16(4): 603-611 (2007) - [c2]Abdul Samiah, Arshad Aziz, Nassar Ikram:
An Efficient Software Implementation of AES-CCM for IEEE 802.11i Wireless St. COMPSAC (2) 2007: 689-694 - [c1]Arshad Aziz, Nassar Ikram:
A Look-Up-Table Implementation of AES. HPCNCS 2007: 187-191
Coauthor Index
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