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ORCIDSarala Arunagiri
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- affiliation: University of Texas at El Paso, USA
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2010 – 2019
- 2017
[c7]Yipkei Kwok, Patricia J. Teller, Sarala Arunagiri:
2TL: A Scheduling Algorithm for Meeting the Latency Requirements of Bursty I/O Streams at User-Specified Percentiles. ICCAC 2017: 46-57- 2014
- [j1]Sarala Arunagiri, Yipkei Kwok, Patricia J. Teller, Ricardo Portillo, Seetharami R. Seelam:
FAIRIO: A Throughput-oriented Algorithm for Differentiated I/O Performance. Int. J. Parallel Program. 42(1): 165-197 (2014) - 2013
- [c6]Sarala Arunagiri, Jaime Jaloma, Ricardo Portillo, Arturo Argueta:
Power and execution performance tradeoffs of GPGPU computing: a case study employing stereo matching. Image Processing: Machine Vision Applications 2013: 86610W - [c5]Sarala Arunagiri, Jaime Jaloma:
Parallel GPGPU stereo matching with an energy-efficient cost function based on normalized cross correlation. Image Processing: Algorithms and Systems 2013: 86550X - 2012
- [c4]Joshua McCartney, Patricia J. Teller, Sarala Arunagiri:
Evaluation of Core Performance when the Node is Power Capped Using Intel® Data Center Manager. ICPP Workshops 2012: 246-253 - 2011
- [c3]Sarala Arunagiri, Yipkei Kwok, Patricia J. Teller, Ricardo Portillo, Seetharami R. Seelam:
FAIRIO: An Algorithm for Differentiated I/O Performance. SBAC-PAD 2011: 88-95
2000 – 2009
- 2009
- [c2]Sarala Arunagiri, John T. Daly, Patricia J. Teller:
Modeling and Analysis of Checkpoint I/O Operations. ASMTA 2009: 386-400 - 2007
- [c1]Ron A. Oldfield, Sarala Arunagiri, Patricia J. Teller, Seetharami R. Seelam, Maria Ruiz Varela, Rolf Riesen, Philip C. Roth:
Modeling the Impact of Checkpoints on Next-Generation Systems. MSST 2007: 30-46
Coauthor Index
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