| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* |
| 3 | * Copyright 2015-2017 Google, Inc |
| 4 | */ |
| 5 | |
| 6 | #ifndef __LINUX_USB_PD_H |
| 7 | #define __LINUX_USB_PD_H |
| 8 | |
| 9 | #include <linux/bitfield.h> |
| 10 | #include <linux/kernel.h> |
| 11 | #include <linux/types.h> |
| 12 | #include <linux/usb/typec.h> |
| 13 | |
| 14 | /* USB PD Messages */ |
| 15 | enum pd_ctrl_msg_type { |
| 16 | /* 0 Reserved */ |
| 17 | PD_CTRL_GOOD_CRC = 1, |
| 18 | PD_CTRL_GOTO_MIN = 2, |
| 19 | PD_CTRL_ACCEPT = 3, |
| 20 | PD_CTRL_REJECT = 4, |
| 21 | PD_CTRL_PING = 5, |
| 22 | PD_CTRL_PS_RDY = 6, |
| 23 | PD_CTRL_GET_SOURCE_CAP = 7, |
| 24 | PD_CTRL_GET_SINK_CAP = 8, |
| 25 | PD_CTRL_DR_SWAP = 9, |
| 26 | PD_CTRL_PR_SWAP = 10, |
| 27 | PD_CTRL_VCONN_SWAP = 11, |
| 28 | PD_CTRL_WAIT = 12, |
| 29 | PD_CTRL_SOFT_RESET = 13, |
| 30 | /* 14-15 Reserved */ |
| 31 | PD_CTRL_NOT_SUPP = 16, |
| 32 | PD_CTRL_GET_SOURCE_CAP_EXT = 17, |
| 33 | PD_CTRL_GET_STATUS = 18, |
| 34 | PD_CTRL_FR_SWAP = 19, |
| 35 | PD_CTRL_GET_PPS_STATUS = 20, |
| 36 | PD_CTRL_GET_COUNTRY_CODES = 21, |
| 37 | /* 22-23 Reserved */ |
| 38 | PD_CTRL_GET_REVISION = 24, |
| 39 | /* 25-31 Reserved */ |
| 40 | }; |
| 41 | |
| 42 | enum pd_data_msg_type { |
| 43 | /* 0 Reserved */ |
| 44 | PD_DATA_SOURCE_CAP = 1, |
| 45 | PD_DATA_REQUEST = 2, |
| 46 | PD_DATA_BIST = 3, |
| 47 | PD_DATA_SINK_CAP = 4, |
| 48 | PD_DATA_BATT_STATUS = 5, |
| 49 | PD_DATA_ALERT = 6, |
| 50 | PD_DATA_GET_COUNTRY_INFO = 7, |
| 51 | PD_DATA_ENTER_USB = 8, |
| 52 | /* 9-11 Reserved */ |
| 53 | PD_DATA_REVISION = 12, |
| 54 | /* 13-14 Reserved */ |
| 55 | PD_DATA_VENDOR_DEF = 15, |
| 56 | /* 16-31 Reserved */ |
| 57 | }; |
| 58 | |
| 59 | enum pd_ext_msg_type { |
| 60 | /* 0 Reserved */ |
| 61 | PD_EXT_SOURCE_CAP_EXT = 1, |
| 62 | PD_EXT_STATUS = 2, |
| 63 | PD_EXT_GET_BATT_CAP = 3, |
| 64 | PD_EXT_GET_BATT_STATUS = 4, |
| 65 | PD_EXT_BATT_CAP = 5, |
| 66 | PD_EXT_GET_MANUFACTURER_INFO = 6, |
| 67 | PD_EXT_MANUFACTURER_INFO = 7, |
| 68 | PD_EXT_SECURITY_REQUEST = 8, |
| 69 | PD_EXT_SECURITY_RESPONSE = 9, |
| 70 | PD_EXT_FW_UPDATE_REQUEST = 10, |
| 71 | PD_EXT_FW_UPDATE_RESPONSE = 11, |
| 72 | PD_EXT_PPS_STATUS = 12, |
| 73 | PD_EXT_COUNTRY_INFO = 13, |
| 74 | PD_EXT_COUNTRY_CODES = 14, |
| 75 | /* 15-31 Reserved */ |
| 76 | }; |
| 77 | |
| 78 | #define PD_REV10 0x0 |
| 79 | #define PD_REV20 0x1 |
| 80 | #define PD_REV30 0x2 |
| 81 | #define PD_MAX_REV PD_REV30 |
| 82 | |
| 83 | #define BIT(15) |
| 84 | #define 12 |
| 85 | #define 0x7 |
| 86 | #define 9 |
| 87 | #define 0x7 |
| 88 | #define BIT(8) |
| 89 | #define 6 |
| 90 | #define 0x3 |
| 91 | #define BIT(5) |
| 92 | #define 0 |
| 93 | #define 0x1f |
| 94 | |
| 95 | #define (type, pwr, data, rev, id, cnt, ext_hdr) \ |
| 96 | ((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) | \ |
| 97 | ((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) | \ |
| 98 | ((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) | \ |
| 99 | (rev << PD_HEADER_REV_SHIFT) | \ |
| 100 | (((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) | \ |
| 101 | (((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT) | \ |
| 102 | ((ext_hdr) ? PD_HEADER_EXT_HDR : 0)) |
| 103 | |
| 104 | #define (type, pwr, data, rev, id, cnt) \ |
| 105 | cpu_to_le16(PD_HEADER((type), (pwr), (data), (rev), (id), (cnt), (0))) |
| 106 | |
| 107 | static inline unsigned int (u16 ) |
| 108 | { |
| 109 | return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK; |
| 110 | } |
| 111 | |
| 112 | static inline unsigned int (__le16 ) |
| 113 | { |
| 114 | return pd_header_cnt(le16_to_cpu(header)); |
| 115 | } |
| 116 | |
| 117 | static inline unsigned int (u16 ) |
| 118 | { |
| 119 | return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK; |
| 120 | } |
| 121 | |
| 122 | static inline unsigned int (__le16 ) |
| 123 | { |
| 124 | return pd_header_type(le16_to_cpu(header)); |
| 125 | } |
| 126 | |
| 127 | static inline unsigned int (u16 ) |
| 128 | { |
| 129 | return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK; |
| 130 | } |
| 131 | |
| 132 | static inline unsigned int (__le16 ) |
| 133 | { |
| 134 | return pd_header_msgid(le16_to_cpu(header)); |
| 135 | } |
| 136 | |
| 137 | static inline unsigned int (u16 ) |
| 138 | { |
| 139 | return (header >> PD_HEADER_REV_SHIFT) & PD_HEADER_REV_MASK; |
| 140 | } |
| 141 | |
| 142 | static inline unsigned int (__le16 ) |
| 143 | { |
| 144 | return pd_header_rev(le16_to_cpu(header)); |
| 145 | } |
| 146 | |
| 147 | #define PD_EXT_HDR_CHUNKED BIT(15) |
| 148 | #define PD_EXT_HDR_CHUNK_NUM_SHIFT 11 |
| 149 | #define PD_EXT_HDR_CHUNK_NUM_MASK 0xf |
| 150 | #define PD_EXT_HDR_REQ_CHUNK BIT(10) |
| 151 | #define PD_EXT_HDR_DATA_SIZE_SHIFT 0 |
| 152 | #define PD_EXT_HDR_DATA_SIZE_MASK 0x1ff |
| 153 | |
| 154 | #define PD_EXT_HDR(data_size, req_chunk, chunk_num, chunked) \ |
| 155 | ((((data_size) & PD_EXT_HDR_DATA_SIZE_MASK) << PD_EXT_HDR_DATA_SIZE_SHIFT) | \ |
| 156 | ((req_chunk) ? PD_EXT_HDR_REQ_CHUNK : 0) | \ |
| 157 | (((chunk_num) & PD_EXT_HDR_CHUNK_NUM_MASK) << PD_EXT_HDR_CHUNK_NUM_SHIFT) | \ |
| 158 | ((chunked) ? PD_EXT_HDR_CHUNKED : 0)) |
| 159 | |
| 160 | #define PD_EXT_HDR_LE(data_size, req_chunk, chunk_num, chunked) \ |
| 161 | cpu_to_le16(PD_EXT_HDR((data_size), (req_chunk), (chunk_num), (chunked))) |
| 162 | |
| 163 | static inline unsigned int (u16 ) |
| 164 | { |
| 165 | return (ext_header >> PD_EXT_HDR_CHUNK_NUM_SHIFT) & |
| 166 | PD_EXT_HDR_CHUNK_NUM_MASK; |
| 167 | } |
| 168 | |
| 169 | static inline unsigned int (u16 ) |
| 170 | { |
| 171 | return (ext_header >> PD_EXT_HDR_DATA_SIZE_SHIFT) & |
| 172 | PD_EXT_HDR_DATA_SIZE_MASK; |
| 173 | } |
| 174 | |
| 175 | static inline unsigned int (__le16 ) |
| 176 | { |
| 177 | return pd_ext_header_data_size(le16_to_cpu(ext_header)); |
| 178 | } |
| 179 | |
| 180 | #define PD_MAX_PAYLOAD 7 |
| 181 | #define PD_EXT_MAX_CHUNK_DATA 26 |
| 182 | |
| 183 | /** |
| 184 | * struct pd_chunked_ext_message_data - PD chunked extended message data as |
| 185 | * seen on wire |
| 186 | * @header: PD extended message header |
| 187 | * @data: PD extended message data |
| 188 | */ |
| 189 | struct pd_chunked_ext_message_data { |
| 190 | __le16 ; |
| 191 | u8 data[PD_EXT_MAX_CHUNK_DATA]; |
| 192 | } __packed; |
| 193 | |
| 194 | /** |
| 195 | * struct pd_message - PD message as seen on wire |
| 196 | * @header: PD message header |
| 197 | * @payload: PD message payload |
| 198 | * @ext_msg: PD message chunked extended message data |
| 199 | */ |
| 200 | struct pd_message { |
| 201 | __le16 ; |
| 202 | union { |
| 203 | __le32 payload[PD_MAX_PAYLOAD]; |
| 204 | struct pd_chunked_ext_message_data ext_msg; |
| 205 | }; |
| 206 | } __packed; |
| 207 | |
| 208 | /* PDO: Power Data Object */ |
| 209 | #define PDO_MAX_OBJECTS 7 |
| 210 | |
| 211 | enum pd_pdo_type { |
| 212 | PDO_TYPE_FIXED = 0, |
| 213 | PDO_TYPE_BATT = 1, |
| 214 | PDO_TYPE_VAR = 2, |
| 215 | PDO_TYPE_APDO = 3, |
| 216 | }; |
| 217 | |
| 218 | #define PDO_TYPE_SHIFT 30 |
| 219 | #define PDO_TYPE_MASK 0x3 |
| 220 | |
| 221 | #define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT) |
| 222 | |
| 223 | #define PDO_VOLT_MASK 0x3ff |
| 224 | #define PDO_CURR_MASK 0x3ff |
| 225 | #define PDO_PWR_MASK 0x3ff |
| 226 | |
| 227 | #define PDO_FIXED_DUAL_ROLE BIT(29) /* Power role swap supported */ |
| 228 | #define PDO_FIXED_SUSPEND BIT(28) /* USB Suspend supported (Source) */ |
| 229 | #define PDO_FIXED_HIGHER_CAP BIT(28) /* Requires more than vSafe5V (Sink) */ |
| 230 | #define PDO_FIXED_EXTPOWER BIT(27) /* Externally powered */ |
| 231 | #define PDO_FIXED_USB_COMM BIT(26) /* USB communications capable */ |
| 232 | #define PDO_FIXED_DATA_SWAP BIT(25) /* Data role swap supported */ |
| 233 | #define PDO_FIXED_UNCHUNK_EXT BIT(24) /* Unchunked Extended Message supported (Source) */ |
| 234 | #define PDO_FIXED_FRS_CURR_MASK (BIT(24) | BIT(23)) /* FR_Swap Current (Sink) */ |
| 235 | #define PDO_FIXED_FRS_CURR_SHIFT 23 |
| 236 | #define PDO_FIXED_PEAK_CURR_SHIFT 20 |
| 237 | #define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */ |
| 238 | #define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */ |
| 239 | |
| 240 | #define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT) |
| 241 | #define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT) |
| 242 | |
| 243 | #define PDO_FIXED(mv, ma, flags) \ |
| 244 | (PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \ |
| 245 | PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma)) |
| 246 | |
| 247 | #define VSAFE5V 5000 /* mv units */ |
| 248 | |
| 249 | #define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */ |
| 250 | #define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */ |
| 251 | #define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */ |
| 252 | |
| 253 | #define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT) |
| 254 | #define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT) |
| 255 | #define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT) |
| 256 | |
| 257 | #define PDO_BATT(min_mv, max_mv, max_mw) \ |
| 258 | (PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \ |
| 259 | PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw)) |
| 260 | |
| 261 | #define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */ |
| 262 | #define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */ |
| 263 | #define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */ |
| 264 | |
| 265 | #define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT) |
| 266 | #define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT) |
| 267 | #define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT) |
| 268 | |
| 269 | #define PDO_VAR(min_mv, max_mv, max_ma) \ |
| 270 | (PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \ |
| 271 | PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma)) |
| 272 | |
| 273 | enum pd_apdo_type { |
| 274 | APDO_TYPE_PPS = 0, |
| 275 | APDO_TYPE_EPR_AVS = 1, |
| 276 | APDO_TYPE_SPR_AVS = 2, |
| 277 | }; |
| 278 | |
| 279 | #define PDO_APDO_TYPE_SHIFT 28 |
| 280 | #define PDO_APDO_TYPE_MASK 0x3 |
| 281 | |
| 282 | #define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT) |
| 283 | |
| 284 | #define PDO_PPS_APDO_MAX_VOLT_SHIFT 17 /* 100mV units */ |
| 285 | #define PDO_PPS_APDO_MIN_VOLT_SHIFT 8 /* 100mV units */ |
| 286 | #define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */ |
| 287 | |
| 288 | #define PDO_PPS_APDO_VOLT_MASK 0xff |
| 289 | #define PDO_PPS_APDO_CURR_MASK 0x7f |
| 290 | |
| 291 | #define PDO_PPS_APDO_MIN_VOLT(mv) \ |
| 292 | ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT) |
| 293 | #define PDO_PPS_APDO_MAX_VOLT(mv) \ |
| 294 | ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT) |
| 295 | #define PDO_PPS_APDO_MAX_CURR(ma) \ |
| 296 | ((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT) |
| 297 | |
| 298 | #define PDO_PPS_APDO(min_mv, max_mv, max_ma) \ |
| 299 | (PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \ |
| 300 | PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \ |
| 301 | PDO_PPS_APDO_MAX_CURR(max_ma)) |
| 302 | |
| 303 | /* |
| 304 | * Applicable only to EPR AVS APDO source cap as per |
| 305 | * Table 6.15 EPR Adjustable Voltage Supply APDO – Source |
| 306 | */ |
| 307 | #define PDO_EPR_AVS_APDO_PEAK_CURRENT GENMASK(27, 26) |
| 308 | |
| 309 | /* |
| 310 | * Applicable to both EPR AVS APDO source and sink cap as per |
| 311 | * Table 6.15 EPR Adjustable Voltage Supply APDO – Source |
| 312 | * Table 6.22 EPR Adjustable Voltage Supply APDO – Sink |
| 313 | */ |
| 314 | #define PDO_EPR_AVS_APDO_MAX_VOLT GENMASK(25, 17) /* 100mV unit */ |
| 315 | #define PDO_EPR_AVS_APDO_MIN_VOLT GENMASK(15, 8) /* 100mV unit */ |
| 316 | #define PDO_EPR_AVS_APDO_PDP GENMASK(7, 0) /* 1W unit */ |
| 317 | |
| 318 | /* |
| 319 | * Applicable only SPR AVS APDO source cap as per |
| 320 | * Table 6.14 SPR Adjustable Voltage Supply APDO – Source |
| 321 | */ |
| 322 | #define PDO_SPR_AVS_APDO_PEAK_CURRENT GENMASK(27, 26) |
| 323 | |
| 324 | /* |
| 325 | * Applicable to both SPR AVS APDO source and sink cap as per |
| 326 | * Table 6.14 SPR Adjustable Voltage Supply APDO – Source |
| 327 | * Table 6.21 SPR Adjustable Voltage Supply APDO – Sink |
| 328 | */ |
| 329 | #define PDO_SPR_AVS_APDO_9V_TO_15V_MAX_CURR GENMASK(19, 10) /* 10mA unit */ |
| 330 | #define PDO_SPR_AVS_APDO_15V_TO_20V_MAX_CURR GENMASK(9, 0) /* 10mA unit */ |
| 331 | |
| 332 | static inline enum pd_pdo_type pdo_type(u32 pdo) |
| 333 | { |
| 334 | return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK; |
| 335 | } |
| 336 | |
| 337 | static inline unsigned int pdo_fixed_voltage(u32 pdo) |
| 338 | { |
| 339 | return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; |
| 340 | } |
| 341 | |
| 342 | static inline unsigned int pdo_min_voltage(u32 pdo) |
| 343 | { |
| 344 | return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; |
| 345 | } |
| 346 | |
| 347 | static inline unsigned int pdo_max_voltage(u32 pdo) |
| 348 | { |
| 349 | return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; |
| 350 | } |
| 351 | |
| 352 | static inline unsigned int pdo_max_current(u32 pdo) |
| 353 | { |
| 354 | return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10; |
| 355 | } |
| 356 | |
| 357 | static inline unsigned int pdo_max_power(u32 pdo) |
| 358 | { |
| 359 | return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250; |
| 360 | } |
| 361 | |
| 362 | static inline enum pd_apdo_type pdo_apdo_type(u32 pdo) |
| 363 | { |
| 364 | return (pdo >> PDO_APDO_TYPE_SHIFT) & PDO_APDO_TYPE_MASK; |
| 365 | } |
| 366 | |
| 367 | static inline unsigned int pdo_pps_apdo_min_voltage(u32 pdo) |
| 368 | { |
| 369 | return ((pdo >> PDO_PPS_APDO_MIN_VOLT_SHIFT) & |
| 370 | PDO_PPS_APDO_VOLT_MASK) * 100; |
| 371 | } |
| 372 | |
| 373 | static inline unsigned int pdo_pps_apdo_max_voltage(u32 pdo) |
| 374 | { |
| 375 | return ((pdo >> PDO_PPS_APDO_MAX_VOLT_SHIFT) & |
| 376 | PDO_PPS_APDO_VOLT_MASK) * 100; |
| 377 | } |
| 378 | |
| 379 | static inline unsigned int pdo_pps_apdo_max_current(u32 pdo) |
| 380 | { |
| 381 | return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) & |
| 382 | PDO_PPS_APDO_CURR_MASK) * 50; |
| 383 | } |
| 384 | |
| 385 | static inline unsigned int pdo_epr_avs_apdo_src_peak_current(u32 pdo) |
| 386 | { |
| 387 | return FIELD_GET(PDO_EPR_AVS_APDO_PEAK_CURRENT, pdo); |
| 388 | } |
| 389 | |
| 390 | static inline unsigned int pdo_epr_avs_apdo_min_voltage_mv(u32 pdo) |
| 391 | { |
| 392 | return FIELD_GET(PDO_EPR_AVS_APDO_MIN_VOLT, pdo) * 100; |
| 393 | } |
| 394 | |
| 395 | static inline unsigned int pdo_epr_avs_apdo_max_voltage_mv(u32 pdo) |
| 396 | { |
| 397 | return FIELD_GET(PDO_EPR_AVS_APDO_MIN_VOLT, pdo) * 100; |
| 398 | } |
| 399 | |
| 400 | static inline unsigned int pdo_epr_avs_apdo_pdp_w(u32 pdo) |
| 401 | { |
| 402 | return FIELD_GET(PDO_EPR_AVS_APDO_PDP, pdo); |
| 403 | } |
| 404 | |
| 405 | static inline unsigned int pdo_spr_avs_apdo_src_peak_current(u32 pdo) |
| 406 | { |
| 407 | return FIELD_GET(PDO_SPR_AVS_APDO_PEAK_CURRENT, pdo); |
| 408 | } |
| 409 | |
| 410 | static inline unsigned int pdo_spr_avs_apdo_9v_to_15v_max_current_ma(u32 pdo) |
| 411 | { |
| 412 | return FIELD_GET(PDO_SPR_AVS_APDO_9V_TO_15V_MAX_CURR, pdo) * 10; |
| 413 | } |
| 414 | |
| 415 | static inline unsigned int pdo_spr_avs_apdo_15v_to_20v_max_current_ma(u32 pdo) |
| 416 | { |
| 417 | return FIELD_GET(PDO_SPR_AVS_APDO_15V_TO_20V_MAX_CURR, pdo) * 10; |
| 418 | } |
| 419 | |
| 420 | /* RDO: Request Data Object */ |
| 421 | #define RDO_OBJ_POS_SHIFT 28 |
| 422 | #define RDO_OBJ_POS_MASK 0x7 |
| 423 | #define RDO_GIVE_BACK BIT(27) /* Supports reduced operating current */ |
| 424 | #define RDO_CAP_MISMATCH BIT(26) /* Not satisfied by source caps */ |
| 425 | #define RDO_USB_COMM BIT(25) /* USB communications capable */ |
| 426 | #define RDO_NO_SUSPEND BIT(24) /* USB Suspend not supported */ |
| 427 | |
| 428 | #define RDO_PWR_MASK 0x3ff |
| 429 | #define RDO_CURR_MASK 0x3ff |
| 430 | |
| 431 | #define RDO_FIXED_OP_CURR_SHIFT 10 |
| 432 | #define RDO_FIXED_MAX_CURR_SHIFT 0 |
| 433 | |
| 434 | #define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT) |
| 435 | |
| 436 | #define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT) |
| 437 | #define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT) |
| 438 | |
| 439 | #define RDO_FIXED(idx, op_ma, max_ma, flags) \ |
| 440 | (RDO_OBJ(idx) | (flags) | \ |
| 441 | PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma)) |
| 442 | |
| 443 | #define RDO_BATT_OP_PWR_SHIFT 10 /* 250mW units */ |
| 444 | #define RDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */ |
| 445 | |
| 446 | #define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT) |
| 447 | #define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT) |
| 448 | |
| 449 | #define RDO_BATT(idx, op_mw, max_mw, flags) \ |
| 450 | (RDO_OBJ(idx) | (flags) | \ |
| 451 | RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw)) |
| 452 | |
| 453 | #define RDO_PROG_VOLT_MASK 0x7ff |
| 454 | #define RDO_PROG_CURR_MASK 0x7f |
| 455 | |
| 456 | #define RDO_PROG_VOLT_SHIFT 9 |
| 457 | #define RDO_PROG_CURR_SHIFT 0 |
| 458 | |
| 459 | #define RDO_PROG_VOLT_MV_STEP 20 |
| 460 | #define RDO_PROG_CURR_MA_STEP 50 |
| 461 | |
| 462 | #define PDO_PROG_OUT_VOLT(mv) \ |
| 463 | ((((mv) / RDO_PROG_VOLT_MV_STEP) & RDO_PROG_VOLT_MASK) << RDO_PROG_VOLT_SHIFT) |
| 464 | #define PDO_PROG_OP_CURR(ma) \ |
| 465 | ((((ma) / RDO_PROG_CURR_MA_STEP) & RDO_PROG_CURR_MASK) << RDO_PROG_CURR_SHIFT) |
| 466 | |
| 467 | #define RDO_PROG(idx, out_mv, op_ma, flags) \ |
| 468 | (RDO_OBJ(idx) | (flags) | \ |
| 469 | PDO_PROG_OUT_VOLT(out_mv) | PDO_PROG_OP_CURR(op_ma)) |
| 470 | |
| 471 | static inline unsigned int rdo_index(u32 rdo) |
| 472 | { |
| 473 | return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK; |
| 474 | } |
| 475 | |
| 476 | static inline unsigned int rdo_op_current(u32 rdo) |
| 477 | { |
| 478 | return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10; |
| 479 | } |
| 480 | |
| 481 | static inline unsigned int rdo_max_current(u32 rdo) |
| 482 | { |
| 483 | return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) & |
| 484 | RDO_CURR_MASK) * 10; |
| 485 | } |
| 486 | |
| 487 | static inline unsigned int rdo_op_power(u32 rdo) |
| 488 | { |
| 489 | return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250; |
| 490 | } |
| 491 | |
| 492 | static inline unsigned int rdo_max_power(u32 rdo) |
| 493 | { |
| 494 | return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250; |
| 495 | } |
| 496 | |
| 497 | /* Enter_USB Data Object */ |
| 498 | #define EUDO_USB_MODE_MASK GENMASK(30, 28) |
| 499 | #define EUDO_USB_MODE_SHIFT 28 |
| 500 | #define EUDO_USB_MODE_USB2 0 |
| 501 | #define EUDO_USB_MODE_USB3 1 |
| 502 | #define EUDO_USB_MODE_USB4 2 |
| 503 | #define EUDO_USB4_DRD BIT(26) |
| 504 | #define EUDO_USB3_DRD BIT(25) |
| 505 | #define EUDO_CABLE_SPEED_MASK GENMASK(23, 21) |
| 506 | #define EUDO_CABLE_SPEED_SHIFT 21 |
| 507 | #define EUDO_CABLE_SPEED_USB2 0 |
| 508 | #define EUDO_CABLE_SPEED_USB3_GEN1 1 |
| 509 | #define EUDO_CABLE_SPEED_USB4_GEN2 2 |
| 510 | #define EUDO_CABLE_SPEED_USB4_GEN3 3 |
| 511 | #define EUDO_CABLE_TYPE_MASK GENMASK(20, 19) |
| 512 | #define EUDO_CABLE_TYPE_SHIFT 19 |
| 513 | #define EUDO_CABLE_TYPE_PASSIVE 0 |
| 514 | #define EUDO_CABLE_TYPE_RE_TIMER 1 |
| 515 | #define EUDO_CABLE_TYPE_RE_DRIVER 2 |
| 516 | #define EUDO_CABLE_TYPE_OPTICAL 3 |
| 517 | #define EUDO_CABLE_CURRENT_MASK GENMASK(18, 17) |
| 518 | #define EUDO_CABLE_CURRENT_SHIFT 17 |
| 519 | #define EUDO_CABLE_CURRENT_NOTSUPP 0 |
| 520 | #define EUDO_CABLE_CURRENT_3A 2 |
| 521 | #define EUDO_CABLE_CURRENT_5A 3 |
| 522 | #define EUDO_PCIE_SUPPORT BIT(16) |
| 523 | #define EUDO_DP_SUPPORT BIT(15) |
| 524 | #define EUDO_TBT_SUPPORT BIT(14) |
| 525 | #define EUDO_HOST_PRESENT BIT(13) |
| 526 | |
| 527 | /* |
| 528 | * Request Message Data Object (PD Revision 3.1+ only) |
| 529 | * -------- |
| 530 | * <31:28> :: Revision Major |
| 531 | * <27:24> :: Revision Minor |
| 532 | * <23:20> :: Version Major |
| 533 | * <19:16> :: Version Minor |
| 534 | * <15:0> :: Reserved, Shall be set to zero |
| 535 | */ |
| 536 | |
| 537 | #define RMDO(rev_maj, rev_min, ver_maj, ver_min) \ |
| 538 | (((rev_maj) & 0xf) << 28 | ((rev_min) & 0xf) << 24 | \ |
| 539 | ((ver_maj) & 0xf) << 20 | ((ver_min) & 0xf) << 16) |
| 540 | |
| 541 | /* USB PD timers and counters */ |
| 542 | #define PD_T_NO_RESPONSE 5000 /* 4.5 - 5.5 seconds */ |
| 543 | #define PD_T_DB_DETECT 10000 /* 10 - 15 seconds */ |
| 544 | #define PD_T_SEND_SOURCE_CAP 150 /* 100 - 200 ms */ |
| 545 | #define PD_T_SENDER_RESPONSE 60 /* 24 - 30 ms, relaxed */ |
| 546 | #define PD_T_RECEIVER_RESPONSE 15 /* 15ms max */ |
| 547 | #define PD_T_SOURCE_ACTIVITY 45 |
| 548 | #define PD_T_SINK_ACTIVITY 135 |
| 549 | #define PD_T_SINK_WAIT_CAP 310 /* 310 - 620 ms */ |
| 550 | #define PD_T_PS_TRANSITION 500 |
| 551 | #define PD_T_SRC_TRANSITION 35 |
| 552 | #define PD_T_DRP_SNK 40 |
| 553 | #define PD_T_DRP_SRC 30 |
| 554 | #define PD_T_PS_SOURCE_OFF 920 |
| 555 | #define PD_T_PS_SOURCE_ON 480 |
| 556 | #define PD_T_PS_SOURCE_ON_PRS 450 /* 390 - 480ms */ |
| 557 | #define PD_T_PS_HARD_RESET 30 |
| 558 | #define PD_T_SRC_RECOVER 760 |
| 559 | #define PD_T_SRC_RECOVER_MAX 1000 |
| 560 | #define PD_T_SRC_TURN_ON 275 |
| 561 | #define PD_T_SAFE_0V 650 |
| 562 | #define PD_T_VCONN_SOURCE_ON 100 |
| 563 | #define PD_T_SINK_REQUEST 100 /* 100 ms minimum */ |
| 564 | #define PD_T_ERROR_RECOVERY 100 /* minimum 25 is insufficient */ |
| 565 | #define PD_T_SRCSWAPSTDBY 625 /* Maximum of 650ms */ |
| 566 | #define PD_T_NEWSRC 250 /* Maximum of 275ms */ |
| 567 | #define PD_T_SWAP_SRC_START 20 /* Minimum of 20ms */ |
| 568 | #define PD_T_BIST_CONT_MODE 50 /* 30 - 60 ms */ |
| 569 | #define PD_T_SINK_TX 16 /* 16 - 20 ms */ |
| 570 | #define PD_T_CHUNK_NOT_SUPP 42 /* 40 - 50 ms */ |
| 571 | #define PD_T_VCONN_STABLE 50 |
| 572 | |
| 573 | #define PD_T_DRP_TRY 100 /* 75 - 150 ms */ |
| 574 | #define PD_T_DRP_TRYWAIT 600 /* 400 - 800 ms */ |
| 575 | |
| 576 | #define PD_T_CC_DEBOUNCE 200 /* 100 - 200 ms */ |
| 577 | #define PD_T_PD_DEBOUNCE 20 /* 10 - 20 ms */ |
| 578 | #define PD_T_TRY_CC_DEBOUNCE 15 /* 10 - 20 ms */ |
| 579 | |
| 580 | #define PD_N_CAPS_COUNT (PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP) |
| 581 | #define PD_N_HARD_RESET_COUNT 2 |
| 582 | |
| 583 | #define PD_P_SNK_STDBY_MW 2500 /* 2500 mW */ |
| 584 | |
| 585 | #if IS_ENABLED(CONFIG_TYPEC) |
| 586 | |
| 587 | struct usb_power_delivery; |
| 588 | |
| 589 | /** |
| 590 | * usb_power_delivery_desc - USB Power Delivery Descriptor |
| 591 | * @revision: USB Power Delivery Specification Revision |
| 592 | * @version: USB Power Delivery Specicication Version - optional |
| 593 | */ |
| 594 | struct usb_power_delivery_desc { |
| 595 | u16 revision; |
| 596 | u16 version; |
| 597 | }; |
| 598 | |
| 599 | /** |
| 600 | * usb_power_delivery_capabilities_desc - Description of USB Power Delivery Capabilities Message |
| 601 | * @pdo: The Power Data Objects in the Capability Message |
| 602 | * @role: Power role of the capabilities |
| 603 | */ |
| 604 | struct usb_power_delivery_capabilities_desc { |
| 605 | u32 pdo[PDO_MAX_OBJECTS]; |
| 606 | enum typec_role role; |
| 607 | }; |
| 608 | |
| 609 | struct usb_power_delivery_capabilities * |
| 610 | usb_power_delivery_register_capabilities(struct usb_power_delivery *pd, |
| 611 | struct usb_power_delivery_capabilities_desc *desc); |
| 612 | void usb_power_delivery_unregister_capabilities(struct usb_power_delivery_capabilities *cap); |
| 613 | |
| 614 | struct usb_power_delivery *usb_power_delivery_register(struct device *parent, |
| 615 | struct usb_power_delivery_desc *desc); |
| 616 | void usb_power_delivery_unregister(struct usb_power_delivery *pd); |
| 617 | |
| 618 | int usb_power_delivery_link_device(struct usb_power_delivery *pd, struct device *dev); |
| 619 | void usb_power_delivery_unlink_device(struct usb_power_delivery *pd, struct device *dev); |
| 620 | |
| 621 | #endif /* CONFIG_TYPEC */ |
| 622 | |
| 623 | #endif /* __LINUX_USB_PD_H */ |
| 624 | |