| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|
| 2 | #ifndef MFD_TMIO_H |
|---|
| 3 | #define MFD_TMIO_H |
|---|
| 4 | |
|---|
| 5 | #include <linux/platform_device.h> |
|---|
| 6 | #include <linux/types.h> |
|---|
| 7 | |
|---|
| 8 | /* TMIO MMC platform flags */ |
|---|
| 9 | |
|---|
| 10 | /* |
|---|
| 11 | * Some controllers can support a 2-byte block size when the bus width is |
|---|
| 12 | * configured in 4-bit mode. |
|---|
| 13 | */ |
|---|
| 14 | #define TMIO_MMC_BLKSZ_2BYTES BIT(1) |
|---|
| 15 | |
|---|
| 16 | /* Some controllers can support SDIO IRQ signalling */ |
|---|
| 17 | #define TMIO_MMC_SDIO_IRQ BIT(2) |
|---|
| 18 | |
|---|
| 19 | /* Some features are only available or tested on R-Car Gen2 or later */ |
|---|
| 20 | #define TMIO_MMC_MIN_RCAR2 BIT(3) |
|---|
| 21 | |
|---|
| 22 | /* |
|---|
| 23 | * Some controllers require waiting for the SD bus to become idle before |
|---|
| 24 | * writing to some registers. |
|---|
| 25 | */ |
|---|
| 26 | #define TMIO_MMC_HAS_IDLE_WAIT BIT(4) |
|---|
| 27 | |
|---|
| 28 | /* |
|---|
| 29 | * Use the busy timeout feature. Probably all TMIO versions support it. Yet, |
|---|
| 30 | * we don't have documentation for old variants, so we enable only known good |
|---|
| 31 | * variants with this flag. Can be removed once all variants are known good. |
|---|
| 32 | */ |
|---|
| 33 | #define TMIO_MMC_USE_BUSY_TIMEOUT BIT(5) |
|---|
| 34 | |
|---|
| 35 | /* Some controllers have CMD12 automatically issue/non-issue register */ |
|---|
| 36 | #define TMIO_MMC_HAVE_CMD12_CTRL BIT(7) |
|---|
| 37 | |
|---|
| 38 | /* Controller has some SDIO status bits which must be 1 */ |
|---|
| 39 | #define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8) |
|---|
| 40 | |
|---|
| 41 | /* Some controllers have a 32-bit wide data port register */ |
|---|
| 42 | #define TMIO_MMC_32BIT_DATA_PORT BIT(9) |
|---|
| 43 | |
|---|
| 44 | /* Some controllers allows to set SDx actual clock */ |
|---|
| 45 | #define TMIO_MMC_CLK_ACTUAL BIT(10) |
|---|
| 46 | |
|---|
| 47 | /* Some controllers have a CBSY bit */ |
|---|
| 48 | #define TMIO_MMC_HAVE_CBSY BIT(11) |
|---|
| 49 | |
|---|
| 50 | /* Some controllers have a 64-bit wide data port register */ |
|---|
| 51 | #define TMIO_MMC_64BIT_DATA_PORT BIT(12) |
|---|
| 52 | |
|---|
| 53 | struct tmio_mmc_data { |
|---|
| 54 | void *chan_priv_tx; |
|---|
| 55 | void *chan_priv_rx; |
|---|
| 56 | unsigned int hclk; |
|---|
| 57 | unsigned long capabilities; |
|---|
| 58 | unsigned long capabilities2; |
|---|
| 59 | unsigned long flags; |
|---|
| 60 | u32 ocr_mask; /* available voltages */ |
|---|
| 61 | dma_addr_t dma_rx_offset; |
|---|
| 62 | unsigned int max_blk_count; |
|---|
| 63 | unsigned short max_segs; |
|---|
| 64 | }; |
|---|
| 65 | #endif |
|---|
| 66 | |
|---|
