| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * This header is for implementations of dma_map_ops and related code. |
| 4 | * It should not be included in drivers just using the DMA API. |
| 5 | */ |
| 6 | #ifndef _LINUX_DMA_MAP_OPS_H |
| 7 | #define _LINUX_DMA_MAP_OPS_H |
| 8 | |
| 9 | #include <linux/dma-mapping.h> |
| 10 | #include <linux/pgtable.h> |
| 11 | #include <linux/slab.h> |
| 12 | |
| 13 | struct cma; |
| 14 | struct iommu_ops; |
| 15 | |
| 16 | struct dma_map_ops { |
| 17 | void *(*alloc)(struct device *dev, size_t size, |
| 18 | dma_addr_t *dma_handle, gfp_t gfp, |
| 19 | unsigned long attrs); |
| 20 | void (*free)(struct device *dev, size_t size, void *vaddr, |
| 21 | dma_addr_t dma_handle, unsigned long attrs); |
| 22 | struct page *(*alloc_pages_op)(struct device *dev, size_t size, |
| 23 | dma_addr_t *dma_handle, enum dma_data_direction dir, |
| 24 | gfp_t gfp); |
| 25 | void (*free_pages)(struct device *dev, size_t size, struct page *vaddr, |
| 26 | dma_addr_t dma_handle, enum dma_data_direction dir); |
| 27 | int (*mmap)(struct device *, struct vm_area_struct *, |
| 28 | void *, dma_addr_t, size_t, unsigned long attrs); |
| 29 | |
| 30 | int (*get_sgtable)(struct device *dev, struct sg_table *sgt, |
| 31 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
| 32 | unsigned long attrs); |
| 33 | |
| 34 | dma_addr_t (*map_phys)(struct device *dev, phys_addr_t phys, |
| 35 | size_t size, enum dma_data_direction dir, |
| 36 | unsigned long attrs); |
| 37 | void (*unmap_phys)(struct device *dev, dma_addr_t dma_handle, |
| 38 | size_t size, enum dma_data_direction dir, |
| 39 | unsigned long attrs); |
| 40 | /* |
| 41 | * map_sg should return a negative error code on error. See |
| 42 | * dma_map_sgtable() for a list of appropriate error codes |
| 43 | * and their meanings. |
| 44 | */ |
| 45 | int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, |
| 46 | enum dma_data_direction dir, unsigned long attrs); |
| 47 | void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents, |
| 48 | enum dma_data_direction dir, unsigned long attrs); |
| 49 | void (*sync_single_for_cpu)(struct device *dev, dma_addr_t dma_handle, |
| 50 | size_t size, enum dma_data_direction dir); |
| 51 | void (*sync_single_for_device)(struct device *dev, |
| 52 | dma_addr_t dma_handle, size_t size, |
| 53 | enum dma_data_direction dir); |
| 54 | void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, |
| 55 | int nents, enum dma_data_direction dir); |
| 56 | void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg, |
| 57 | int nents, enum dma_data_direction dir); |
| 58 | void (*cache_sync)(struct device *dev, void *vaddr, size_t size, |
| 59 | enum dma_data_direction direction); |
| 60 | int (*dma_supported)(struct device *dev, u64 mask); |
| 61 | u64 (*get_required_mask)(struct device *dev); |
| 62 | size_t (*max_mapping_size)(struct device *dev); |
| 63 | size_t (*opt_mapping_size)(void); |
| 64 | unsigned long (*get_merge_boundary)(struct device *dev); |
| 65 | }; |
| 66 | |
| 67 | #ifdef CONFIG_ARCH_HAS_DMA_OPS |
| 68 | #include <asm/dma-mapping.h> |
| 69 | |
| 70 | static inline const struct dma_map_ops *get_dma_ops(struct device *dev) |
| 71 | { |
| 72 | if (dev->dma_ops) |
| 73 | return dev->dma_ops; |
| 74 | return get_arch_dma_ops(); |
| 75 | } |
| 76 | |
| 77 | static inline void set_dma_ops(struct device *dev, |
| 78 | const struct dma_map_ops *dma_ops) |
| 79 | { |
| 80 | dev->dma_ops = dma_ops; |
| 81 | } |
| 82 | #else /* CONFIG_ARCH_HAS_DMA_OPS */ |
| 83 | static inline const struct dma_map_ops *get_dma_ops(struct device *dev) |
| 84 | { |
| 85 | return NULL; |
| 86 | } |
| 87 | static inline void set_dma_ops(struct device *dev, |
| 88 | const struct dma_map_ops *dma_ops) |
| 89 | { |
| 90 | } |
| 91 | #endif /* CONFIG_ARCH_HAS_DMA_OPS */ |
| 92 | |
| 93 | #ifdef CONFIG_DMA_CMA |
| 94 | extern struct cma *dma_contiguous_default_area; |
| 95 | |
| 96 | static inline struct cma *dev_get_cma_area(struct device *dev) |
| 97 | { |
| 98 | if (dev && dev->cma_area) |
| 99 | return dev->cma_area; |
| 100 | return dma_contiguous_default_area; |
| 101 | } |
| 102 | |
| 103 | void dma_contiguous_reserve(phys_addr_t addr_limit); |
| 104 | int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base, |
| 105 | phys_addr_t limit, struct cma **res_cma, bool fixed); |
| 106 | |
| 107 | struct page *dma_alloc_from_contiguous(struct device *dev, size_t count, |
| 108 | unsigned int order, bool no_warn); |
| 109 | bool dma_release_from_contiguous(struct device *dev, struct page *pages, |
| 110 | int count); |
| 111 | struct page *dma_alloc_contiguous(struct device *dev, size_t size, gfp_t gfp); |
| 112 | void dma_free_contiguous(struct device *dev, struct page *page, size_t size); |
| 113 | |
| 114 | void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size); |
| 115 | #else /* CONFIG_DMA_CMA */ |
| 116 | static inline struct cma *dev_get_cma_area(struct device *dev) |
| 117 | { |
| 118 | return NULL; |
| 119 | } |
| 120 | static inline void dma_contiguous_reserve(phys_addr_t limit) |
| 121 | { |
| 122 | } |
| 123 | static inline int dma_contiguous_reserve_area(phys_addr_t size, |
| 124 | phys_addr_t base, phys_addr_t limit, struct cma **res_cma, |
| 125 | bool fixed) |
| 126 | { |
| 127 | return -ENOSYS; |
| 128 | } |
| 129 | static inline struct page *dma_alloc_from_contiguous(struct device *dev, |
| 130 | size_t count, unsigned int order, bool no_warn) |
| 131 | { |
| 132 | return NULL; |
| 133 | } |
| 134 | static inline bool dma_release_from_contiguous(struct device *dev, |
| 135 | struct page *pages, int count) |
| 136 | { |
| 137 | return false; |
| 138 | } |
| 139 | /* Use fallback alloc() and free() when CONFIG_DMA_CMA=n */ |
| 140 | static inline struct page *dma_alloc_contiguous(struct device *dev, size_t size, |
| 141 | gfp_t gfp) |
| 142 | { |
| 143 | return NULL; |
| 144 | } |
| 145 | static inline void dma_free_contiguous(struct device *dev, struct page *page, |
| 146 | size_t size) |
| 147 | { |
| 148 | __free_pages(page, get_order(size)); |
| 149 | } |
| 150 | static inline void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size) |
| 151 | { |
| 152 | } |
| 153 | #endif /* CONFIG_DMA_CMA*/ |
| 154 | |
| 155 | #ifdef CONFIG_DMA_DECLARE_COHERENT |
| 156 | int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, |
| 157 | dma_addr_t device_addr, size_t size); |
| 158 | void dma_release_coherent_memory(struct device *dev); |
| 159 | int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size, |
| 160 | dma_addr_t *dma_handle, void **ret); |
| 161 | int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr); |
| 162 | int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma, |
| 163 | void *cpu_addr, size_t size, int *ret); |
| 164 | #else |
| 165 | static inline int dma_declare_coherent_memory(struct device *dev, |
| 166 | phys_addr_t phys_addr, dma_addr_t device_addr, size_t size) |
| 167 | { |
| 168 | return -ENOSYS; |
| 169 | } |
| 170 | |
| 171 | #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0) |
| 172 | #define dma_release_from_dev_coherent(dev, order, vaddr) (0) |
| 173 | #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0) |
| 174 | static inline void dma_release_coherent_memory(struct device *dev) { } |
| 175 | #endif /* CONFIG_DMA_DECLARE_COHERENT */ |
| 176 | |
| 177 | #ifdef CONFIG_DMA_GLOBAL_POOL |
| 178 | void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size, |
| 179 | dma_addr_t *dma_handle); |
| 180 | int dma_release_from_global_coherent(int order, void *vaddr); |
| 181 | int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr, |
| 182 | size_t size, int *ret); |
| 183 | int dma_init_global_coherent(phys_addr_t phys_addr, size_t size); |
| 184 | #else |
| 185 | static inline void *dma_alloc_from_global_coherent(struct device *dev, |
| 186 | ssize_t size, dma_addr_t *dma_handle) |
| 187 | { |
| 188 | return NULL; |
| 189 | } |
| 190 | static inline int dma_release_from_global_coherent(int order, void *vaddr) |
| 191 | { |
| 192 | return 0; |
| 193 | } |
| 194 | static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma, |
| 195 | void *cpu_addr, size_t size, int *ret) |
| 196 | { |
| 197 | return 0; |
| 198 | } |
| 199 | #endif /* CONFIG_DMA_GLOBAL_POOL */ |
| 200 | |
| 201 | int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, |
| 202 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
| 203 | unsigned long attrs); |
| 204 | int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, |
| 205 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
| 206 | unsigned long attrs); |
| 207 | struct page *dma_common_alloc_pages(struct device *dev, size_t size, |
| 208 | dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); |
| 209 | void dma_common_free_pages(struct device *dev, size_t size, struct page *vaddr, |
| 210 | dma_addr_t dma_handle, enum dma_data_direction dir); |
| 211 | |
| 212 | struct page **dma_common_find_pages(void *cpu_addr); |
| 213 | void *dma_common_contiguous_remap(struct page *page, size_t size, pgprot_t prot, |
| 214 | const void *caller); |
| 215 | void *dma_common_pages_remap(struct page **pages, size_t size, pgprot_t prot, |
| 216 | const void *caller); |
| 217 | void dma_common_free_remap(void *cpu_addr, size_t size); |
| 218 | |
| 219 | struct page *dma_alloc_from_pool(struct device *dev, size_t size, |
| 220 | void **cpu_addr, gfp_t flags, |
| 221 | bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t)); |
| 222 | bool dma_free_from_pool(struct device *dev, void *start, size_t size); |
| 223 | |
| 224 | int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start, |
| 225 | dma_addr_t dma_start, u64 size); |
| 226 | |
| 227 | #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \ |
| 228 | defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ |
| 229 | defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) |
| 230 | extern bool dma_default_coherent; |
| 231 | static inline bool dev_is_dma_coherent(struct device *dev) |
| 232 | { |
| 233 | return dev->dma_coherent; |
| 234 | } |
| 235 | #else |
| 236 | #define dma_default_coherent true |
| 237 | |
| 238 | static inline bool dev_is_dma_coherent(struct device *dev) |
| 239 | { |
| 240 | return true; |
| 241 | } |
| 242 | #endif |
| 243 | |
| 244 | static inline void dma_reset_need_sync(struct device *dev) |
| 245 | { |
| 246 | #ifdef CONFIG_DMA_NEED_SYNC |
| 247 | /* Reset it only once so that the function can be called on hotpath */ |
| 248 | if (unlikely(dev->dma_skip_sync)) |
| 249 | dev->dma_skip_sync = false; |
| 250 | #endif |
| 251 | } |
| 252 | |
| 253 | /* |
| 254 | * Check whether potential kmalloc() buffers are safe for non-coherent DMA. |
| 255 | */ |
| 256 | static inline bool dma_kmalloc_safe(struct device *dev, |
| 257 | enum dma_data_direction dir) |
| 258 | { |
| 259 | /* |
| 260 | * If DMA bouncing of kmalloc() buffers is disabled, the kmalloc() |
| 261 | * caches have already been aligned to a DMA-safe size. |
| 262 | */ |
| 263 | if (!IS_ENABLED(CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC)) |
| 264 | return true; |
| 265 | |
| 266 | /* |
| 267 | * kmalloc() buffers are DMA-safe irrespective of size if the device |
| 268 | * is coherent or the direction is DMA_TO_DEVICE (non-desctructive |
| 269 | * cache maintenance and benign cache line evictions). |
| 270 | */ |
| 271 | if (dev_is_dma_coherent(dev) || dir == DMA_TO_DEVICE) |
| 272 | return true; |
| 273 | |
| 274 | return false; |
| 275 | } |
| 276 | |
| 277 | /* |
| 278 | * Check whether the given size, assuming it is for a kmalloc()'ed buffer, is |
| 279 | * sufficiently aligned for non-coherent DMA. |
| 280 | */ |
| 281 | static inline bool dma_kmalloc_size_aligned(size_t size) |
| 282 | { |
| 283 | /* |
| 284 | * Larger kmalloc() sizes are guaranteed to be aligned to |
| 285 | * ARCH_DMA_MINALIGN. |
| 286 | */ |
| 287 | if (size >= 2 * ARCH_DMA_MINALIGN || |
| 288 | IS_ALIGNED(kmalloc_size_roundup(size), dma_get_cache_alignment())) |
| 289 | return true; |
| 290 | |
| 291 | return false; |
| 292 | } |
| 293 | |
| 294 | /* |
| 295 | * Check whether the given object size may have originated from a kmalloc() |
| 296 | * buffer with a slab alignment below the DMA-safe alignment and needs |
| 297 | * bouncing for non-coherent DMA. The pointer alignment is not considered and |
| 298 | * in-structure DMA-safe offsets are the responsibility of the caller. Such |
| 299 | * code should use the static ARCH_DMA_MINALIGN for compiler annotations. |
| 300 | * |
| 301 | * The heuristics can have false positives, bouncing unnecessarily, though the |
| 302 | * buffers would be small. False negatives are theoretically possible if, for |
| 303 | * example, multiple small kmalloc() buffers are coalesced into a larger |
| 304 | * buffer that passes the alignment check. There are no such known constructs |
| 305 | * in the kernel. |
| 306 | */ |
| 307 | static inline bool dma_kmalloc_needs_bounce(struct device *dev, size_t size, |
| 308 | enum dma_data_direction dir) |
| 309 | { |
| 310 | return !dma_kmalloc_safe(dev, dir) && !dma_kmalloc_size_aligned(size); |
| 311 | } |
| 312 | |
| 313 | void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, |
| 314 | gfp_t gfp, unsigned long attrs); |
| 315 | void arch_dma_free(struct device *dev, size_t size, void *cpu_addr, |
| 316 | dma_addr_t dma_addr, unsigned long attrs); |
| 317 | |
| 318 | #ifdef CONFIG_ARCH_HAS_DMA_SET_MASK |
| 319 | void arch_dma_set_mask(struct device *dev, u64 mask); |
| 320 | #else |
| 321 | #define arch_dma_set_mask(dev, mask) do { } while (0) |
| 322 | #endif |
| 323 | |
| 324 | #ifdef CONFIG_MMU |
| 325 | /* |
| 326 | * Page protection so that devices that can't snoop CPU caches can use the |
| 327 | * memory coherently. We default to pgprot_noncached which is usually used |
| 328 | * for ioremap as a safe bet, but architectures can override this with less |
| 329 | * strict semantics if possible. |
| 330 | */ |
| 331 | #ifndef pgprot_dmacoherent |
| 332 | #define pgprot_dmacoherent(prot) pgprot_noncached(prot) |
| 333 | #endif |
| 334 | |
| 335 | pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs); |
| 336 | #else |
| 337 | static inline pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, |
| 338 | unsigned long attrs) |
| 339 | { |
| 340 | return prot; /* no protection bits supported without page tables */ |
| 341 | } |
| 342 | #endif /* CONFIG_MMU */ |
| 343 | |
| 344 | #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE |
| 345 | void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, |
| 346 | enum dma_data_direction dir); |
| 347 | #else |
| 348 | static inline void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, |
| 349 | enum dma_data_direction dir) |
| 350 | { |
| 351 | } |
| 352 | #endif /* ARCH_HAS_SYNC_DMA_FOR_DEVICE */ |
| 353 | |
| 354 | #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU |
| 355 | void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, |
| 356 | enum dma_data_direction dir); |
| 357 | #else |
| 358 | static inline void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, |
| 359 | enum dma_data_direction dir) |
| 360 | { |
| 361 | } |
| 362 | #endif /* ARCH_HAS_SYNC_DMA_FOR_CPU */ |
| 363 | |
| 364 | #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL |
| 365 | void arch_sync_dma_for_cpu_all(void); |
| 366 | #else |
| 367 | static inline void arch_sync_dma_for_cpu_all(void) |
| 368 | { |
| 369 | } |
| 370 | #endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */ |
| 371 | |
| 372 | #ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT |
| 373 | void arch_dma_prep_coherent(struct page *page, size_t size); |
| 374 | #else |
| 375 | static inline void arch_dma_prep_coherent(struct page *page, size_t size) |
| 376 | { |
| 377 | } |
| 378 | #endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */ |
| 379 | |
| 380 | #ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN |
| 381 | void arch_dma_mark_clean(phys_addr_t paddr, size_t size); |
| 382 | #else |
| 383 | static inline void arch_dma_mark_clean(phys_addr_t paddr, size_t size) |
| 384 | { |
| 385 | } |
| 386 | #endif /* ARCH_HAS_DMA_MARK_CLEAN */ |
| 387 | |
| 388 | void *arch_dma_set_uncached(void *addr, size_t size); |
| 389 | void arch_dma_clear_uncached(void *addr, size_t size); |
| 390 | |
| 391 | #ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT |
| 392 | bool arch_dma_map_phys_direct(struct device *dev, phys_addr_t addr); |
| 393 | bool arch_dma_unmap_phys_direct(struct device *dev, dma_addr_t dma_handle); |
| 394 | bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg, |
| 395 | int nents); |
| 396 | bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg, |
| 397 | int nents); |
| 398 | #else |
| 399 | #define arch_dma_map_phys_direct(d, a) (false) |
| 400 | #define arch_dma_unmap_phys_direct(d, a) (false) |
| 401 | #define arch_dma_map_sg_direct(d, s, n) (false) |
| 402 | #define arch_dma_unmap_sg_direct(d, s, n) (false) |
| 403 | #endif |
| 404 | |
| 405 | #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS |
| 406 | void arch_setup_dma_ops(struct device *dev, bool coherent); |
| 407 | #else |
| 408 | static inline void arch_setup_dma_ops(struct device *dev, bool coherent) |
| 409 | { |
| 410 | } |
| 411 | #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */ |
| 412 | |
| 413 | #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS |
| 414 | void arch_teardown_dma_ops(struct device *dev); |
| 415 | #else |
| 416 | static inline void arch_teardown_dma_ops(struct device *dev) |
| 417 | { |
| 418 | } |
| 419 | #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */ |
| 420 | |
| 421 | #ifdef CONFIG_DMA_API_DEBUG |
| 422 | void dma_debug_add_bus(const struct bus_type *bus); |
| 423 | void debug_dma_dump_mappings(struct device *dev); |
| 424 | #else |
| 425 | static inline void dma_debug_add_bus(const struct bus_type *bus) |
| 426 | { |
| 427 | } |
| 428 | static inline void debug_dma_dump_mappings(struct device *dev) |
| 429 | { |
| 430 | } |
| 431 | #endif /* CONFIG_DMA_API_DEBUG */ |
| 432 | |
| 433 | extern const struct dma_map_ops dma_dummy_ops; |
| 434 | #endif /* _LINUX_DMA_MAP_OPS_H */ |
| 435 | |