Oualid Hammi
American University of Sharjah, Electrical Engineering, Faculty Member
This paper investigates the robustness of Hammerstein based behavioral models for highly nonlinear power amplifiers exhibiting strong memory effects. Augmented Hammerstein models have been proposed to replace the linear function in... more
This paper investigates the robustness of Hammerstein based behavioral models for highly nonlinear power amplifiers exhibiting strong memory effects. Augmented Hammerstein models have been proposed to replace the linear function in conventional Hammerstein model by a nonlinear function typically implemented as a memory polynomial. This work illustrates the lack of robustness of such memory polynomial based models and proposes a new type of Hammerstein models based on orthogonal memory polynomials. Experimental validation carried on a high efficiency Doherty amplifier driven by multi-carrier WCDMA signals illustrate that the proposed models maintain the prediction accuracy while considerably improving the identification robustness quantified in terms of the condition number of the Vandermonde matrix.
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In this paper, a power amplifier (PA) integrated active antenna is presented. A new approach to antenna miniaturization is introduced through the direct integration and co-design with the amplifier. The detailed design procedure is... more
In this paper, a power amplifier (PA) integrated active antenna is presented. A new approach to antenna miniaturization is introduced through the direct integration and co-design with the amplifier. The detailed design procedure is presented and the concept is demonstrated with a rectangular patch antenna. The PA and the antenna are co-designed so that optimum performance is achieved. The antenna is miniaturized from its nature resonance frequency 2.95GHz to 2.45GHz which is 31% size reduction. The bandwidth of the antenna is found to be 37MHz and its efficiency is more than 50% when operating between 2.43-2.467GHz. The gain and noise figure of the amplifier are optimized along with the antenna performance as an active integrated antenna (AIA) system and found to be around 8 and 2dB respectively across the operating band.
This paper examines the sensitivity of power amplifiers behavioral models to time-delay misalignment. Memory polynomial and twin-nonlinear two-box models are derived, from measured data, to model the behavior of a GaN based Doherty power... more
This paper examines the sensitivity of power amplifiers behavioral models to time-delay misalignment. Memory polynomial and twin-nonlinear two-box models are derived, from measured data, to model the behavior of a GaN based Doherty power amplifier under various time misalignment conditions. The results show that the memory polynomial model is much less sensitive to delay misalignment than twin-nonlinear two-box models. In particular, the memory polynomial model accuracy is not altered by a delay underestimation up to one sample, and is only degraded when the delay is overestimated. Conversely, twin-nonlinear two-box models performances are degraded whether the delay is underestimated or overestimated. Hence, the identification of twin-nonlinear two-box models unavoidably requires accurate delay alignment with a sub-sample resolution while the memory polynomial model can be derived from low complexity coarse delay alignment. Thus, in comparison with the two-box models, the complexity...
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Envelope tracking power amplifiers represent an attractive alternative for future high efficiency base station amplifiers. This paper proposes a suitable design alternative customized to envelope tracking power amplifiers. This consists... more
Envelope tracking power amplifiers represent an attractive alternative for future high efficiency base station amplifiers. This paper proposes a suitable design alternative customized to envelope tracking power amplifiers. This consists of performing a multi-dimensional load-pull and selecting the reflection coefficients to be presented to the transistor while taking into account the system level architecture of the power amplifier. It is shown that adopting the proposed load reflection coefficient selection algorithm leads to an additional efficiency enhancement of approximately 3% from 44.2% to 47.3%. This extra performance is achieved without additional circuitry or cost.
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ABSTRACT In this paper, a novel accurate model dimensions estimation algorithm suitable for memory polynomial based behavioral models is proposed. For a predefined model performance criterion, the proposed algorithm selects the... more
ABSTRACT In this paper, a novel accurate model dimensions estimation algorithm suitable for memory polynomial based behavioral models is proposed. For a predefined model performance criterion, the proposed algorithm selects the nonlinearity order and the memory depth for a trade-off between performance and computational complexity. Indeed, the nonlinearity order is first chosen to minimize the conditioning number of the Vandermonde matrix. Then, the memory depth is optimized to decrease the overall the number of coefficients in the model. The proposed algorithm is experimentally validated on a high power 3G Doherty amplifier prototype driven by various WCDMA multi-carrier signals. This validation showed that the model performance was maintained while its complexity was reduced by 40% and its robustness improved by 20%.
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This paper proposes an experimental study of the architectures of the high power amplification stage and their influences on the system's linearity and power efficiency with application to wireless communication... more
This paper proposes an experimental study of the architectures of the high power amplification stage and their influences on the system's linearity and power efficiency with application to wireless communication infrastructures. Two architectures are investigated: the single branch power amplification stage using class A/B power amplifiers and the promising multi-branch architecture using dynamic load modulation techniques such as the Doherty amplifier. Two LDMOS based high power amplifiers line-ups operating around 2.14 GHz were designed. In order to improve their efficiency vs. linearity trade-off, a predistortion based linearization technique has been applied to the both studied amplification stages. Measurement results under multi-carriers W-CDMA signals confirm the promising potential of the multi-branch approach. Indeed, the multi-branch architecture greatly improves the power efficiency of the amplification stage while maintaining good linearity performances
Research Interests: Power, Broadband Networks, Rf Power Amplifier, Radio Frequency, Experimental Study, and 12 moreEfficiency, High Power, High Power Amplifier and Combiner (TMM), Dynamic Loading, Power Amplifier, Amplifier, Linearity, Non Linearity, Code Division Multiple Access, Wireless Communication, LDMOS, and power efficiency
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ABSTRACT This article presents a method for pruning power amplifier behavioral models and digital predistorters based on compressed sampling theory. Using this method, the number of coefficients required by behavioral models and... more
ABSTRACT This article presents a method for pruning power amplifier behavioral models and digital predistorters based on compressed sampling theory. Using this method, the number of coefficients required by behavioral models and predistorters can be significantly reduced while achieving comparable performance in terms of both modeling accuracy and suppressing distortions. Hardware measurements obtained for a Doherty PA driven by a 5-carrier 100MHz wide LTE-advanced signal demonstrate the capability of the proposed method to linearize a highly nonlinear power amplifier prototype using a minimal number of coefficients, revealing the attractive properties of the proposed method and its desirable performance. Using the proposed technique, predistorters achieving similar linearization performance while requiring significantly less coefficients than the traditional models were demonstrated.
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ABSTRACT This work presents an efficient digital predistorter based on a modified Least Mean Squares Newton (LMSN) adaptive filtering algorithm. The proposed predistorter is shown to consistently outperform the Recursive Least Squares... more
ABSTRACT This work presents an efficient digital predistorter based on a modified Least Mean Squares Newton (LMSN) adaptive filtering algorithm. The proposed predistorter is shown to consistently outperform the Recursive Least Squares (RLS) algorithm by 1dB in terms of error performance while requiring on average 10% less computational time. The performance of the proposed predistorter is validated through linearizing a Doherty power amplifier driven by two 20MHz wideband code division multiple access (WCDMA) signals having different carrier configurations. The results presented in this work demonstrate the desirable performance of the algorithm compared to the well known RLS algorithm.
ABSTRACT A metamaterial based isolation enhancement technique is proposed. A 4-shaped MIMO antenna system is used to demonstrate the effect of the a metamaterial based isolation structure between the radiating elements. The isolation... more
ABSTRACT A metamaterial based isolation enhancement technique is proposed. A 4-shaped MIMO antenna system is used to demonstrate the effect of the a metamaterial based isolation structure between the radiating elements. The isolation structure is capable of enhancing the isolation for the dual band MIMO antenna system under consideration. Printed CLLs on the top layer of the antenna system provides the isolation for high band (2.3-2.98Ghz). The ground layer complementary CLLs are used to enhance the isolation in the low band (827-853MHz). The minimum isolation for the low band and high band was 18.9dB and 9.8dB respectively.
ABSTRACT In this paper, a novel accurate model dimensions estimation algorithm suitable for memory polynomial based behavioral models is proposed. For a predefined model performance criterion, the proposed algorithm selects the... more
ABSTRACT In this paper, a novel accurate model dimensions estimation algorithm suitable for memory polynomial based behavioral models is proposed. For a predefined model performance criterion, the proposed algorithm selects the nonlinearity order and the memory depth for a trade-off between performance and computational complexity. Indeed, the nonlinearity order is first chosen to minimize the conditioning number of the Vandermonde matrix. Then, the memory depth is optimized to decrease the overall the number of coefficients in the model. The proposed algorithm is experimentally validated on a high power 3G Doherty amplifier prototype driven by various WCDMA multi-carrier signals. This validation showed that the model performance was maintained while its complexity was reduced by 40% and its robustness improved by 20%.
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ABSTRACT This paper reports an envelope tracking (ET) transmitter architecture for multi-band/widely-spaced carrier signals. Due to the bandwidth limitations of the envelope modulator, the dynamic supply voltage is controlled by combining... more
ABSTRACT This paper reports an envelope tracking (ET) transmitter architecture for multi-band/widely-spaced carrier signals. Due to the bandwidth limitations of the envelope modulator, the dynamic supply voltage is controlled by combining the low frequency envelopes of the multi-inputs rather than the true composite envelope of the input signals. The ET transmitter is tested for dual-band and tri-band power amplifiers (PAs) operating in concurrent mode using various bandwidth carrier aggregated long term evolution (LTE) signals. The transmitter is linearized using a phase-aligned Volterra digital predistortion that considers the inter-modulation distortion (IMD) products around the carrier frequencies as well as the third-order IMD products in the tri-band case. Experimental results are shown to validate the proposed techniques for linearization and efficiency enhancement of the multi-band ET transmitter and compared to the case of fixed supply biasing of the PA.
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... Predistortion Driven by CDMA Signals Oualid Hammi, Sami Bousnina, and Fadhel M. Ghannouchi ... 2001. [4] Y. Yang, J. Yi, YY Woo, and B. Kim, Experimental investigation on efficiency and linearity of microwave Doherty amplifier, 2001... more
... Predistortion Driven by CDMA Signals Oualid Hammi, Sami Bousnina, and Fadhel M. Ghannouchi ... 2001. [4] Y. Yang, J. Yi, YY Woo, and B. Kim, Experimental investigation on efficiency and linearity of microwave Doherty amplifier, 2001 IEEE MTT-S Int. Microwave Symp. ...
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ABSTRACT In this paper, an analysis of the output load mismatch effects on the operation of Doherty power amplifiers is presented. A load-pull based LDMOS transistor model is used to investigate the effects of the load mismatch on the... more
ABSTRACT In this paper, an analysis of the output load mismatch effects on the operation of Doherty power amplifiers is presented. A load-pull based LDMOS transistor model is used to investigate the effects of the load mismatch on the load modulation seen by the carrier and peaking amplifiers of a Doherty scheme. Then, the power added efficiency and the gain of the Doherty amplifier are evaluated for various load mismatch conditions. It is shown that the performance of the Doherty amplifier is more sensitive to the phase of the load reflection coefficient rather than its magnitude. Moreover, there is a phase of the load reflection coefficient for which the amplifier performance are much less sensitive to the load mismatch
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In this paper, a study of the effects of the average power of the training sequences used in characterizing the power amplifier on the performance of synthesized memory polynomial digital predistorters is presented. This study was carried... more
In this paper, a study of the effects of the average power of the training sequences used in characterizing the power amplifier on the performance of synthesized memory polynomial digital predistorters is presented. This study was carried out on a 3G 100-Watt peak power amplifier operating over a 12 dB average input power range. The amplifier was characterized over this
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... This signal is fed into the two input analog to digital converters (ADC) of the FPGA board. The FPGA board that was used in this work is the ALTERA APEX DSP development board with the APEX EP20K1500E-IX device. The ...
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In this paper, an experimental approach is proposed to accurately identify, under a modulated signal drive, the memoryless nonlinearity of power amplifiers exhibiting memory effects. It is experimentally demonstrated that, when they are... more
In this paper, an experimental approach is proposed to accurately identify, under a modulated signal drive, the memoryless nonlinearity of power amplifiers exhibiting memory effects. It is experimentally demonstrated that, when they are present, memory effects bias the extracted static nonlinearity. Accordingly, the sampling rate of the WCDMA test signal waveform is varied to reduce the signalpsilas bandwidth. It is shown that this approach minimizes the memory effects contribution to the amplifierpsilas nonlinear behavior and leads to accurate characterization of the dasiatruepsila static nonlinearity. The performance of the proposed approach is then assessed through experimental memoryless digital predistortion.
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ABSTRACT RF linear vector multiplier is a key component in hybrid RF/Digital predistortion systems. It adjusts, through I and Q baseband control signals, the input signal's magnitude and phase according to the gain and phase... more
ABSTRACT RF linear vector multiplier is a key component in hybrid RF/Digital predistortion systems. It adjusts, through I and Q baseband control signals, the input signal's magnitude and phase according to the gain and phase required by the predistortion synthesis. In practical situations, due to hardware impairments, the I and Q correction signals combine in some non quadrature phase relation to give error in terms of implemented gain and phase of the predistortion functions. This quadrature imperfection can lead to poor correction in terms of predistortion and hence reduces the linearization capability of the predistortion system. This paper analyzes the effects of such quadrature imperfection in RF/Digital predistortion schemes. Experimental validation is carried out on a power amplifier biased in class B mode and driven by 3G WCDMA signal.
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In this paper, a hardware-software system is proposed for the wideband characterization and linearization of power amplifiers exhibiting memory effects. The designed prototype includes a signal generation and a feedback paths for... more
In this paper, a hardware-software system is proposed for the wideband characterization and linearization of power amplifiers exhibiting memory effects. The designed prototype includes a signal generation and a feedback paths for applications in the 1GHz to 2.5GHz frequency band and supports instantaneous bandwidths of up to 60MHz. The hardware platform is coupled with a software interface that implements the
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ABSTRACT In this paper, a GaN based symmetrical Doherty power amplifier is designed. The Doherty amplifier bias conditions are optimized for a trade-off between power added efficiency and linearity. The carrier amplifier is biased for... more
ABSTRACT In this paper, a GaN based symmetrical Doherty power amplifier is designed. The Doherty amplifier bias conditions are optimized for a trade-off between power added efficiency and linearity. The carrier amplifier is biased for linearity and the peaking amplifier bias is chosen for maximum power added efficiency. Measurement results under a four carrier WCDMA drive signal show respectively 43% power added efficiency and -32.5dBc adjacent channel leakage ratio at 6dB output power back-off. Linearization of the designed Doherty PA using baseband digital predistortion led to quasi perfect cancellation of spectrum regrowth while operating at an output power back-off equal to the input signal's peak to average power ratio.