Target code generator
Position of code generator
functionality
Code produced by compiler must be correct.
Must be semantic preserving
code produced by compiler should be of high
quality
Effective use of target machine resources
Issues in the design of code generator
Input to the code generator
Target program
Memory management
Instruction selection
Register allocation
Input to the target generator
Input representations of the source program
Linear form- postfix
Tabular form- quadruples, triples indirect
triples
Non-linear
DAG
Syntax tree
Target program
The back end code generator of a compiler
may generate different forms of code,
depending on the requirements.
Absolute machine code (executable)
Relocatable machine code(object files)
Assembly code
Byte code
Target program
Implementing code generator requires
understanding of the target machine
architecture and its instruction set
Our case:
Byte addressable (word= 4 bytes)
Has n general purpose registers R0, R1, R2…..
Two address instruction of the form
Op source, destination
Target program
Op code examples
MOV - move content from source to
destination
ADD – add content of source to destination
SUB – subtract contents of source from
destination
Target program
Instruction selection
Machine is a simple, non-super –scalar
processor with fixed instruction costs
Realistic machines have deep pipelines, I-
cache,
D-cache etc.
Define the cost of instruction
= 1+ cost(source mode) + cost (destination-
mode)
examples
Instruction selection
Need for optimization
Suppose we translate 3-address code
X=Y+Z
MOV Y,R0
ADD Z,R0
MOV R0,X
Need for optimization
Register allocation and assignment
Efficient utilization of the limited set of
registers is important to generate good code
Registers are assigned by
Register allocation to select the set of variables
that will reside at a point in the code
Register assignment to pick the specific
register that a variable will reside in