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Lecture 1

The document provides an overview of cloud computing and computer architecture, detailing classifications such as SISD, SIMD, and MIMD. It discusses CISC and RISC microprocessors, inter-process communication, software models, interconnection networks, and switching techniques. Additionally, it covers network topology, data representation formats, scalable computing trends, and outlines a course on cloud computing principles and management.

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8 views19 pages

Lecture 1

The document provides an overview of cloud computing and computer architecture, detailing classifications such as SISD, SIMD, and MIMD. It discusses CISC and RISC microprocessors, inter-process communication, software models, interconnection networks, and switching techniques. Additionally, it covers network topology, data representation formats, scalable computing trends, and outlines a course on cloud computing principles and management.

Uploaded by

firasqays623
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CLOUD COMPUTING

Furkan Rabee
Furqan.rabee@uokufa.edu.iq
COMPUTING
OVERVIEW
COMPUTER ARCHITECTURE
CLASSIFICATION
• Single-instruction single-data streams (SISD)
• Single-instruction multiple-data streams
(SIMD)
• Multiple-instruction single-data streams (MISD)
• Multiple-instruction multiple-data streams
(MIMD)
 Single-processor von Neumann
computers are classified as SISD
systems.
 Parallel computers are either SIMD or

MIMD.
CISC MICROPROCESSOR
 CISC (Complex Instruction Set
Computers) : The primary goal of CISC
architecture is to complete a task in as
few lines of assembly as possible. This
is achieved by building processor
hardware that is capable of
understanding and executing a series
of operations.
RISC MICROPROCESSOR

RISC processors only use simple instructions that can be executed within one clock cycle.
Thus, the "MULT" command described above could be divided into three separate
commands: "LOAD," which moves data from the memory bank to a register, "PROD,"
which finds the product of two operands located within the registers, and "STORE," which
moves data from a register to the memory banks. In order to perform the exact series of
steps described in the CISC approach, a programmer would need to code four lines of
assembly:
LOAD A, 1:3
LOAD B, 4:4
PROD A, B
STORE 6:3, A
PIPELINING TECHNIQUE
INTER-PROCESS COMMUNICATION

• Producer-Consumer Problem !?

Producer Process Consumer Process

Compiler Assembler
SOFTWARE MODELS
 They fall into two broad categories:
shared memory or message passing.
INTERCONNECTION NETWORKS

 Multiprocessors interconnection networks (INs) can be classified based


on a number of criteria. These include :
1. Mode of operation (synchronous versus asynchronous).

2. Control strategy (centralized versus decentralized).

3. Switching techniques (circuit versus packet).

4. Topology (static versus dynamic).


SWITCHING TECHNIQUES

 Interconnection networks can be classified according to the switching


mechanism as circuit versus packet switching networks.
 In the circuit switching mechanism, a complete path has to be
established prior to the start of communication between a source and
a destination.
 The established path will remain in existence during the whole
communication period.
 In a packet switching mechanism, communication between a source
and destination takes place via messages that are divided into smaller
entities, called packets.
 On their way to the destination, packets can be sent from a node to
another in a store-and-forward manner until they reach their
destination.
 While packet switching tends to use the network resources more
efficiently compared to circuit switching, it suffers from variable packet
delays.
TOPOLOGY

An interconnection network topology is a


mapping function from the set of processors
and memories onto the same set of
processors and
memories.
the topology describes how to connect
processors and memories to other.
A fully connected topology, for example, is a
mapping in which each processor is
connected to all other processors in the
computer.
A ring topology is a mapping that connects
NETWORK TOPOLOGY ….CONT.

 Shared memory systems can be


designed using bus-based or switch-
based INs.
Bus-based systems when a single bus is
used versus the case when multiple buses
are used.
BIG-ENDIAN VS LITTLE –ENDIAN

 Two of typed of architecture to represent the


data (the representation of 32-bit integers)
 Big-endian: store the most significant byte
first
 Little –endian : store the least significant byte
first
 Data representation handled via External Data
Representation (XDL) format to account for
different architectures .
SCALABLE COMPUTING TRENDS: TECHNOLOGY

 Doubling Periods:
 Storage: 12 months, bandwidth: 9
months, and CPU compute capacity: 18
months >>> what law is this?
 Moore’s Law : indicates that Processor

Speed Doubles every 18 months.


 Gilder’s Law: indicates that network

bandwidth has doubled each year


COURSE OUTLINES
• Computing overview
• Introduction to cloud computing.
• Trends in Computing.
• Cloud Computing Principles.
• Service models (XaaS).
• Deployment Models and Data center network
architecture.
• Virtualization.
• Service management in cloud computing.
•Service Level Agreements(SLAs).

•Data Center Network.

• Resource management in cloud computing.


• Data management in cloud computing.
• Cloud Security.
• Fog computing.
• Mobile computing.
REFERENCES
 Introduction to cloud computing: NPTEL online certification
course.
 Cloud Computing and Distributed Systems: NPTEL online
certification course.
 NETS 212: Scalable and Cloud Computing: University of
Pennsylvania Distributed and Cloud Computing. “courses”
 From Parallel Processing to the Internet of Things: Kai
Hwang Geoffrey C. Fox Jack J. Dongarra. “text book”
 Distributed Computing Principles, Algorithms, and
Systems, Ajay D. Kshemkalyani University of Illinois at
Chicago, Chicago and Mukesh Singhal University of
Kentucky, Lexington “text book”

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