Chapter 3 Processor Management (Updated)
Chapter 3 Processor Management (Updated)
Chapter 3
Processor
Management
3.1. How Does Processor Manager
Allocate CPU(s) to Jobs?
• Process Manager performs job scheduling,
process scheduling and interrupt
management.
• In single-user systems, processor is busy only
when user is executing a job—at all other times it
is idle.
– Processor management is simple.
• In multiprogramming environment, processor
must be allocated
⮚ Requires to each
scheduling job (code/data) in a fair
policy
and efficient vs
(preemptive manner.
non-preemptive) and a
scheduling algorithm (FCFS, SRTF
….)
⮚ Execution of > 1 program. CPU switching
rapidly between them.
⮚ Pre-condition: sufficient memory!
• Active multiprogramming is a time-
sharing (multi tasking) system which
allows each program to use a preset
slice of each CPU time. When the time
expires, the job is interrupted and
another job is allowed to begin. J1 C
J2
– More control over interrupts, ⇧ CPU utilization.
– With preemption, context switching happen
• Passive multiprogramming allows
each program to be serviced in turn,
one after another by an interrupt. It ties
up CPU time while all other jobs have to
wait. …J4, J3, J2 J1C
• Without preemption
State diagram with boundaries between program, job and process
2.2. Job Scheduling vs. Process
Scheduling
• Process Scheduler
– in charge of process scheduling.
1. Job Scheduler New/ Ready
Hold
•High-level / long term scheduler.
•Selects jobs from a queue of incoming jobs.
•Places them in ready queue (batch or
interactive), based on each job’s
characteristics.
•Goal is to put jobs in a sequence that uses
all system’s resources as fully as possible.
•Provide a balanced mix of jobs.
🡪I/O bound vs processor bound)
•Tries to keep most system components
busy most of time.
🡪controls the degree of multiprogramming
2. Process SchedulerReady Runni
ng
• Low-level scheduler / dispatcher – assigns
the CPU to execute processes of those jobs
placed on ready queue by Job Scheduler.
• After a job has been placed on the READY
queue by Job Scheduler, Process Scheduler
that takes over.
▪ Determines which process will get CPU,
when, and for how long.
▪ Decides when processing should be
interrupted.
▪ Determines queues process should be
moved to during execution.
▪ Recognizes when a process has concluded
and should be terminated.
CPU Cycles and I/O Cycles
• To schedule CPU, Process Scheduler uses
common trait among most computer programs:
they alternate between CPU cycles and I/O
cycles.
• I/O-bound jobs (such as printing a series
of documents) have many brief CPU cycles
and long I/O cycles.
• CPU-bound jobs (such as finding the first
300 prime numbers) have long CPU cycles
and shorter I/O cycles.
I/O-bound CPU-bound
process
I/O Module process
Computation
I/O Module Computation
I/O Module Computation
I/O Module Computation
I/O Module Computation
I/O Module Computation
Computation I/O Module
I/O Module Computation
I/O Module Computation
I/O Module Computation
I/O Module Computation
I/O Module Computation
Computation Computation
I/O Module
pg3
3. Middle-Level Scheduler
•In a highly interactive environment there’s a
third layer. E.g.. Time sharing environment.
– called swapper.
MP4 MSN
M.Playe
MS Faceboo
Word
r k
Middle-Level
Scheduler
Swapped out
processes Sw
in
ou ap
ap
t
Sw Ready En
Disk Queue CPU
Job d
Process
Scheduler Scheduler
I/O waiting
I/O Queue
• Purpose of swapping.
– To reduce the degree of
multiprogramming
– To improve the process Mix – jobs completed
faster.
Problem is Thrashing
− Happen when a process is busy swapping
pages in and out.
− if there is not 'sufficient' physical memory . The page-
fault rate is high. This leads to low CPU utilization
Thrashing
CPU
Utilization
Degree of
Multiprogramming
2.3. Process State Diagram
(Memory)
Process Scheduling Queues
Queue
Header P1 P2 Pn
Head
PCB1 PCB2 PCBn
Tail
Process State Diagram
New/
Hold Interrupt Finish
Admitted Exit
Ready Runni
ng
Scheduler
I/O I/O or
dispatch
Completion event wait
Waitin
g
pg5
2.4. Interrupt Types
– Page interrupt (memory manager)
⮚ Accommodate job requests
– Time quantum expiration interrupt
– I/O interrupt
⮚ Result when a READ or WRITE command is
issued
– Internal interrupt (synchronous interrupt)
⮚ Result from arithmetic operation or job
instruction
– Illegal arithmetic operation interrupt
⮚ Dividing by zero; bad floating-point operation
generating an overflow or underflow
23
• Interrupt Types (continued)
– Illegal job instruction interrupt
⮚ Protected or non-existent storage access
attempt
⮚ Attempts to make system changes, such as trying to
change the size of the time quantum.
Interrupt handler
– Control program
• Handles interruption event sequence
24
• Interrupt handler sequence is as follows: pg5
A B C D E
0 8 13 16 17 24
a. First Come First Serve (FCFS)
Scheduling
The Timeline / Gantt Chart for the schedule is:
A B C D E
0 8 13 16 17 24
A D C B E
0 8 9 12 17 24
c. Shortest Remaining Time First
(preemptive)
Process Arrival Time CPU Cycle
A 0 8
B 1 70
5 40
C 2 20 3
D 3 10
E 4 0
7
A B C D C B A E
0 1 2 3 4 6 10 17 24
Shortest
ProcessRemaining Time
Arrival Time CPU Cycle
(preemptive)
A 0 3
B 1 210
5 0
C 2 20 3
D 3 10
E 5 0
1
AA A D C E C B
0 1 2 3 4 5 6 8 13
Shortest Remaining Time
(preemptive)
Process Arrival Time CPU Cycle
A 0 3
B 1 5
C 2 3
D 3 1
E 5 1
A D C E C B
0 1 2 3 4 5 6 8 13
d. Round Robin (Preemption)
• Run process for 1 time slice, then move to
back of queue. Each process gets equal share
of the CPU
• Interactive systems
(Time Quantum = 3)
Process Arrival Time CPU Cycle
A 0 8520
B 1 5 20
C 2 30
D 3 10
E 4 7 4 10
A B C D A E B A E E
0 3 6 9 10 13 16 18 20 23 24
Ready Queue
B C D A E B A E E
1 2 3 4 6 13 16 23
Round Robin (Preemption)
A 0 8
B 0 5
C 2 3
D 3 1
E 4 7
(Time Quantum = 3)
Process Arrival Time CPU Cycle
A 0 8520
B 0 5 20
C 2 30
D 3 10
E 4 7 4 10
A B C D A E B A E E
0 3 6 9 10 13 16 18 20 23 24
Ready Queue
B C D A E B A E E
0 2 3 4 6 13 16 23
Process Arrival Time Burst Time
P1 0 10
P2 0 4
Quantum = 12
P1 P2
0 10 14
Quantum = 6
P1 P2 P1
0 6 10 14
Quantum = 2
P1 P2 P1 P2 P1 P1 P1
0 2 4 6 8 10 12 14
e. Non-Preemptive Priority
Process Arrival Time Burst Time Priority
P1 0.0 7 9
P2 2.0 4 10
P3 2.0 1 9
P4 5.0 4 11
Assume a larger number implies a higher priority
P1 P4 P2 P3
0 7 11 15 16
f. Preemptive Priority
Process Arrival Time Burst Time Priority
P1 0.0 7 50 9
P2 2.0 4 10 10
P3 2.0 10 9
P4 5.0 40 11
Assume a larger number implies a higher priority
P1 P2 P4 P2 P3 P1
0 2 5 9 10 11 16
Do you agree that round robin
algorithm is the best algorithm
for interactive system? State
TWO (2) reasons to support your
answer.
• Yes. It provides reasonable response
times to interactive users.
• It provides fair CPU allocation.
Process Arrival Time CPU Cycle
A 0 6
B 1 7
C 3 4
D 4 2
E 7 1
F 8 6
1. Shortest Remaining Time First
2. Round Robin (Time Quantum = 3)