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AVR Lecture 2

The document provides an overview of the architecture of the ATmega328 microcontroller. It has 32K of flash program memory, 2K of SRAM data memory, and 1K of EEPROM. It features 3 timers, I/O ports that can be individually configured, and 32 general purpose 8-bit registers. Program code is stored in flash memory and executed by the CPU, while temporary data is stored in SRAM. The microcontroller supports various addressing modes to access different types of memory and registers.

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29 views23 pages

AVR Lecture 2

The document provides an overview of the architecture of the ATmega328 microcontroller. It has 32K of flash program memory, 2K of SRAM data memory, and 1K of EEPROM. It features 3 timers, I/O ports that can be individually configured, and 32 general purpose 8-bit registers. Program code is stored in flash memory and executed by the CPU, while temporary data is stored in SRAM. The microcontroller supports various addressing modes to access different types of memory and registers.

Uploaded by

معتز العجيلي
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Introduction to the

ATmega328
AVR Architecture
AVR Architecture
- Clocks and Power
AVR Architecture
- CPU
AVR Architecture

- Harvard architecture
- Flash – program memory
-> 32K
- SRAM – data memory
-> 2K
- EEPROM
-> For long-term data
-> On I/O data bus
Memory

Flash (32K) (15-bit addresses)


 Program memory – read only
 Non-volatile
 Allocate data to Flash using PROGMEM keyword

SRAM (2K)
 Temporary values, stack, etc.
 Volatile
 Limited space!

EEPROM (1K)
 Long-term data
AVR Architecture

- Three timers
- Very flexible
- Choose clock rate
- Choose “roll-over” value
- Generate interrupts
- Generate PWM signals
- (represent 8-bit value with
using a clock signal)
AVR Architecture
- Interface to pins
- Each pin directly
programmable
-> Program direction
-> Program value
-> Program pull-ups
- Some pins are special
-> Analog vs. Digital
-> Clocks
-> Reset
I/O Ports

- 3 8-bit Ports (B, C, D)


- Each port controlled by 3 8-bit registers
-> Each bit controls one I/O pin
-> DDRx – Direction register
-> Defines whether a pin is an input (0) or and output (1)
-> PINx – Pin input value
-> Reading this “register” returns value of pin
-> PORTx – Pin output value
-> Writing this register sets value of pin
AVR CPU
- Instruction Fetch
and Decode
AVR CPU
- ALU Instructions
AVR CPU
- I/O and special
functions
AVR Register File
- 32 8-bit GP registers
- Part of SRAM memory space

AVR CPU General Purpose Working registers


Special Addressing Registers
- X, Y and Z registers
- 16-bit registers made using registers 26 – 31
- Support indirect addressing

The X, Y and Z Registers


AVR Memory
- Program memory – Flash
- Data memory - SRAM
Addressing Modes
- Direct register
addressing
Addressing Modes
- Direct I/O addressing
Addressing Modes
- Direct data memory addressing
Addressing Modes
- Direct data memory with displacement addressing
Addressing Modes
- Indirect data memory addressing
Addressing Modes
- Indirect data memory addressing with pre-decrement
Addressing Modes
- Indirect data memory addressing with post-increment
Addressing Modes
- Program memory addressing (constant data)

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