DIGITAL TO

ANALOG

DONE BY: SATHVIK :421252

Used for finding frequency of the

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SYSTEM OVERVIEW
The ADC captures analog signals by sampling them
at specific intervals, converting these continuous
signals into discrete digital values. The digital data
is then processed, potentially filtered, and finally
converted back to analog form for output. This
process allows for the interfacing between digital
systems and the analog world, enabling
measurement, control, and processing of real-world
analog phenomena within a digital environment.

The specifics of ADC operation and data handling

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 HARDWARE
COMPONENTS
8086 Microprocessor:
• The central processing unit responsible for executing instructions and
controlling the system.
•8253A Programmable Interval Timer (PIT):
• Used for generating accurate time delays and generating clock signals.
•8255A Programmable Peripheral Interface (PPI):
• Provides parallel I/O ports which can be programmed for input or output
operations.
•74154 4-to-16 Line Decoder/Demultiplexer:
• Used to decode input signals into one of sixteen outputs.
•74273 Octal D-type Flip-Flop:
• Contains eight D-type flip-flops used for storing data or as temporary
storage.
•74125 Quad 3-State Buffer/Line Driver:
• Acts as a buffer to control data flow in a bus-based system.
•ADC0804 Analog to Digital Converter (ADC):
• Converts analog signals to digital data for processing by the 8086.
•DAC0830 Digital to Analog Converter (DAC):
• Converts digital data from the 8086 to analog signals.
•Logic Gates (NOT, OR):
• Perform logical operations on digital signals.
•Summer (analog adder/mixer):
• Combines multiple analog signals into a single output, often used for
signal processing.

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 CONNECTING THE 8086 WITH DAC0830:
D ATA L I N E S :
• The 8086 communicates with the DAC0830 through its data bus. For instance, the 8-bit data bus of the 8086 (D0-D7) can be connected to the input data lines
(DB0-DB7) of the DAC0830.
• CONTROL SIGNALS:
• The 8086 provides control signals to the DAC0830. This includes the Chip Select (CS), Read/Write (R/W), and Address (Address lines if multiple devices are
connected) signals.
• TIMING AND CLOCK:
• The DAC0830 might require timing signals or a clock to synchronize the data transfer. The 8086 or an external clock source can provide these signals.
• OUTPUT:
• The DAC0830 generates analog signals based on the digital data received from the 8086. The analog output pins (typically Vout) of the DAC0830 are used to
provide the converted analog signal.
• R E F E R E N C E V O LTA G E :
• The DAC0830 might require a reference voltage for its operation. The 8086 or an external reference voltage source supplies this voltage to the DAC.
Data Conversion Process:
D ATA T R A N S F E R :
• The 8086 sends digital data (in binary format) to the DAC0830 through the data lines. For instance, an 8-bit digital value is sent from the 8086 to the DAC.
• D I G I TA L T O A N A L O G C O N V E R S I O N :
• The DAC0830 converts the received digital data into a corresponding analog voltage output. The specific digital input value determines the analog output voltage
level.
• ANALOG OUTPUT:
• The converted analog signal is available at the output pins of the DAC0830. This analog signal can be used for various purposes such as controlling analog
devices, generating sound, or representing physical quantities.

T H E 8 0 8 6 M I C R O P R O C E S S O R S E N D S D I G I TA L D ATA R E P R E S E N T I N G S O U N D S A M P L E S T H R O U G H I T S D ATA B U S T O
T H E D A C 0 8 3 0 . T H E D A C C O N V E RT S T H I S D I G I TA L S O U N D D ATA I N T O A N A N A L O G S I G N A L , W H I C H C O U L D T H E N B E
F E D T O A N A M P L I F I E R O R S P E A K E R F O R A U D I O O U T P U T.
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 SOFTWARE
Data Segment
• ATIMER, DTIMER, DAC, AADC, IADC, A8255, B8255, C8255, D8255: These are variables stored in memory, likely representing addresses or configuration
values for different components or ports.
• Filtered: An array of bytes (150 elements) for storing filtered data.
• SAMPLING: Another array of bytes (150 elements) for storing sampled data.

Stack Segment
• STAK: Defines a segment for the stack with space allocated for 20 words.

Code Segment
• START PROC: This is the start of the main procedure.
• Initializes data segment (MOV AX, DATA and MOV DS, AX).
• Configures certain ports (OUT instructions) likely for communication or setting up the environment.
• Enters a loop (OKU) to sample data. The loop is time-sensitive and waits for certain conditions (T1 and T2) before reading ADC values and storing them in the SAMPLING
array.
• There's a delay subroutine DELAY that introduces a delay using a loop.
• Filters the sampled data using a simple algorithm by subtracting consecutive samples and then averaging them (FILTERING loop).
• Enters an endless loop to continuously output the filtered data (PRINT section).

Delay Procedure
DELAY is a subroutine used for introducing a delay in the program flow. It uses a loop ( L1) to create a delay.

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The assembly code provided appears to be a program written for a microcontroller or embedded system. It is structured into segments for code, data, and stack,
each designated for specific purposes. The code follows a structured flow, encompassing initialization, data acquisition, processing, and output phases.

The program initiates by setting up the data segment and configuring various ports or memory addresses. These configurations likely establish communication
pathways with external hardware components such as analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). This initialization phase is
crucial for the subsequent operations involving data acquisition and processing.

The core of the program lies within the START procedure, where the actual data acquisition begins. The code enters a loop named OKU, presumably responsible for
sampling data. Within this loop, there are conditional checks ( T1 and T2) that wait for specific conditions to be met before reading ADC values. These values are
then stored in the SAMPLING array, potentially representing analog data converted into digital format for further processing.

After sampling data, the program proceeds to a filtering phase ( FILTERING), aiming to refine the acquired data. This section subtracts consecutive samples and
performs a simple averaging operation on them, storing the filtered values in the Filtered array. This stage seems crucial for improving data quality or reducing
noise in the sampled information.

Following data processing, the program moves into an endless loop ( ENDLESS) where it continuously outputs the filtered data. This outputting process involves
certain checks (T3 and T4) to ensure readiness before sending the processed data to a DAC. The DAC likely converts digital signals back into analog form,
potentially for control or monitoring purposes of external devices or systems.

The overall program structure suggests a continuous data flow cycle: from initialization to sampling, processing, and outputting. This cyclic nature ensures a
steady stream of sampled, refined, and outputted data, which might be crucial for real-time monitoring, control, or interfacing with external hardware components.

This assembly code represents a structured flow of operations for handling data in an embedded system, orchestrating the interaction between digital and analog
components, although the specifics of the hardware interfacing and the exact purpose of this code remain implicit without further context or hardware
documentation.

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