Unit-1
Basic Structure of Computers: Computer Types, Functional Units, Basic
Operational Concepts, Bus Structures, Performance - Processor Clock,
Basic Performance Equation, Pipelining and Superscalar, Clock Rate,
Instruction set: CISC &RISC, Compiler, Performance Measurement,
Historical Perspective.
Machine Instructions and Programs: Numbers, Arithmetic Operations
and Characters, Memory Location and Addresses, Memory Operations,
Instructions and Instruction Sequencing, Addressing Modes, Assembly
Language, Basic Input and Output Operations, Stacks and Queues,
Subroutines, Additional Instructions, Encoding of Machine Instructions.
January 5, 2023 CSE, BMSCE 1
Topics Covered in Todays Class
Unit 1: Basic Structure of Computers: Computer
Types, Functional Units, Basic Operational Concepts,
Bus Structures, Performance - Processor Clock, Basic
Performance Equation, Pipelining and Superscalar,
Clock Rate, Instruction set: CISC &RISC, Compiler,
Performance Measurement, Historical Perspective.
January 5, 2023 CSE, BMSCE 2
A Computer
Computer is a “machine”
As long as power is supplied,
processor keeps executing
instructions
Stored program model
Sequential order of execution
Memory: Program and data storage
Disk: File storage (passive data
storage)
January 5, 2023 CSE, BMSCE 3
Computer Types
Desktop Computers
Notebook Computers
Workstations
Enterprise Systems
Server Systems
Super Computers
January 5, 2023 CSE, BMSCE 4
Computer Types
Desktop Computers
Laptops or Notebook Computers
January 5, 2023 CSE, BMSCE 5
Computer Types
Workstations
Enterprise Systems
January 5, 2023 CSE, BMSCE 6
Computer Types
Servers
Super Computers
January 5, 2023 CSE, BMSCE 7
Computer Types
January 5, 2023 CSE, BMSCE 8
Further reference
Go through the following ling to find out Top
ten super computers in the world
https://bitsandscrews.com/top-ten-fastest-
supercomputers-updated-list/
Top five super computers in India
https://besthip.in/supercomputers-india/
January 5, 2023 CSE, BMSCE 9
What is Computer?
A Computer is an electronic
machine that can solve different
problems, process data,
store & retrieve data and
perform calculations faster
and efficiently than humans
January 5, 2023 CSE, BMSCE 10
Functional Units
A computer consists of 5 functionally independent main
parts: 1) Input 2) Memory 3) ALU 4) Output & 5)
Control units
Arithmetic
Input and
logic
Memory
Output Control
I/O Processor
Basic functional units of a computer
January 5, 2023 CSE, BMSCE 11
Functional Units
1. Input Unit: Computer accepts encoded information through
input unit. The standard input device is a keyboard. Whenever a
key is pressed, keyboard controller sends the code to CPU/Memory.
Examples include Keyborad, Mouse, Joystick, Tracker ball, Light
pen, Digitizer, Scanner etc.
2. Output Unit: Computer after computation returns the
computed results, error messages, etc. via output unit. The
standard output device is a video monitor, LCD/TFT monitor. Other
output devices are printers, plotters etc.
January 5, 2023 CSE, BMSCE 12
Functional Units
3. Memory Unit: Memory unit stores the program
instructions (Code), data and results of computations etc.
Memory unit is classified as:
• Primary /Main Memory
• Secondary /Auxiliary Memory
Primary memory is a semiconductor memory that provides access at high speed.
Run time program instructions and operands are stored in the main memory. Main
memory is classified again as ROM and RAM. ROM holds system programs and
firmware routines such as BIOS, POST, I/O Drivers that are essential to manage the
hardware of a computer. RAM is termed as Read/Write memory or user memory that
holds run time program instruction and data. While primary storage is essential, it is
volatile in nature and expensive. Additional requirement of memory could be supplied
as auxiliary memory at cheaper cost. Secondary memories are non volatile in
nature.
January 5, 2023 CSE, BMSCE 13
Functional Units
4. Arithmetic and logic unit: ALU consist of necessary logic circuits like
adder, comparator etc., to perform operations of addition, multiplication,
comparison of two numbers etc.
5. Control Unit: Control unit co-ordinates activities of all units by issuing
control signals. Control signals issued by control unit govern the data
transfers and then appropriate operations take place. Control unit interprets
or decides the operation/action to be performed.
The control Unit and the Arithmetic and Logic unit of a computer system are
jointly known as the Central Processing Unit (CPU).
Processor Control Unit
January 5, 2023 CSE, BMSCE 14
Bus Structure
There are many ways to connect different parts
inside a computer together.
A group of lines that serves as a connecting
path for several devices is called a bus.
Address/data/control
Input Output Memory Processor
Single-bus structure.
January 5, 2023 CSE, BMSCE 15
Bus Structure
Input Output Memory Processor
Single-bus structure.
January 5, 2023 CSE, BMSCE 16
Illustration of the steps taken by the CPU to execute an instruction
that adds two numbers. The instruction is: R = X + Y.
January 5, 2023 CSE, BMSCE 17
Software Abstraction
January 5, 2023 CSE, BMSCE 18
Hardware / Software Interface
January 5, 2023 CSE, BMSCE 19
BASIC OPERATIONAL CONCEPTS
An Instruction consists of 2 parts,
1)Operation code (Opcode) and
2)Operands.
OPCODE OPERANDS
• The data/operands are stored in memory.
• The individual instructions are brought from the
memory to the processor.
• Then, the processor performs the specified
operation
January 5, 2023 CSE, BMSCE 20
BASIC OPERATIONAL CONCEPTS
Let us see a typical instruction
ADD LOCA, R0
This instruction is an addition operation.
The following are the steps to execute the
instruction:
Step 1: Fetch the instruction from main-memory
into the processor.
Step 2: Fetch the operand at location LOCA from
main-memory into the processor.
Step 3: Add the memory operand (i.e. fetched
contents of LOCA) to the contents of register R0.
Step 4: Store the result (sum) in R0.
January 5, 2023 CSE, BMSCE 21
BASIC OPERATIONAL CONCEPTS
Let us see a typical instruction
ADD LOCA, R0
This instruction is an addition operation.
The following are the steps to execute the instruction:
Step 1: Fetch the instruction from main-memory into the processor.
Step 2: Fetch the operand at location LOCA from main-memory into the processor.
Step 3: Add the memory operand (i.e. fetched contents of LOCA) to the contents
of register R0.
Step 4: Store the result (sum) in R0.
The same instruction can be realized using 2 instructions as:
Load LOCA, R1
Add R1, R0
The following are the steps to execute the instruction:
Step 1: Fetch the instruction from main-memory into the processor.
Step 2: Fetch the operand at location LOCA from main-memory into the register
R1.
Step 3: Add the content of Register R1 and the contents of register R0.
Step 4: Store the result (sum) in R0.
January 5, 2023 CSE, BMSCE 22
BASIC OPERATIONAL CONCEPTS
IR: Instruction-Register
Memory PC: Program Counter
MAR: Memory Address R
MDR: Memory Data Regi
MAR MDR
Control
PC R0
R1
Processor
IR
ALU
R
n- 1
n general purpose
registers
Connection Between the Processor and the Memory
January 5, 2023 CSE, BMSCE 23
BASIC OPERATIONAL CONCEPTS
The processor contains ALU, control-circuitry and many registers.
The processor contains “n‟ general-purpose registers R0 through Rn-1.
The IR holds the instruction that is currently being executed.
The control-unit generates the timing-signals that determine when a
given action is to take place.
The PC contains the memory-address of the next-instruction to be
fetched & executed.
During the execution of an instruction, the contents of PC are updated
to point to next instruction.
The MAR holds the address of the memory-location to be accessed.
The MDR contains the data to be written into or read out of the
addressed location.
MAR and MDR facilitates the communication with memory.
IR: Instruction-Register
PC: Program Counter
MAR: Memory Address Register
MDR: Memory Data Register
January 5, 2023 CSE, BMSCE 24
BASIC OPERATIONAL CONCEPTS
STEPS TO EXECUTE AN INSTRUCTION
1)The address of first instruction (to be executed) gets loaded into PC.
2)The contents of PC (i.e. address) are transferred to the MAR & control-unit
issues Read signal to memory.
3)After certain amount of elapsed time, the first instruction is read out of
memory and placed into MDR.
4)Next, the contents of MDR are transferred to IR. At this point, the instruction
can be decoded & executed.
5)To fetch an operand, it's address is placed into MAR & control-unit issues
Read signal. As a result, the operand is transferred from memory into MDR,
and then it is transferred from MDR to ALU.
6)Likewise required number of operands is fetched into processor.
7)Finally, ALU performs the desired operation.
8)If the result of this operation is to be stored in the memory, then the result
is sent to the MDR.
9)The address of the location where the result is to be stored is sent to the
MAR and a Write cycle is initiated.
10)At some point during execution, contents of PC are incremented to point to
next instruction in the program.
January 5, 2023 CSE, BMSCE 25
WHAT STEPS NEED TO BE CARRIED OUT
TO EXECUTE AN INSTRUCTION
Let us see a typical instruction
ADD LOCA, R0
January 5, 2023 CSE, BMSCE 26
Question
List the steps needed to execute the
machine instruction:
ADD LOCA, R0
in terms of transfers between the
components of processor and some
simple control commands. Assume that
the address of the memory-location
containing this instruction is initially in
register PC.
January 5, 2023 CSE, BMSCE 27
Solution
1. Transfer the contents of register PC to register MAR.
2. Issue a Read command to memory. And, then wait until it
has transferred the requested word into register MDR.
3. Transfer the instruction from MDR into IR and decode it.
4. Transfer the address LOCA from IR to MAR.
5. Issue a Read command and wait until MDR is loaded.
6. Transfer contents of MDR to the ALU.
7. Transfer contents of R0 to the ALU.
8. Perform addition of the two operands in the ALU and
transfer result into R0.
9. Transfer contents of PC to ALU.
10. Add 1 to operand in ALU and transfer incremented
address to PC.
January 5, 2023 CSE, BMSCE 28
Question
List the steps needed to execute the
machine instruction:
ADD R0, LOCA
in terms of transfers between the
components of processor and some
simple control commands. Assume that
the address of the memory-location
containing this instruction is initially in
register PC.
January 5, 2023 CSE, BMSCE 29
Question
List the steps needed to execute the
machine instruction:
Add R4, R2, R3
in terms of transfers between the
components of processor and some
simple control commands. Assume that
the address of the memory-location
containing this instruction is initially in
register PC.
January 5, 2023 CSE, BMSCE 30
Solution
1. Transfer the contents of register PC to register MAR.
2. Issue a Read command to memory. And, then wait until it
has transferred the requested word into register MDR.
3. Transfer the instruction from MDR into IR and decode it.
4. Transfer contents of R1 and R2 to the ALU.
5. Perform addition of two operands in the ALU and transfer
answer into R3.
6. Transfer contents of PC to ALU.
7. Add 1 to operand in ALU and transfer incremented
address to PC.
January 5, 2023 CSE, BMSCE 31
Question
(a) Give a short sequence of machine instructions for the task “Add the contents of
memory-location A to those of location B, and place the answer in location C”.
Instructions:
Load Ri, LOC
and
Store Ri, LOC
are the only instructions available to transfer data between memory and the general
purpose registers. Add instructions of type ADD LOCA, R0 and Add R1, R0 are
available. Do not change contents of either location A or B.
(b) Suppose that Move and Add instructions are available with the formats:
Move Location1, Location2
and
Add Location1, Location2
These instructions move or add a copy of the operand at the second location to the
first location, overwriting the original operand at the first location. Either or both of
the operands can be in the memory or the general-purpose registers.
Is it possible to use fewer instructions of these types to accomplish the task in part
(a)? If yes, give the sequence.
January 5, 2023 CSE, BMSCE 32
Question
(a) Give a short sequence of machine instructions for the task “Add the
contents of memory-location A to those of location B, and place the answer
in location C”. Instructions:
Load Ri, LOC
and
Store Ri, LOC
are the only instructions available to transfer data between memory and the
general purpose registers. Add instructions of type ADD LOCA, R0 and Add
R1, R0 are available. Do not change contents of either location A or B.
January 5, 2023 CSE, BMSCE 33
Answer
(a) Give a short sequence of machine instructions for the task “Add the contents of
memory-location A to those of location B, and place the answer in location C”.
Instructions:
Load LOC, Ri
and
Store LOC, Ri
are the only instructions available to transfer data between memory and the general
purpose registers. Add instructions of type ADD LOCA, R0 and Add R1, R0 are
available. Do not change contents of either location A or B.
Solution:
(a)
Load A, R0
Load B, R1
Add R0, R1
Store R1, C
January 5, 2023 CSE, BMSCE 34
Question
(b) Suppose that Move and Add instructions are available with the formats:
Move Location1, Location2
and
Add Location1, Location2
These instructions move or add a copy of the operand at the second
location to the first location, overwriting the original operand at the first
location. Either or both of the operands can be in the memory or the
general-purpose registers.
Is it possible to use fewer instructions of these types to accomplish the task
in part (a)? If yes, give the sequence.
January 5, 2023 CSE, BMSCE 35
Answer
(b) Suppose that Move and Add instructions are available with the formats:
Move Location1, Location2
and
Add Location1, Location2
These instructions move or add a copy of the operand at the second
location to the first location, overwriting the original operand at the first
location. Either or both of the operands can be in the memory or the
general-purpose registers.
Is it possible to use fewer instructions of these types to accomplish the task
in part (a)? If yes, give the sequence.
Solution:
(b) Yes;
Move B, C
Add A, C
January 5, 2023 CSE, BMSCE 36
Further Reference
Watch this video
https://www.youtube.com/watch?v=FRCXF1Sak7s
January 5, 2023 CSE, BMSCE 37
Test Your Knowledge
W.r.t Computer Processor,
What is the role of MAR and MDR ?
What is a bus ?
What is the role of PC?
January 5, 2023 CSE, BMSCE 38
Test Your Knowledge
What is the role of MAR and MDR?
The MAR (Memory Address Register) is used to hold the address
of the location to or from which data are to be transferred and the
MDR (Memory Data Register) contains the data to be written into
or read out of the addressed location.
What is a bus?
A collection of wires that connects several devices is called a bus.
What is the role of PC?
The Central Processing Unit (CPU) contains a register called the
Program Counter (PC), which holds the address of instruction to be
executed next.. to begin the execution of the program the address
of its First instruction must be placed into the PC.
January 5, 2023 CSE, BMSCE 39
Test Your Knowledge
W.r.t to Computers, Bus consists of
a.Wires
b.Transistors
c.Capacitors
d.None of these
January 5, 2023 CSE, BMSCE 40
Test Your Knowledge
W.r.t to Computers, Bus consists of
a.Wires
b.Transistors
c.Capacitors
d.None of these
January 5, 2023 CSE, BMSCE 41
Test Your Knowledge
________ contains the memory
address of the next instruction to
be fetched and executed.
a. Memory Address Register
b. Memory Data Register
c. Instruction Register
d. Program Counter
January 5, 2023 CSE, BMSCE 42
Test Your Knowledge
________ contains the memory
address of the next instruction to
be fetched and executed.
a. Memory Address Register
b. Memory Data Register
c. Instruction Register
d. Program Counter
January 5, 2023 CSE, BMSCE 43
Test Your Knowledge
_________ holds the instruction that
is currently being executed.
a. Memory Address Register
b. Memory Data Register
c. Instruction Register
d. Program Counter
January 5, 2023 CSE, BMSCE 44
Test Your Knowledge
_________ holds the instruction that
is currently being executed.
a. Memory Address Register
b. Memory Data Register
c. Instruction Register
d. Program Counter
January 5, 2023 CSE, BMSCE 45
Test Your Knowledge
A program needs to load a value X from memory
address Y. It should
a.Put Y in the Program Counter (PC)
b.Put Y in the Memory Address Register (MAR)
c.Put Y in the Instruction Register (IR)
d.Put Y in the Memory Data Register (MDR)
January 5, 2023 CSE, BMSCE 46
Test Your Knowledge
A program needs to load a value X from memory
address Y. It should
a.Put Y in the Program Counter (PC)
b.Put Y in the Memory Address Register (MAR)
c.Put Y in the Instruction Register (IR)
d.Put Y in the Memory Data Register (MDR)
January 5, 2023 CSE, BMSCE 47
Test Your Knowledge
A program needs to store a value X at
memory address Y. It should
a.Put X in the MAR and Y in the MDR
b.Put Y in the PC and X in the MDR
c.Put X in the MDR and Y in the MAR
d.Put X in the IR and Y in the MBR
January 5, 2023 CSE, BMSCE 48
Test Your Knowledge
A program needs to store a value X at
memory address Y. It should
a.Put X in the MAR and Y in the MDR
b.Put Y in the PC and X in the MDR
c.Put X in the MDR and Y in the MAR
d.Put X in the IR and Y in the MBR
January 5, 2023 CSE, BMSCE 49
Performance
January 5, 2023 CSE, BMSCE 50
Processor Clock
The clock speed or operating frequency usually
measured in hertz is the fundamental rate in cycles
per second, at which a computer performs its most
basic operations.
January 5, 2023 CSE, BMSCE 51
Motherboard –Circuit Diagram
Every computer has the “clock generator” to generate clock signals used
throughout the system. Timing in a computer system is critical, particularly
to synchronize the activities within the various chips. To do this, a crystal is used.
Clock Crystal
January 5, 2023 CSE, BMSCE 52
Clock
January 5, 2023 CSE, BMSCE 53
Processor Clock
Processor circuits are controlled by a timing signal called a Clock.
The clock defines regular time intervals called Clock Cycles.
To execute a machine instruction, the processor divides the action to
be performed into a sequence of basic steps such that each step can
be completed in one clock cycle.
Let P = Length of one clock cycle, R = Clock rate.
Relation between P and R is given by R=(1/P)
R is measured in cycles per second.
Cycles per second is also called Hertz (Hz)
Clcok cycles measure the execution of instructions
Time
January 5, 2023 CSE, BMSCE 54
Dummy Example to understand Clock timing Signal
Question: From the above diagram find out,
how clocks cycles has been used to fry the egg ?
January 5, 2023 CSE, BMSCE 55
Clock Speed or Clock Rate
The higher the clock speed a CPU
has, the faster it can process
instructions.
January 5, 2023 CSE, BMSCE 56
BASIC PERFORMANCE EQUATION
T – processor time required to execute a program that
has been prepared in high-level language
N – number of actual machine language instructions
needed to complete the execution (note: loop)
S – average number of basic steps needed to execute
one machine instruction. Each step completes in one
clock cycle
R – clock rate
Note: these are not independent to each other
N S
T
R
How to improve T ?
January 5, 2023 CSE, BMSCE 57
BASIC PERFORMANCE EQUATION
N S
T
R
January 5, 2023 CSE, BMSCE 58
Question
T – processor time required to execute a program that has
been prepared in high-level language
N S
T N – number of actual machine language instructions
needed to complete the execution (note: loop)
R
S – average number of basic steps needed to execute
one machine instruction. Each step completes in one clock cycle
R – clock rate
January 5, 2023 CSE, BMSCE 59
Solution
January 5, 2023 CSE, BMSCE 60
Question
A program contains 1000 instructions.
Out of that 25% instructions requires 4
clock cycles,40% instructions requires 5
clock cycles and remaining require 3
clock cycles for execution. Find the total
time required to execute the program
running in a 1 GHz machine.
January 5, 2023 CSE, BMSCE 61
Solution
A program contains 1000 instructions. Out of that 25%
instructions requires 4 clock cycles,40% instructions
requires 5 clock cycles and remaining require 3 clock cycles
for execution. Find the total time required to execute the
program running in a 1 GHz machine.
January 5, 2023 CSE, BMSCE 62
Increasing Clock Rate
January 5, 2023 CSE, BMSCE 63
Performance measurement
January 5, 2023 CSE, BMSCE 64
Pipeline and Superscalar Operation
Instructions are not necessarily executed one
after another.
The value of S doesn’t have to be the number
of clock cycles to execute one instruction.
Pipelining – overlapping the execution of
successive instructions.
Superscalar operation – multiple instruction
pipelines are implemented in the processor.
Goal – reduce S (could become <1!)
N S
T
R
January 5, 2023 CSE, BMSCE 65
CISC vs RISC
January 5, 2023 CSE, BMSCE 66
CISC and RISC
Tradeoff between N and S
A key consideration is the use of pipelining
S is close to 1 even though the number of basic steps per
instruction may be considerably larger
It is much easier to implement efficient pipelining in processor with
simple instruction sets
Reduced Instruction Set Computers (RISC)
– Large N, small S
Complex Instruction Set Computers (CISC)
– Small N, large S
N S
T
R
January 5, 2023 CSE, BMSCE 67
Compiler
A compiler translates a high-level language
program into a sequence of machine
instructions.
To reduce N, we need a suitable machine
instruction set and a compiler that makes good
use of it.
Goal – reduce N×S
A compiler may not be designed for a specific
processor; however, a high-quality compiler is
usually designed for, and with, a specific
processor.
January 5, 2023 CSE, BMSCE 68
Historical Perspective: Generation of Computers
January 5, 2023 CSE, BMSCE 69
Historical Perspective: Generation of Computers
January 5, 2023 CSE, BMSCE 70
Thanks for Listening
END of Unit-1 : Part1
January 5, 2023 CSE, BMSCE 71
To Do
For RISC machine, the effective value of S is 1.25
and average value of N is 200. If the clock rate is
500MHz, calculate the total program execution
time.
Execution time T=(N * S)/R
Given N=200, S=1.25, R=500MHz
Therefore T=0.5 micro secs or 500nsecs
January 5, 2023 CSE, BMSCE 72
To Do
January 5, 2023 CSE, BMSCE 73
To Do
January 5, 2023 CSE, BMSCE 74
Instruction Set: CISC and RISC
Reduced Instruction Set Computers (RISC)
Complex Instruction Set Computers (CISC)
January 5, 2023 CSE, BMSCE 75
Current Market Scenario related to Clock rate
The clock rate of the first generation of
computers was measured in hertz or kilohertz
(kHz), but in the 21st century the speed of
modern CPUs is commonly advertised in
gigahertz (GHz)
Processor Production Clock rate
Date
Intel Core i7 2011-present 3.0 GHz -
4.0 GHz
Intel Core i9 2017 to present 2.90 GHz- 4.30
GHz
January 5, 2023 CSE, BMSCE 76
Example to show the difference in efficient
implementation
For Computing Greatest Common Divisor of Two
non-negeative, not-both zero Integers
gcd(m, n): the largest integer that divides both
m and n
01/05/23 77
Method 1: Greatest Common Divisor
(Euclid’s Algorithm), gcd(m, n)
Step 1: If n = 0, return value of m
as the answer and stop; otherwise,
proceed to Step 2.
Step 2: Divide m by n and assign the
value of the remainder to r.
Step 3: Assign the value of n to m
and the value of r to n. Go to Step 1.
01/05/23 78
Method 2: Consecutive Integer Checking,
gcd(m, n)
Step 1: Assign the value of min{m, n} to q.
Step 2: Divide m by q. If the remainder is 0,
go to Step 3; otherwise, go to Step 4.
Step 3: Divide n by q. If the remainder is 0,
return the value of q as the answer and stop;
otherwise, proceed to Step 4.
Step 4: Decrease the value of q by 1. Go to
Step 2.
01/05/23 79
C++ Program - Analysis of the methods to find the GCD of two numbers
#include<iostream.h>
#include<conio.h>
#include<time.h>
long int euclid(long int m,long int n)
{
clock_t start,end;
start=clock();
long int r;
while(n!=0)
{
r=m%n;
m=n;
n=r;
}
end=clock();
cout<<endl<<"Time
taken:"<<(end-start)/CLK_TCK<<" sec";
return m;
}
January 5, 2023 CSE, BMSCE 80
C++ Program - Analysis of the methods to find the GCD of two numbers
long int con(long int m,long int n) if(r==0)
{ {
clock_t start,end; r=n%t;
start=clock(); if(r==0)
long int t,r,g; g=t;
if(m>n) else
{ t=n; } {
else t--;
{ t=m; } goto a;
}
a:do }
{ end=clock();
r=m%t; cout<<"Time taken :"<<(end-
if(r!=0) start)/CLK_TCK<<" sec";
t--; return g;
} while(r!=0); } /*End of the function con*/
January 5, 2023 CSE, BMSCE 81
C++ Program - Analysis of the methods to find the GCD of two numbers
void main()
{
long int x,y;
clrscr();
cout<<"\t\t\tANALYSIS OF THE TWO ALGORITHMS"<<endl<<endl;
cout<<"GCD - EUCLID'S ALG : "<<endl;
cout<<"enter two numbers:";
cin>>x>>y;
cout<<endl<<endl<<"GCD : "<<euclid(x,y);
cout<<endl<<endl<<"------------------------------------------------";
cout<<endl<<endl<<"GCD - CONSECUTIVE INTEGER CHECKING ALG :
"<<endl<<endl;
cout<<endl<<endl<<"GCD : "<<con(x,y);
getch();
}
January 5, 2023 CSE, BMSCE 82
ANALYSIS OF THE TWO LGORITHMS
GCD - EUCLID'S ALG :
enter two numbers:7896543 345678
Time taken: 0.08 millisecond
GCD : 3
------------------------------------------------
GCD - CONSECUTIVE INTEGER CHECKING ALG :
Time taken :0.55 millisecond
GCD : 3
INFERENCE:
The euclid’s method takes less time than the consecutive integer
checking method and hence euclid’s method is better.
January 5, 2023 CSE, BMSCE 83
Further Reference
https://www.trustedreviews.com/
best/best-intel-processor-3517396
January 5, 2023 CSE, BMSCE 84
See How Computers Add Numbers In One
Lesson
https://www.youtube.com/watch?
v=VBDoT8o4q00
January 5, 2023 CSE, BMSCE 85
Clock
January 5, 2023 CSE, BMSCE 86
January 5, 2023 CSE, BMSCE 87
Value SI symbol Name
103 Hz kHz kilohertz
106 Hz MHz megahertz
109 Hz GHz gigahertz
1012 Hz THz terahertz
January 5, 2023 CSE, BMSCE 88
https://www.bbc.com/education/guides/zws8d2p/revision/2
CPU speed
A computer’s speed is heavily
influenced by the CPU it uses. There
are three main factors that affect how
quickly a CPU can carry
out instructions:
clock speed
cores
cache
January 5, 2023 CSE, BMSCE 89
https://www.bbc.com/education/guides/zws8d2p/revision/2
January 5, 2023 CSE, BMSCE 90
January 5, 2023 CSE, BMSCE 91
January 5, 2023 CSE, BMSCE 92
January 5, 2023 CSE, BMSCE 93
January 5, 2023 CSE, BMSCE 94
January 5, 2023 CSE, BMSCE 95