Microprocessors & Microcontrollers

(EC T53)
 Course Outcome
Describe the architecture, Classify the Instruction set and implement
CO 1 algorithms using 8085

CO 2 Classify and Implement the interfacing of peripheral devices with 8085

Describe the architecture, Classify the Instruction set, implement

CO 3 algorithms using 8051 and compare with microprocessor.

Explore the architectures of 8086 with its instruction set and Compare it
CO 4 with advanced 16 bit Microprocessors

Understand and Develop 8051 based system by applying Assembly

CO 5 Language Programming.
 Unit- 3

Intel 8051 Microcontroller

 Unit – 3

Intel 8051 Microcontrollers

Microcontrollers Vs Microprocessors; 8051 Architecture -Instruction
set and programming; Special Function Registers, Hardware Features –
Parallel ports, Counters and Timers – Serial I/O– Interrupts.
Introduction to PIC16F877 Microcontroller- Architecture and features.
Introduction to ARM processor

Course Knowledge Course Outcome

Outcome Level

Describe the architecture, Classify the Instruction set,

CO3 K1, K2,K3 implement algorithms using 8051 and compare with
microprocessor.
Microprocessors Vs Microcontrollers
 Microprocessor Microcontroller

• CPU is stand-alone, RAM, • CPU, RAM, ROM, I/O a n d

ROM, I/O, timer are separate timer a re all on a single chip
• Designer can decide the amount • Fix amount of on-chip ROM,
of ROM, RAM and I/O ports RAM, I/O ports
• Expansive • For applicati ons in which cost,
power a n d s p a c e a re critical
• Versatility • Not Expansive
• General-purpose • S ingle -purpos e
8051 Applications
 Microcontroller Architecture
Memory
Address Bus 0
Program
CPU Data Bus + Von Neumann
Data
Architecture
2n

Memory
Address Bus 0
Program
CPU
Fetch Bus Harvard
Address Bus 0
Architecture
Data Bus Data
 Criteria for Choosing a Microcontroller

• Speed
• Packaging
• Power consumpti on
• The amount of RAM and ROM on chip
• The number of I/O pins and the timer on chip
• How e a sy to upgrade to higher performance or lower
power- consumpti on versions
• Cost per unit
8051 Architecture
 Features of 8051

• 8 bit CPU

• 16-bit program counter(PC) and data pointer (DPTR)

• 8-bit program status word(PSW)

• 8-bit stack pointer

• 4 Kbytes of on-chip program memory(ROM)

• 128 bytes of on-chip data random access

memory(RAM)
 Features of 8051
• 64Kbytes of program memory address space
• 64Kbytes of data memory address space
• Two 16 bit timers/counters
• 16 bit address bus multiplexed with port 0 and port 2
• 32 bidirectional I/O lines can be either used as 8 bit ports
• On-chip clock oscillator
• Control Registers
• Serial data receiver/transmitter
• Interrupt sources
Block Diagram of 8051
Block Diagram of 8051
 8051
Architecture
 Arithmetic and Logic Unit
• Performing computing
functions

• Accumulator is 8-bit register

• Arithmetic and logical

operations – one of the
operands is in A register

• Result is stored in only A

• C(carry), AC(auxiliary carry),

O(overflow) and P(Parity) –
status register
 Instruction decoder and control
• When an instruction is fetched – it is loaded in the instruction
register
• Decoder decodes the instruction and establishes the
sequence of events to follow
• Instruction cycle: Instruction cycle is defined as the time
required for completing the execution of an instruction.
• Instruction register is not programmable
• It cannot be accessed through any instruction
• Control unit generates control signals necessary for
communication between the processor and peripherals
 CPU Registers
• A Register(E0H)
– 8 bit
– Direct connection with ALU
– In multiplication- one of 8 bit operands stored in A and
after operation it stores lower byte in A
– In division- holds 8 bit dividend & quotient is stored in
A
• B Register(F0H)
– 8 bit
– Used with multiply and divide operations
– In multiplication- after operation it stores higher byte
in B
– In division- holds 8 bit divisor & reminder is stored in B
 A
B Some 16-bit Registers of the 8051
R0
R1
DPTR DPH DPL
R2
R3
PC PC
R4
R5
R6
R7

Some 8-bit Registers of the 8051

 Program status word(D0H)

CY AC F0 RS1 RS0 OV -- P

CY—PSW.7 Carry flag

AC – PSW.6 Auxiliary carry
F0– PSW.5 General purpose
RS1-PSW.4 Register bank selector bit 1
RS0-PSW.3 Register bank selector bit 0
OV-PSW.2 Overflow flag
-- User defined bit
P—PSW.0 Parity flag
 Stack Pointer(81H)
• 8 BIT
• Contains data item on the top of stack
• Incremented before data is stored
• Initialized to 07H
• Pointer can point any location from 0 to 127 H in internal data RAM
 Data Pointer

• DPTR (Data Pointer) consists of two 8 bit registers – high byte

(DPH) and low byte (DPL)

• 16 bit address

• To furnish address information for internal and external

program memory and for external data memory
 Program Counter

• 16 bit register

• Specifies the address of next instruction to be executed

• After reset – PC will be set to 0000H

• 8051 fetches the instruction one byte at a time

• After increments, it increments PC by 1

 Serial data Buffer

• Consists of Transmit Buffer and Receive Buffer

• Transmit buffer is PISO

• Receive buffer is SIPO

 Timer Registers

• Two 16-bit timer registers

• TL0 and TH0 represent lower and upper byte of timer 0

• TL1 and TH1 represent lower and upper byte of timer 1

 MEMORY
• 4k bytes on chip ROM
• 128 bytes RAM
• Program memory is used to hold start up program
• Data random access memory is divided into 4 parts:

First 128 bytes : 00H TO 1FH (31) – Register Banks 20H

TO 2FH(47) – Bit addressable RAM
30H TO 7FH (127) – General purpose registers

Next 128 bytes : 80H TO FFH (255) – Special function

registers
 Register Banks
• Lowest 32 bytes
• 4 banks – each having 8 registers

• RS1 and RS0 (4TH BIT AND 3RD BIT) program status word select
the bank
• Each bank contains R0 TO R7

• Ex:add A,R2 – adds the value contained in R2 to the

accumulator
• RS1=0 and RS0=0 – BANK 0 IS SELECTED
• R2 is which memory location? ADD A,02H
 Internal RAM Organization
Special Function Registers
80 –FF
General purpose registers 30-7F
Bit addressable space 20-2F
BANK 3 (R0-R7)
18-1F

BANK 2 (R0-R7)
10-17

BANK 1 (R0-R7)
08-0F

BANK 0 (R0-R7) 00-07

 PSW bits bank selection

RS1 – PSW.4 RS0- PSW.3

BANK 0 0 0
BANK 1 0 1
BANK 2 1 0
Bank 3 1 1
8051 Pin Diagram
8051 Pin Diagram
 XTAL2 and XTAL1 (18 and 19 pins)

 The 8051 has an on-chip oscillator but requires

an external clock to run it
A quartz crystal oscillator is connected to
inputs XTAL1 (pin19) and XTAL2 (pin18)
 The quartz crystal oscillator also needs two capacitors of 30 pF
value
 XTAL1 and XTAL2 …..

If you use a frequency source other than a crystal oscillator,

such as a TTL oscillator:
It will be connected to XTAL1
XTAL2 is left unconnected
 XTAL1 and XTAL2 …..

The speed of 8051 refers to maximum oscillator

the frequency connected to XTAL.

We can observe the frequency on the XTAL2 pin using the
oscilloscope.
 RST (Pin 9)
RESET pin is an input and is active high (normally low)
Upon applying a high pulse to this pin, the microcontroller will
reset and terminate all activities
This is often referred to as a power-on reset
Activating a power-on reset will cause all values in the registers
to be lost
 EA （ pin 31 ）： external access

 There is no on-chip ROM in 8031 and 8032 .

 The EA pin is connected to GND to indicate the code is stored

externally.

 PSEN ＆ ALE are used for external ROM.

 For 8051, EA pin is connected to Vcc.

 “ ” means active low.

 EA
 EA “external access’’, is an input pin and must be connected
to Vcc or GND

 The 8051 family members all come with on-chip ROM to

store programs and also have an external code and data
memory.

 Normally EA pin is connected to Vcc

 EA pin must be connected to GND to indicate that the code or

data is stored externally.
 PSEN (Pin 29)
 PSEN, “program store enable’’, is an output pin

 This pin is connected to the OE pin of the external memory.

 For External Code Memory, PSEN = 0

 For External Data Memory, PSEN = 1

ALE (Pin 30)

 Address Latch Enable
 It is an output pin and is active high.
 8051 port 0 provides both address and data.
 The ALE pin is used for de-multiplexing the address and data
by connecting to the G pin of the 74LS373 latch.
 I/O Port Pins

The four 8-bit I/O ports P0, P1, P2 and P3 each

uses 8 pins.

All the ports upon RESET are configured as

output, ready to be used as input ports by the
external device.
 Port 0

 Port 0 is also designated as AD0-

AD7.
 When connecting an 8051 to an external
memory, port 0 provides both address and
data.

 The 8051 multiplexes address and data

through port 0 to save pins.

 ALE indicates if P0 has address or data.

 When ALE=0, it provides dataD0-D7
 When ALE=1, it has address A0-A7
 Port 1 and Port 2

 In 8051-based systems with no external

memory connection:
 Both P1 and P2 are used as simple I/O.
 In 8051-based systems with external memory
connections:
 Port 2 must be used along with P0 to provide
the 16-bit address for the external memory.
 P0 provides the lower 8 bits via A0 – A7.
 P2 is used for the upper 8 bits of the 16-bit
address, designated as A8 – A15, and it cannot
be used for I/O.
 Port 3

 Port 3 can be used as input or

output.

 Port 3 has the additional function of

providing some extremely important
signals
 Pin Description Summary
PIN TYPE NAME AND FUNCTION
Vss I Ground: 0 V reference.
Vcc I Power Supply: This is the power supply voltage for normal,
idle, and power-down operation.

P0.0 - P0.7 I/O Port 0: Port 0 is an open-drain, bi-directional I/O port. Port
0 is also the multiplexed low-order address and data bus
during accesses to external program and data memory.

P1.0 - P1.7 I/O Port 1: Port I is an 8-bit bi-directional I/O port.

P2.0 - P2.7 I/O Port 2: Port 2 is an 8-bit bidirectional I/O. Port 2 emits the
high order address byte during fetches from external
program memory and during accesses to external data
memory that use 16 bit addresses.

P3.0 - P3.7 I/O Port 3: Port 3 is an 8 bit bidirectional I/O port. Port 3 also
serves special features as explained.
 Pin Description Summary
PIN TYPE NAME AND FUNCTION

RST I Reset: A high on this pin for two machine cycles while the
oscillator is running, resets the device.
ALE O Address Latch Enable: Output pulse for latching the low byte
of the address during an access to external memory.
PSEN O Program Store Enable: The read strobe to external program
memory. When executing code from the external program
memory, PSEN* is activated twice each machine cycle,
except that two PSEN* activations are skipped during each
access to external data memory.

EA/VPP I External Access Enable/Programming Supply Voltage: EA

must be externally held low to enable the device to fetch
code from external program memory locations. If EA* Is
held high, the device executes from internal program
memory. This pin also receives the programming supply
voltage Vpp during Flash programming. (applies for 89c5x
MCU's)
8051 Addressing Modes
Definition: The way a Microcontroller can get the data is
called as addressing mode
Types:
• Register
• Direct Byte
• Register Indirect
• Immediate
• Register Specific
• Indexed
 Register Addressing Mode
Register Addressing – either source or destination is one of
CPU register
MOV R0,A
MOV A,R7
ADD A,R4
ADD A,R7
MOV DPTR,#25F5H
MOV R5,DPL
MOV R,DPH

Note that MOV

R4,R7 is
Register Addressing Mode
MOV A, R4
 Direct Addressing Mode

Direct Mode – specify data by its 8-bit address

Usually for RAM

MOV A, 70H ; copy contents of RAM at 70h to A

MOV R0,40H ; copy contents of RAM at 40h to A

MOV 56H,A ; put contents of a at 56h to A

MOV PSW,A ; put contents of a into PSW

MOV R2,#5 ;Put 5 in R2

MOV R2,5 ;Put content of RAM at 5 in R2

Direct Addressing Mode
MOV A, 04H
 Register indirect Addressing Mode

Register Indirect (@) – the address of the source or

destination is specified in registers

Uses registers R0 or R1 for 8-bit address:

mov @r0, #03
mov @r1, a
mov @r1, 50

Uses DPTR register for 16-bit addresses:

mov dptr, #1234 ; dptr = 1234h
movx a, @dptr ; a = M[1234]

Note that 1234 is an address in external memory

Register indirect Addressing Mode
MOV A, @R0
 Immediate Addressing Mode

Immediate Mode – Data is a part of an Instruction

mov A, #0 ;put 0 in the accumulator

;A = 00000000

mov R4, #11h ;put 11hex in the R4 register

;R4 = 00010001
mov B, #11 ;put 11 decimal in b register
;B = 00001011

mov DPTR,#7521h ;put 7521 hex in DPTR

;DPTR = 0111010100100001
Immediate Addressing Mode

MOV A, #6AH
 Register Specific Addressing Mode

Register Specific (@) – the source and destination registers

both are same.

Uses registers A or DPTR

SWAP A
SWAP DPTR
 Register Indexed Addressing Mode

Register Indexed Mode – source or destination

address is the sum of the base address and
the accumulator(Index)

• Base address can be DPTR or PC

 mov dptr, #4000h
 mov a, #5
 movc a, @a + ;a  M[4005]
dptr
Register Indexed Addressing Mode

MOVC A, @A+DPTR
8051 Instruction Set
 Classification of Instruction Set

 Data Copy or transfer instructions

 Data processing instructions

Arithmetic instructions
Logical instructions

Program flow or Branching

instructions
JUMP
CALL & RET
 Data Transfer Instructions

• MOV dest, source dest 

source
• Stack instructions ;move byte on stack
POP byte ;move from stack to byte,
PUSH byte ;increment stack
;decrement stack pointer
pointer,

• Exchange instructions
XCH a, byte ;exchange accumulator and byte
XCHD a, byte ;exchange low nibbles of
;accumulator and byte
 MOV

MOV DEST, SOURCE

MOV A,#0FFH

MOV P0,A

MOV R0, A

MOV A, R1

MOVX A,@DPTR
MOVC A,@DPTR
 Stack
Direct addressing mode must be used in Push and Pop

mov sp, #0x40 ; Initialize

SP
Push 55 ; SP  SP+1,
; M[41]  M[55]
pop b ; b  M[55]

push acc
Push
psw
Push b
 Exchange Instructions

2 way data transfer

XCH a, 30h ; a  
; M[30]
XCH a, R0
a   R0
XCH a, @R0 ; a   M[R0]
XCHD a, R0 ; exchange “digit”
a[7..4] a[3..0] R0[7..4] R0[3..0]

Only 4 bits exchanged

Data Processing Instructions

Arithmetic Instructions

Logic Instructions
Arithmetic Instructions

• Add
• Subtract
• Increment
• Decrement
• Multiply
• Divide
 Arithmetic Instructions
Mnemonic Description

ADD A, byte Add A to byte, put result in A

ADDC A, byte Add with carry
SUBB A, byte Subtract with borrow
INC A Increment A
INC byte Increment byte in memory
Increment data pointer
INC DPTR
Decrement accumulator
DEC A
Decrement byte
DEC byte
MUL AB Multiply accumulator by b register
DIV AB Divide accumulator by b register
 ADD Examples
0011 1111
MOV A, #3FH
1101 0011
ADD A, #D3H 0001 0010

• What is the value of the C, AC, OV flags after the second

instruction is executed?

C = 1
AC = 1
OV = 0
 Logic Instructions

Bitwise logic operations

(AND, OR, XOR, NOT)
Clear
Rotate
Swap
 Bitwise Logic
Examples:
ANL  00001111
ANL 10101100
AND ORL 00001100
 OR
00001111
XRL  ORL 10101100
10101111
XOR
00001111
CPL 
XRL 10101100
Complemen 10100011
t
10101100
CPL 01010011
 CLR ( Set all bits to 0)

CLR A
CLR byte (direct mode)
CLR Ri (register mode)
CLR @Ri (register indirect
mode)
 Rotate
• Rotate instructions operate only on a

RLA

Mov a,#0xF0 ; a = 11110000

RR a ; a = 11100001

RRA

Mov a,#0xF0 ; a = 11110000

RR a ; a = 01111000
 Rotate through Carry

RRC A
C

MOV A, #0A9H ; A = A9
ADD A, #14H ; A = BD (10111101), C=0
RRC A ; A = 01011110, C=1

RLC A C

MOV A, #3CH ; A = 3CH

SETB C ; C=0
RLC A ; A = 01111001, C=1
 Swap

SWAP A

MOV A, #72H ; a = 72h

SWAP A ; a = 27h
 Program Flow Control

• Unconditional jumps
Program transfer is
permanent
• Conditional jumps

Program transfer is
• Call and return
temporary
 Unconditional Jumps

• SJMP <rel addr 8-bit > ;

Short jump, relative address is 8-bit, so jump can
be up to 127 locations forward, or 128 locations
back.

• AJMP <address 11> ; Absolute jump to

anywhere within 2K block of program memory(07FF H)

• LJMP <address 16> ; Long

jump(64 k 0000-FFFF H)
 Infinite Loops

Start: mov C, p3.7

mov p1.6, C
sjmp Start

Microcontroller application programs are

almost always infinite loops!
 Conditional jumps

•Mnemonic • Description
•JZ <rel addr> •Jump if a = 0

•JNZ <rel addr> •Jump if a != 0

JC
<rel addr> JNC Jump if C = 1 Jump

<rel addr> if C != 1 Jump if

•JB <bit>, <rel bit = 1 Jump if

addr> bit != 1
•JNB <bit>,<rel addr> JBC •Jump if bit =1, &clear
bit
<bir>, <rel addr>
•Compare A and memory,
jump if not equal
•CJNE A, direct, <rel
addr>
 More Conditional Jumps

Mnemonic Description
CJNE A, #data <rel addr> Compare A and data, jump
if not equal
CJNE Rn, #data <rel addr> Compare Rn and data,
jump if not equal
CJNE @Rn, #data <rel addr> Compare Rn and memory,
jump if not equal
DJNZ Rn, <rel addr> Decrement Rn and then
jump if not zero

DJNZ direct, <rel addr> Decrement memory and

then jump if not zero
 Call and Return

• Call is similar to a jump, but

– Call pushes PC on stack before branching

acall <address ll> ; stack = PC

; PC = address 11 bit

lcall <address 16> ; stack = PC

; PC = address 16 bit
 Return

• Return is also similar to a jump, but

– Return instruction pops PC from stack to get
address to jump to

; PC = stack
– ret
 Bit-Oriented Data Transfer

• Transfers between individual bits.

• Carry flag (C) (bit 7 in the PSW) is used as a single-bit
accumulator
• RAM bits in addresses 20-2F are bit addressable

mov C, P0.0

mov C, 67h

mov C, 2ch.7
 Bit-Oriented Data Transfer
• CLR Bit
Ex:- CLR C, CLR P1.2
• SETB Bit
Ex:- SETB C, SET P1.2, SETB PSW.3
• CPL Bit
CPL C
• Single bit Logical Operation Instructions
AND Operation: ANL C, PSW.2
OR Operation : ORL C , ACC.7
Memory Organization
Memory Structure
External Code Memory
External Data Memory
On-chip Memory Internal RAM
Registers
Bit Addressable Memory
Special Function Register
Special Function Register
Parallel Ports
Hardware Structure of IO pin
Hardware Structure of IO pin
Hardware Structure of IO pin
Writing 1 to Output Pin P1.X
Writing 0 to Output Pin P1.X
Reading HIGH at Input pin
Reading LOW at Input pin
Port 3 Bit Latches and I/O Buffer
Port 0 with Pull Up Resistors
Timers and Counters
 Timer Classification
The 8051 has two timers/counters. They can be used either
as timers to generate a time delay or as counters to count
events happening outside the microcontroller. The 8051 has
two timers:

• Timer 0,
• Timer 1.

They can be used either as timers or as event counters.

Basic registers of the timer: Both Timer 0 and Timer 1 are 16

bits wide. Since the 8051has an 8-bit architecture, each 16-
bit timer is accessed as two separate registers of low byte
and high byte.
8051 Timer / Counter
 TMOD Register

GATE
•  Gating control when set. Timer/counter is enable only while the INTx pin is high and
the TRx control pin is set. When cleared, the timer is enabled whenever the TRx
control bit is set.
 Timers of 8051 do starting and stopping by either software or hardware control.
 In using software to start and stop the timer where GATE=0
 The start and stop of the timer are controlled by way of software by the
TR(timer start) bits TR0 and TR1
 To start Timer, TR0 or TR1 must be high. or To stop Timer, TR0 or TR1 must be low.
These instructions start and stop the timers as long as GATE=0 in the TMOD register
 The hardware way of starting and stopping the timer by an external source is
achieved by making GATE=1 in the TMOD register
 TMOD Register

C/T
 Timer or counter selected Cleared for timer operation (input from internal
system clock). Set for counter operation (input from Tx input pin).
 If C/T = 0, it is used as a timer for time delay generation. The clock source for
the time delay is the crystal frequency of the 8051.
 If C/T = 1, it is used as a counter for event counters to count events
happening outside the microcontroller
TMOD Register
TCON Register
Timers – Mode of Operations
Timer 0
Timer 0 – Mode 0
Timer 0 – Mode 1
Timer 0 – Mode 2
Timer 0 – Mode 3
Timer 1
Timer 1 – Mode 0
Timer 1 – Mode 1
Timer 1 – Mode 2
Programming Timers
Programming Timers
Programming Timers
Programming Timers
Interrupts
Interrupts
Interrupts
Interrupts
6 Interrupts in 8051
6 Interrupts in 8051
IE Register
Interrupt Priority
Interrupt Priority Register
Serial Communication
 Serial Interface

 The serial port of 8051 is full duplex, i.e., it can transmit

and receive simultaneously.
 The register SBUF is used to hold the data. The special
function register SBUF is physically two registers. One is,
write-only and is used to hold data to be transmitted out
of the 8051 via TXD.
 The other is, read-only and holds the received data from
external sources via RXD. Both mutually exclusive
registers have the same address 099H.
Serial Interface
8051 Serial Port
SBUF Register
SCON Register
8051 Serial Port – Mode 0
8051 Serial Port – Mode 1
8051 Serial Port – Mode 2
8051 Serial Port – Mode 3
Programming Serial Data Transmission
Programming Serial Data Reception
PIC Microcontroller
 PIC Microcontroller

 PIC microcontrollers (Programmable Interface

Controllers) are electronic circuits that can be
programmed to carry out a vast range of tasks.
 
 They can be programmed to be timers or to control a
  production line and much more.
 They are found in most electronic devices such as alarm
systems, computer control systems, phones, in fact
almost any electronic device.
PIC Architecture
 CPU (Central Processing Unit)
The PIC microcontroller CPU consists of the ALU, CU, MU and
accumulator, etc. Arithmetic logic unit is mainly used for
arithmetic operations and to take logical decisions. Memory is
used for storing the instructions after processing. To control the
internal and external peripherals, control unit is used which are
connected to the CPU and the accumulator is used for storing the
results and further process.

Memory Organization
The memory module in the PIC microcontroller architecture consists
of
• RAM (Random Access Memory),
• ROM (Read Only Memory) and
• STACK
 Random Access Memory (RAM)
 RAM is used to store the data temporarily in its registers. The
RAM memory is classified into two banks, and each bank consists
of so many registers.
 The RAM registers are classified into two types: Special Function
Registers (SFR) and General Purpose Registers (GPR).
 General Purpose Registers (GPR): These registers are used for
general purpose only as the name implies. For example, if we
want to multiply two numbers by using the PIC microcontroller.
 Registers are used for multiplying and storing the numbers in
other registers. So these registers don’t have any special
function, CPU can easily access the data in the registers.
 Read Only Memory (ROM)

 Read only memory is used to store the data permanently. In

PIC microcontroller architecture, the architecture ROM
stores the instructions or program, according to the
program the microcontroller acts.
 The ROM is also called as program memory, wherein the
user will write the program for microcontroller and saves it
permanently, and finally the CPU executes the program.
 The microcontroller’s performance depends on the
instruction, which is executed by the CPU.
 EEPROM
In the EEPROM, the program can be written on the ROM in
multiple times

Flash Memory
Flash memory is also programmable read only memory
(PROM) in which we can read, write and erase the program in
many times. Generally, the PIC microcontroller uses this type
of ROM.
 Stack
When an interrupt occurs, first the PIC microcontroller has to
execute the interrupt and the existing process address. Then
that is being executed is stored in the stack. After completing
the execution of the interrupt, the microcontroller calls the
process with the help of address, which is stored in the stack
and get executes the process.

Bus
BUS is used to transfer and receive the data from one
peripheral to another. It is classified into two types such as
data bus and address.
 I/O Ports
 The series of PIC16 consists of five ports such as Port A, Port B,
Port C, Port D & Port E.
 Port A is an 16-bit port that can be used as input or output port
based on the status of the TRISA (Tradoc Intelligence Support
Activity) register.
 Port B is an 8- bit port that can be used as both input and output
port.
 Port C is an 8-bit and the input of output operation is decided by
the status of the TRISC register.
 Port D is an 8-bit port acts as a slave port for connection to the
microprocessor BUS.
 Port E is a 3-bit port, which serves the additional function of the
control signals to the analog to digital converter.
 A/D converters
 The analog to digital converter is to convert analog voltage
values to digital voltage values. A/D module of PIC
microcontroller consists of 5 inputs for 28 pin devices and 8
inputs for 40 pin devices.

 The operation of the analog to digital converter is controlled by

ADCON0 and ADCON1 special registers. The upper bits of the
converter are stored in register ADRESH and lower bits of the
converter are stored in register ADRESL. For this operation, it
requires 5V of an analog reference voltage.
 Timers/ Counters
 PIC microcontroller has four timer/counters wherein the
one 8-bit timer and the remaining timers have the choice to
select 8 or 16-bit mode.
 Timers are used for generating accuracy actions, for
example, creating specific time delays between two
operations.

Interrupts
PIC microcontroller consists of 20 internal interrupts and three
external interrupt sources, which are associated with different
peripherals like ADC, USART, and Timers and so on.
 Serial Communication
USART: The USART stands for Universal synchronous and Asynchronous Receiver
and Transmitter, which is a serial communication for two protocols. It is used for
transmitting and receiving the data bit by bit over a single wire with respect to
clock pulses. The PIC microcontroller has two pins TXD and RXD. These pins are
used for transmitting and receiving the data serially.

SPI Protocol: The term SPI stands for Serial Peripheral Interface. This protocol
issused to send data between PIC microcontroller and other peripherals such as
SD cards, sensors and shift registers. PIC microcontroller support three wire SPI
communications between two devices on a common clock source. The data rate
of SPI protocol is more than that of the USART.

I2C Protocol: The term I2C stands for Inter Integrated Circuit and it is a serial
protocol which is used to connect low speed devices such as EEPROMS,
microcontrollers, A/D converters, etc. PIC microcontroller support two wires
Interface or I2C communication between two devices, which can work as both
Master, and Slave device
 Oscillators
 Oscillators are used for timing generation. PIC
microcontroller consists of external oscillators like RC
oscillators or crystal oscillators, where the crystal oscillator
is connected between the two oscillator pins.

 The value of the capacitor is connected to every pin that

decides the mode of the operation of the oscillator.

 The modes are crystal mode, high-speed mode and the

low-power mode. In case of RC oscillators, the value of the
resistor and capacitor determine the clock frequency and
the range of clock frequency is 30 KHz to 4MHz.
 CCP module
 The CCP stands for capture/compare/PWM where it works in
three modes such as capture mode, compare mode and PWM
mode.

 Capture Mode: Capture mode captures the time of arrival of a

signal or in otherwords, when the CCP pin goes high, it captures
the value of the Timer1.
 Compare Mode: Compare mode acts as an analog comparator.
When the timer1value reaches a certain reference value, then it
generates an output.
 PWM Mode: PWM mode provides pulse width modulated
output with a 10-bitresolution and programmable duty cycle.
 Advantages

 PIC microcontrollers are consistent and faulty of PIC

percentage is very less.
 The performance of the PIC microcontroller is very fast
because of using RISC architecture.
 When comparing to other microcontrollers, power
consumption is very less and programming is also very easy.
 Interfacing of an analog device is easy without any extra
circuitry
 Disadvantages

 The length of the program is high due to using RISC

architecture (35 instructions)

 One single accumulator is present and program memory is

not accessible
Introduction to ARM Processor
 Features

 32-bit RISC-processor core (32-bit instructions)

 37 pieces of 32-bit integer registers (16 available)
 Pipelined (ARM7: 3 stages)
 Cached (depending on the implementation)
 Von Neuman-type bus structure (ARM7), Harvard (ARM9)
 8 / 16 / 32 -bit data types
 7 modes of operation (usr, fiq, irq, svc, abt, sys, und)
 Simple structure -> reasonably good speed / power
consumption ratio3
ARM Block Diagram
ARM Architecture
 Features of ARM7TDMI
A 32-bit RSIC processor core capable of executing 16-bit instructions (Von Neumann
Architecture)
High density code: The Thumb’s set’s 16-bit instruction length allows it to approach
about 65% of standard ARM code size while retaining ARM 32-bit processor
performance.
Smaller die size: About 72,000 transistors, Occupying only about 4.8mm2 in a 0.6um
semiconductor technology.
Lower power consumption: Dissipate about 2mW/MHZ with 0.6um technology.
Memory Access
Data can be: 8-bit (bytes), 16-bit (half words), 32-bit (words), Memory Interface
Can interface to SRAM, ROM, DRAM
Has four basic types of memory cycle: idle cycle, non-sequential cycle, sequential
cycle, coprocessor register cycle