Clocks, Timers, CCP/PWM.
Microchip Family 18FXXX
Jorge Garcia-Sucerquia
School of Physics Universidad Nacional de Colombia
Sede Medellín. A.A. 3840, Medellín – Colombia
Contents
Reset conditions
Watchdog timer
Brownout reset
Clocks
Counter and Timers
TIMER0
CAPTURE, COMPARE, AND PWM (CCP)
MODULES
RESET CONDITIONS
RESET CONDITIONS
WATCHDOG TIMER (25.2)
• The watchdog timer is a device that resets the microcontroller
if it is allowed to expire.
• The watchdog timer is programmable to expire between 4 ms
and 131 seconds.
• The watchdog timer is restarted with a SLEEP or CLRWDT
instruction to reset it so it does not expire and cause a reset.
WDTCON: WATCHDOG TIMER CONTROL REGISTER
131.072 seconds
(2.18 minutes)
4 ms
BROWNOUT RESET (4.4)
• The brownout reset is programmed and used to reset
the microcontroller if the power supply voltage drops
below a pre-programmed value.
• The brownout reset triggers the microcontroller and
waits at the reset state until the power supply voltage
returns to a level higher then the programmed brownout
voltage.
CLOCKS
• The PIC18 family allows many different clocking modes for
operation. Some include internal timing and some external.
• External timing sources are very accurate and are crystal-
or resonator-based. A less accurate, but less expensive
timing source is an RC circuit. An oscillator module or
external timing signal can also be used for the
microcontroller.
CRYSTAL/CERAMIC
RESONATOR OPERATION
(XT, HS OR HSPLL
CONFIGURATION)
CLOCKS
The PLL is enabled in
HSPLL, XTPLL,
ECPLL and ECPIO
Oscillator modes. It is
designed to produce a
fixed 96 MHz
reference clock from a
fixed 4 MHz input.
This is used to reduce
the EMI
(Electromagnetic
Interference)
on the board
COUNTERS AND TIMERS
IN DIGITAL SYSTEMS
• Counting is a fundamental concept.
• Clock is an essential element.
• Count is in synchronization with the clock.
• Count is converted in time by multiplying the
count and the clock period.
• Counter is a register that can be loaded with a
binary number (count) which can be
decremented or Incremented per clock cycle.
COUNTERS AND TIMERS
Calculating time:
• Find the difference between the beginning
count and the last count
• Multiply the count difference by the clock
period.
• The register can also be used as a counter
by replacing the clock with a signal from an
event.
• When a signal from an event arrives, the
count in the register is incremented (or
decremented); thus, the total number of
events can be counted.
TIMER APPLICATIONS
Time delay
Pulse wave generation
Pulse width or frequency
measurement
Timer as an event counter
PIC 18 TIMERS (11.0-14.0)
The PIC18 microcontroller have multiple timers,
and all of them are up-counters.
Timers are divided into two groups: 8-bit and
16-bit
Labeled as Timer0 to Timer3
Timer0 can be set up as an 8-bit or 16-bit
timer.
Timer2 is 8-bit timer.
Timer1 and Timer3 are 16-bit timers.
Each timer associated with its Special
Function Register (SFR): T0CON-T3CON
TIMER0 (11.0)
The Timer0 module incorporates the following
features:
• Software selectable operation as a timer or counter in
both 8-bit or 16-bit modes
• Generates an interrupt or sets a flag when it
overflows from FFH to 00 in the 8-bit mode and from
FFFFH to 0000 in the 16-bit mode
• Readable and writable registers
• Dedicated 8-bit, software programmable prescaler
(Divides)
• Selectable clock source: Internal (instruction cycle)
or external clock connected to pin RA4/T0CK1
• Edge select for external clock
• Interrupt on overflow
TIMER0 (11.0)
T0CON: TIMER0 CONTROL REGISTER
COUNTER
TIMER
Instruction cycle
= 4 clock cycle
The TMR0
TIMER0 (11.0) interrupt is
generated when
TIMER0 BLOCK DIAGRAM (8-BIT MODE)
the TMR0
register overflows
from FFh to 00h in
8-bit mode, or
from FFFFh to
0000h in 16-bit
mode. This
overflow sets
the TMR0IF flag
bit. The interrupt
TIMER0 BLOCK DIAGRAM (16-BIT MODE)
can be masked by
clearing the
TMR0IE bit
(INTCON<5>).
Before reenabling
the interrupt, the
TMR0IF bit must
be cleared
in software by the
Interrupt Service
Routine
The TMR0
TIMER0 (11.0) interrupt is
generated when
TIMER0 BLOCK DIAGRAM (8-BIT MODE)
the TMR0
register overflows
from FFh to 00h in
8-bit mode, or
from FFFFh to
0000h in 16-bit
mode. This
overflow sets
the TMR0IF flag
bit. The interrupt
TIMER0 BLOCK DIAGRAM (16-BIT MODE)
can be masked by
clearing the
TMR0IE bit
(INTCON<5>).
Before reenabling
the interrupt, the
TMR0IF bit must
be cleared
in software by the
Interrupt Service
Routine
TIMER0 (11.0)
REGISTERS ASSOCIATED WITH TIMER0
CAPTURE, COMPARE, AND
PWM (CCP) MODULES (15.0)
CCP modules are commonly found in
microcontrollers 16-bit (or two 8-bit) registers
specially designed to perform the following
functions in conjunction with timers:
Capture: The CCP pin can be set as an input to
record the arrival time of a pulse.
Compare: The CCP pin is set as an output, and
at a given count, it can be driven low, high, or
toggled.
CAPTURE, COMPARE, AND
PWM (CCP) MODULES (15.0)
Pulse width modulation (PWM): The CCP pin is
set as an output and the duty cycle of a pulse
can be varied.
The count for the period and the duty cycle are
loaded into CCP registers.
In this mode, the duty cycle of the output pulse
can be varied.
tON
D
tON tOFF
CAPTURE, COMPARE, AND
PWM (CCP) MODULES (15.0)
RB3 is the alternate pin
for CCP2 multiplexing
