DIGITAL CIRCUITS & SYSTEMS

(IT-302)

LAB MANUAL
B.TECH- INFORMATION TECHNOLOGY

DEPARTMENT OF INFORMATION TECHNOLOGY

UNIVERSITY INSTITUTE OF TECHNOLOGY
RGPV BHOPAL
(DECEMBER 2024)
 DEPARTMENT OF INFORMATION TECHNOLOGY
UNIVERSITY INSTITUTE OF TECHNOLOGY
RGPV BHOPAL

Vision of Department
To transform young minds into competent Information Technology professionals
by synergizing ethical values and adapting the technological advancements to meet
global challenges.

Mission of Department
● M1 : To continuously strive for the overall development of students by
educating them in latest IT technologies.

● M2 : To provide conducive environment for exploring and applying

knowledge to improve interpersonal and technical skills.

● M3 : To inculcate ethics, environmental awareness and societal commitment

which will contribute to personal and professional growth in the interest of
society.
 Program Educational Objectives

PEO1 Attain professional competency in the area of information technology.

PEO2 Apply knowledge of basic sciences and engineering to pursue higher
education and research to work in a multidisciplinary environment.
PEO3 Excel as a socially committed IT engineer having entrepreneurial skill,
good leadership qualities and high ethical values.
 PROGRAM OUTCOMES [POs]
1. Engineering Knowledge: Apply the knowledge of mathematics, science, engineering
fundamentals, and an engineering specialization to the solution of complex engineering
problems.
2. Problem Analysis: Identify, formulate, research literature, and analyze complex engineering
problems reaching substantiated conclusions using first principles of mathematics, natural
sciences, and engineering sciences.
3. Design/development of Solutions: Design solutions for complex engineering problems and
design system components or processes that meet t h e specified needs with appropriate
consideration for the public health and safety, and the cultural, societal, and environmental
considerations.
4. Conduct Investigations of Complex Problems: Use research-based knowledge and research
methods including design of experiments, analysis and interpretation of data, and synthesis of the
information to provide valid conclusions.
5. Modern Tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modelling to complex engineering activities
with an understanding of the limitations.
6. The Engineer and Society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to
the professional engineering practice.
7. Environment and Sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and need
for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
9. Individual and Team Work: Function effectively as an individual, and as a member or leader
in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and write
effective reports and design documentation, make effective presentations, and give and receive
clear instructions.
11. Project Management and Finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a member and
leader in a team, to manage projects and in multidisciplinary environments.
12. Life-long Learning: Recognize the need for, and have the preparation and ability to engage
in independent and life-long learning in the broadest context of technological change.
 DEPARTMENT OF INFORMATION TECHNOLOGY
UNIVERSITY INSTITUTE OF TECHNOLOGY
RGPV BHOPAL

Program Specific Outcomes

PSO1 Graduate will be able to acquire knowledge of information technology to
develop efficient algorithmic solutions for engineering applications.
PSO2 Graduate will be able to utilize the skill of data analytics, IoT, cloud
computing and AI to address the technological challenges.

Course Outcomes
CO 1 Solve problems of number systems ,code conversion and Boolean algebra.
CO 2 Design various combinational circuit and implement then using universal
gate.
CO 3 Design sequential circuits such as counter using various flip flops.
CO 4 Summarize various digital logic families with their specifications
CO 5 Explain functions of various multi vibrator, display devices and signal
converters
Course Articulation Matrix (CO-PO-PSO
Mapping)

POs PO PO PO PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2
1 2 3
COs
CO1 3 0 0 2 2 0 0 0 2 0 0 0 2 0
CO2 2 2 3 0 2 0 0 0 2 0 0 0 2 0
CO3 2 2 3 0 0 0 0 0 0 0 0 0 2 0
CO4 2 0 0 0 0 0 0 0 0 0 0 0 0 0
CO5 2 0 0 0.00 0 0 0 0 0 0 0 0 2 0
Avg. 2.20 0.80 1.20 0.40 0.80 0.00 0.00 0.00 0.80 0.00 0.00 0.00 1.60 0.00
 INDEX
● Download & Install Free Student Version of PSpice

● Simulation of Digital Circuits with PSpice A/D Demo Version

1. Study and verify the operations of AND, OR, NOT, NOR and NAND logic
gates.
2. Design all basic logic gates using NOR gate.

3. Design all basic logic gates using NAND gate.

4. Verification of De Morgan’s theorems.

5. Construction and verification of half adder and full adder circuits.

6. Construction and verification of half subtractor and full subtractor circuits.

7. Design of Binary to Grey and Grey to Binary code Converters.

8. Design BCD to excess-3 converter.

9. Design and verification of Multiplexer circuit. (To be done by students)

10. Design and verification of De-multiplexer circuit. (To be done by students)

 DOWNLOAD & INSTALL FREE STUDENT VERSION OF
PSPICE

This manual will help you to start your simulation on OrCAD PSpice software. This will give the
introduction of software and a process to download and install freely available student version of
PSpice.

What is PSpice Simulation?

PSpice is electronic circuit simulation tool. The name is an acronym for Personal Simulation
Program with Integrated Circuit Emphasis. It typically takes a netlist generated from OrCAD
Capture, but can also be operated from MATLAB/Simulink. PSpice lets you simulate and
analyze your analog and mixed-signal circuits within OrCAD.
PSpice calculates complex node voltages and branch currents at each frequency across your
design, allowing you to place probes and generate waveform plots for further analysis. With
PSpice, you can perform:
● DC Sweep: Change component value (e.g. resistor value, current, or voltage) and graph the
results.
● AC Sweep: Analyze the frequency response of a circuit (gain and phase).
● Transient Analysis: Set a time period and analyze the response of your circuit.

How to Download
We can download and install PSpice free student version 9.2 from internet. First open the Google
and type PSpice student version 9.2 free download.
Figure 1: Google search

This will give you a list of various download sources. Click on first link which is PSPICE Links.
This will open a window like figure 2. Chose “Where can I get my own copy of PSPICE using
Schematics?”
Click on Download locally
Your Download will start
Figure 2: Link to Download

Downloaded zipped file will be available in Downloads folder of your pc as shown in figure 3.

The file named 91pspstu will be present there. Double click on that file, and it will ask you
whether you want to unzip the file or not, and also it will ask where would you like to unzip the
file, as shown in the figure below,
Figure 3: Unzip the file in specific folder

You can create a folder in C drive and named it as pspice. Unzip the zipped file in that folder. It
will extract all files in that folder. Click on Setup file.

Figure 4: Running setup

This will ask from you the administrative authorization i.e. to run the setup as administrator.
Allow the setup in order to begin with the installation part. When you allow the setup to run it
will start a setup connection between the setup and your system as shown in the figure below,

Figure 5: Installation start

● After that the setup will give a warning message saying that the software you are going to
install will not allow any antivirus to run while working with it. Click on the Ok or next
button.

● While the setup is running it will not allow you to run any other application, don’t panic
its normal. After the setup copies all the files from PSPICE to your system a final prompt
message will appear asking you to finishing the installation as shown in the figure below,
 ●

Figure 6: Finishing the installation

● Now go to the search bar of your system of press the search button present on the
keyboard and type capture as shown in the figure below,

Figure 7: Start capture student

To use capture student with its full functionality, we need to run it as administrator. Next topic
will explain how to use this software to simulate digital circuits.
 Simulation of Digital Circuits with PSpice A/D Demo
Version
PSpice software can be used for simulation of Analog as well as Digital circuits. Simulation of
Analog circuits is beyond the scope of our subject DCS (IT 302). Some of the DCS lab
experiments which can be performed on this software are listed below.

Working with PSPICE Capture

To open capture student we can tupe ‘capture’ in search at the bottom of the screen
(Windows 10) or go to start and find capture under pspice in programs. Before we open it
for the very first time we must run it as administrator. For this we need to right click on
capture and click run as administrator. Figure below shows this process.

Figure 1: Opening PSPICE

When we run it as administrator we will get a screen of OrCAD Capture (Session Log).
Go to
Tab file
Tab New
Tab project
We will get a screen like figure 2, we need to specify the name of the project as your
name (it is compulsory) with DCS experiment number.
Note:- You should mention your name as a file name.
Select Analog and mixed A/D, and browse the location where we want to save our
project.

Figure 2: Create new project

Chose Create a blank project when we got such a message. This will open a workspace
for design of a project something like a bread board. Please ensure you will have the
necessary buttons on our page as shown below in fig 3.

Figure 3: Design space

Perform Experiment on capture

Suppose we want to perform an experiment “verification of truth table of AND gate” on

this software. We must know the theoretical concepts of the subject.
Logic Gates: Logic gates are the basic building blocks of any digital system. It is an
electronic circuit having one or more than one input and only one output. The
relationship between the input and the output is based on the certain logic. Based on
this, logic gates are named as AND gate, OR gate, NOT gate etc.

A circuit which performs an AND operation is shown in figure. It has n input (n >= 2)
and one output.

Logic diagram

Truth Table

On the capture we have to verify this truth table of AND gate.

Design of circuit

To verify this operation we need some parts as listed below

SN Name of part Part number library

1 AND Gate 7408 EVAL
2 Wire
3 Digital clock DigClock SOURCE
4 Voltage marker
To insert these parts on the design screen we need to click Place button on the top. Select
Part from the given list, this will open a window as shown in fig 4 below. We need to add
libraries of parts. The libraries are

Figure 4: Place Part & Add Libraries

Select all the libraries and open it, this will add all the libraries to your part list. Each
library contains some part of importance for example
● Logic gates are in EVAL library
● Digital clock is in SOURCE library

Some other parts can be found on the screen itself for example
● Wire is available at extreme right hand side of screen
● Voltage marker is available at top of the screen
Figure 5: Voltage marker

Figure 6: Position of tools like wire

To perform this experiment we need to draw a circuit of two input AND gate with digital
clocks connected at both the inputs. We will use three voltage markers to read the
voltages at two inputs and one output respectively. The circuit arrangement is given in
figure.

In the circuit of fig 7 we have used one AND gate, two digital clocks and three voltage
markers. For first clock ON time and OFF time are kept 0.5us means it will give a time
period of 1us, On the other hand the time period of second clock is kept 2us so that
it will be ON of 1us and OFF for 1us. This is done to get all the four possible
combinations of the two inputs.
 Clock 1

Clock 2

Figure 7: Circuit diagram for verification of AND logic

After completion of circuit design we need to set the simulation profile. For this purpose
click PSpice tab at the top of screen then click New Simulation Profile. This will open a
new window as shown in fig 9, in which we can edit simulation profile according to our
project.
Figure 8: Set Simulation Profile

For these type of experiments we need to set Analysis Type as Time Domain (Transient)
and Run to time is kept as 2us so that it will show one complete cycle of our analysis.
Click Apply and ok go move further.

Figure 9: Edit and apply Simulation profile

After setting of simulation profile we have RUN the simulation using PSpice tab as given below
in fig 10.

Figure 10: Run the Simulation

Now, a window of SCHEMATIC will appear on the screen (sometimes schematic and simulation
profile window will appear in the Taskbar as shown in fig 11).

Figure 11: Location of Schematic

Schematic will show three waveforms of DSTM1, DSTM2 and U3A. These are default name of
parts; we can set the desired name in the circuit diagram of figure 7. Figure below shows the
parts with modified names.

Figure 12: Modified Circuit

Run the simulation again after modifications. The Schematic will appear as shown in figure 13.
The three waveforms V1, V2 and AND.
From this figure 13, we can see that the circuit performing the operation of logic AND. The two
inputs V1 and V2 are generating four input combinations as listed below. The output is
equivalent to logic AND operation of the two given inputs.

Time Period V1 V2 AND

0 to 0.5us 1 1 1
0.5 to 1us 0 1 0
1 to 1.5us 1 0 0
1.5 to 2us 0 0 0

Figure 13: Print the output

Tab file

Tab print preview

Then take a screenshot of the output.

Then merge screenshots of the circuit diagram and output in a page and pin in your lab file.

Similarly we can verify other logic operations like OR. NOT, NAND and NOR.
 EXPERIMENT – 1

AIM - Study and verify the operations of AND, OR, NOT, NOR and NAND logic gates.

Requirements : PSpice software.(Parts)

ANDgate (IC 7408) NOTgate (IC 7404)

ORgate (IC 7432) NORgate (IC 7402)

NANDgate (IC 7400) Digclock

Wire

Theory:

Electric Logic

• Logical values can easily be expressed by an electrical circuit.

• “True” or “1” can be defined as voltage on a wire while “False” or “0” can be define as no
voltage.

• Analog values can be anything while digital logic only has discrete values, 0 or 1

• Electrical devices called “gates” can implement the logical.

AND GATE Circuit
 AND Gate Output

NAND GATE CIRCUIT

NAND GATE OUTPUT

OR GATE CIRCUIT
OR GATE OUTPUT

NOT GATE CIRCUIT

NOT GATE OUTPUT

 NOR GATE CIRCUIT

NOR GATE OUTPUT

RESULT: The operations of AND, OR, NOT, NOR and NAND logic gates are verified.
 EXPERIMENT – 2

AIM - Design all basic logic gates using NOR gate.

Requirements : PSpice software.(Parts)

NORgate (IC 7402) Wire

Digclock

Theory :

In Boolean Algebra, the NAND and NOR gates are called universal gates because any digital
circuit can be implemented by using any one of these two i.e. any logic gate can be created using
NAND or NOR gates only.

All the basic gates can be implemented using NOR gate and that is why NOR gate is also known
as universal gate.

1. Implementation of NOT Gate using NOR Gate :

A single NOR gate with joining of both inputs perform the function of NOT gate. The input is
negated and the output thus obtained is the inversion that is characteristic of a NOT gate.

NOR GATE ->NOT GATE CIRCUIT

 NOR GATE -> NOT GATE OUTPUT

2. Implementation of OR Gate using NOR Gate :

The OR gate is created by using an inverse of the output of the NOR operation. An inverted form
of the inputs is provided directly into the NOR gate while the output is provided in NOR gate
using fixed inputs. This inversion gives the OR gate logic.

NOR GATE -> OR GATE CIRCUIT

 NOR GATE -> OR GATE OUTPUT

3. Implementation of AND Gate using NOR Gate :

An AND gate can be made using three NOR gates. First, the inputs are combined with a NOR
gate. Then, the result is negated twice using two more NOR gates. This setup ensures the AND
function, where all inputs must be true (1) for the output to be true.

NOR GATE -> AND GATE CIRCUIT

 NOR GATE -> AND GATE CIRCUIT

RESULT:All basic gates can be designed using NOR gates.

 EXPERIMENT – 3

AIM - Design all basic logic gates using NAND gate.

Requirements : PSpice software.(Parts)

NANDgate (IC 7400) Wire

Digclock

Theory :

All the basic gates can be implemented using NAND gates and that is why NAND gate is also
known as universal gate.

1. Implementation of NOT Gate using NAND Gate :

A single NAND gate with ‘a’ and ‘b’ inputs connected respond to a NOT gate. The NOT gate
function is achieved as the result of NAND operation because the input signal is inverted.

NAND GATE -> NOT GATE CIRCUIT

 NAND GATE -> NOT GATE OUTPUT

2. Implementation of AND Gate using NAND Gate :

An AND gate can be made using two NAND gates. The first NAND gate gives a standard
NAND output. The second NAND gate takes this output as both its inputs, flipping it to act like
an AND gate. The final output is HIGH only when both inputs are HIGH.

NAND GATE -> AND GATE CIRCUIT

 NAND GATE -> AND GATE OUTPUT

3. Implementation of OR Gate using NAND Gate :

An OR gate can be made using three NAND gates. First, two NAND gates invert the inputs.
Then, these inverted outputs are fed into a third NAND gate, which combines them to produce
the OR function.

NAND GATE -> OR GATE CIRCUIT

 NAND GATE -> OR GATE OUTPUT

RESULT:All basic gates can be designed using NAND gates.

 EXPERIMENT – 4

AIM – To verify De Morgan’s theorems.

Requirements : PSpice software(Parts)

ANDgate (IC 7408) ORgate (IC 7432)

NOTgate(IC 7404) Digclock

Wire

Theory :

Two of the theorems were suggested by De Morgan that are extremely useful for Boolean
Algebra. These two theorems have been discussed below :

De Morgan’s Theorem 1:

● The left-hand side of this theorem represents the NOR gate that has inputs A and B. On
the other hand, the right-hand side represents the AND gate that has inverted inputs.
● The AND gate here is known as a Bubbled AND.
● The complement of the sum of two or more variables is equal to the product of the
complement of the variables.

(A + B)’ = A’.B’

THEOREM - 1 (LHS) CIRCUIT

THEOREM - 1 (LHS) OUTPUT

THEOREM - 1 (RHS) CIRCUIT

THEOREM - 1 (RHS) OUTPUT

De Morgan’s Theorem 2:

● The LHS (left-hand side) of this theorem represents the NAND gate that has inputs A and
B. On the other hand, the RHS (right-hand side) of this theorem represents the OR gate
that has inverted inputs.
● The OR gate here is known as a Bubbled OR.
● The complement of the product of two or more variables is equal to the sum of the
complements of the variables.

(A.B)’ = A’ + B’

THEOREM - 2 (LHS) CIRCUIT

THEOREM - 2 (LHS) OUTPUT

 THEOREM - 1 (RHS) CIRCUIT

THEOREM - 1 (RHS) OUTPUT

RESULT : De Morgan’s Theorem verified.

 EXPERIMENT – 5

AIM – Construction and verification of half adder and full adder circuits.

Requirements : PSpice software.(Parts)

ANDgate (IC 7408) Digclock

XORgate (IC 7486) ORgate (IC 7432)

Wire

Theory :

An adder is a digital circuit that performs addition of numbers.

Half adder :

● The half adder adds two binary digits called as augend and addend and produces two outputs
as sum and carry.

● 0 + 0 = 00

1 + 0 = 01

0 + 1 = 01

1 + 1 = 10

TRUTH TABLE

Input output
A B sum carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

● 1- bit adder can be easily implemented with the help of XOR gate for the output ‘SUM’ and
an AND gate for the carry.
● The half adder is useful to add one binary digit quantities.

Full adder :

● The difference between half adder and full adder is that full adder has 3 input and 2 output
whereas half adder has 0nly 2 inputs and 2 outputs.
● The first two are A and B and the third input is an input carry as C-IN.

● The output carry is designated as C-OUT and the normal output is designated as S.
TRUTH TABLE:

INPUTS OUTPUT
A B C-IN C-OUT S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

● The implementation of a full adder can be done by adding two half adders.as show in the fig.
 Full Adder

Output :
 Half Adder

Output :

RESULT: Half Adder and Full Adder Verified.

 EXPERIMENT – 6

AIM - Construction and verification of half subtractor and full subtractor circuits.

Requirements : PSpice software.(Parts)

XORgate (IC 7486) ANDgate (IC 7408)

NOTgate (IC 7404) ORgate (IC 7432)

Digclock Wire

Theory:

Subtractor : Subtractor is the one which used to subtract two binary number(digit) and
provides Difference and Borrow as a output . In digital electronics we have two types of
subtractor .

1. Half Subtractor

2. Full Subtractor

Half Subtractor : Half Subtractor is used for subtracting one single bit
binary digit from another single bit binary digit . The truth table of Half Subtractor is
shown on the next page.

Difference = A'B + AB' = A B

Borrow = A'B
The logic Diagram of Half Subtractor is shown below .
Full Subtractor : A logic Circuit Which is used for Subtracting Three Single bit Binary
digit is known as Full Subtractor . The Truth Table of Full Subtractor is Shown on the next
page .

From the Truth Table The Difference and Borrow will written as

Difference=A'B'C + A'BB' + AB'C' + ABC

Reduce it like adder , then We got

Difference = A B C
Borrow = A'B'C + A'BC' + A'BC + ABC

= A'B'C + A'BC '+ A'BC + A'BC + A'BC + ABC A'BC + A'BC + A'BC +A'BC
= A'C(B' + B) + A'B(C' + C) + BC(A' + A)
Borrow=A'C + A'B + BC
The logic diagram of Full Subtractor is Shown below
 Full Subtractor

Output :
 Half Subtractor

Output :

RESULT:Half Subtractor and Full Subtractor verified

 EXPERIMENT – 7

AIM - Design of Binary to Grey and Grey to Binary code Converters.

Requirements : PSpice software.(Parts)

XORgate (IC 7486) Wire

Theory: Binary to Grey Code Converter

The logical circuit which converts binary code to equivalent gray code is known as binary to
gray code converter. The gray code is a non weighted code. The successive gray code differs in
one bit position only that means it is a unit distance code. It is also referred as cyclic code. It is
also a reflective code. An n-bit Gray code can be obtained by reflecting an n-1 bit code about an
axis after 2n-1 rows, and putting the MSB of 0 above the axis and the MSB of 1 below the axis.

That means, in 4 bit gray code, (4-1) or 3 bit code is reflected against the axis drawn after (24-1)th
or 8th row. The bits of 4 bit gray code are considered as G4G3G2G1. Now from conversion table,
From above SOPs, let us draw K -maps for G4, G3, G2 and G1.

Grey to Binary Code Converter

In gray to binary code converter, input is a multiplies gray code and output is its equivalent
binary code.
Let us consider a 4 bit gray to binary code converter. To design a 4 bit gray to binary code
converter, we first have to draw a conversion table
From above gray code we get,
 Binary to Gray Code Convertor

Output :
 Gray Code To Binary Convertor

Output :

RESULT: Logic circuit for converters, Binary to Grey Code and Grey Code to Binary Code.
 EXPERIMENT – 8

AIM – To design BCD to excess-3 converter.

Requirements : PSpice software.

Parts:The following electronics components are required.

•XORGate(IC-7486) •ANDGate(IC-7408)
•ORGate(IC-7432) •NOTGate(IC-7404)
•Digclock

Theory: A code converter is a circuit that makes the two systems compatible even though each
uses a different binary code. To convert from binary code to Excess-3 code, the input lines must
supply the bit combination of elements as specified by code and the output lines generate the
corresponding bit combination of code.

The input variable are designated as B3, B2, B1, B0 and the output variables are designated as
C3, C2, C1, Co. from the truth table, combinational circuit is designed. The Boolean functions
are obtained from K-Map for each output variable.
K-Map for E3 :- K-Map for E2 :-

K-Map for E1 :- K-Map for E0 :-

BCD TO EXCESS 3 CODE CONVERTER
Output :

RESULT: Logic circuit and output of BCD to excess-3 converter.

 EXPERIMENT – 9

AIM – Design and verification of Multiplexer circuits.

Requirements : PSpice software.

Parts:The following electronics components are required.

• NOTGate(IC-7404) • ANDGate(IC-7408)
• ORGate(IC-7432) • Digclock
• Wire

Theory:

● A multiplexer is a combinational circuit that has many data inputs and a single output,
depending on control or select inputs.
● Multiplexers are also known as “N-to-1 selectors,” parallel-to-serial converters,
many-to-one circuits, and universal logic circuits.
● For N input lines, log2(N) selection lines are required, or equivalently, for 2^n input
lines, n selection lines are needed.
● They are mainly used to increase the amount of data that can be sent over a network
within a certain amount of time and bandwidth.

2 × 1 Multiplexer :-

The 2×1 is a fundamental circuit which is also known 2-to-1 multiplexer that are used to choose
one signal from two inputs and transmits it to the output. The 2×1 mux has two input lines, one
output line, and a single selection line.

Given Below is the Block Diagram and Truth Table of 2:1 Mux.

In this Block Diagram where I0 and I1 are the input lines ,Y is the output line and S0 is a single
select line.
Truth table :

The output of the 2×1 Mux will depend on the selection line S0,

● When S0 is 0 (low) , then I0 is selected.

● When S0 is 1 (high) , then I1 is selected.

Using the Truth Table ,the Logical Expression for Mux can be determined as :-

=> Y = S0’.I0 + S0.I1

Using truth table the circuit diagram can be given as :-

​
Logic Circuit:

2 × 1 MULTIPLEXER

Output:

Result :- Logic circuit and output of multiplexer is verified.

 EXPERIMENT – 10

AIM – Design and verification of De-Multiplexer circuits.

Requirements : PSpice software.

Parts:The following electronics components are required.

• NOTGate(IC-7404) • ANDGate(IC-7408)
• Digclock • Wire

Theory:

● Simply, the multiplexer is a single-input and multi-output combinational circuit.

● A De-Multiplexer is a combinational circuit that has only 1 input line and 2N output
lines.
● On the basis of the values of the selection lines, the input will be connected to one of
these outputs.
● De-multiplexer is opposite to the multiplexer.
● De-multiplexer is also treated as De-mux

1×2 De-multiplexer :-
In the 1 to 2 De-multiplexer, there are only two outputs, i.e., Y0, and Y1, 1 selection lines, i.e.,
S0, and single input, i.e., A.On the basis of the selection value, the input will be connected to one
of the outputs.

The block diagram and the truth table of the 1×2 multiplexer are given below.
Truth table:

The output of the 1×2 De- Mux will depend on the selection line S0,

● When S0 is 0 (low) , then Y0 is in output.

● When S0 is 1 (high) , then Y1 is in output.

The logical expression of the term Y is as follows:

Y0=S0'.A
Y1=S0.A

Logical circuit of the above expressions is given below:

Logic Circuit:

1 × 2 DE- MULTIPLEXER

Output:

Result :- Logic circuit and output of de-multiplexer is verified.

 Thank you for using this lab manual.

Designed & Compiled by:

❖ This lab manual was prepared by “Abhishek Bajpai” and “Aishwariya Shivhare”,
students of the (2015-2019) batch of the Information Technology Department, under the
guidance of “Dr. Ratish Agrawal”, Associate Professor, Department of Information
Technology (DoIT), UIT RGPV, Bhopal. The manual was prepared during the
July–December 2016 session.
❖ The first revision of this lab manual was completed by “Satyam Kumar Patel”, a
student of the (2023-2027) batch of the Information Technology Department, under the
guidance of “Dr. Ratish Agrawal”, Associate Professor, Department of Information
Technology (DoIT), UIT RGPV, Bhopal. The revision was undertaken during the
July–December 2024 session.

Sources of Information:
1. https://www.youtube.com/watch?v=8wvcwUMKvNE
2. https://microcontrollerslab.com/
3. https://resources.orcad.com/orcad-blog/pspice-simulation
4. http://www.eng.auburn.edu/~troppel/pspice_links.html