Unit 1

Introduction to Number System in Digital Logic Design

The number system is a fundamental concept in digital logic design, used to represent and manipulate data in digital systems. It
provides a way to express numerical values in different formats suitable for processing by digital circuits.
Common Number Systems
1. Decimal System (Base-10):
o Uses digits 0,1,2,3,4,5,6,7,8,9.
o Commonly used by humans for everyday calculations.
o Example: (12310123)10.
2. Binary System (Base-2):
o Uses digits 0 and 1.
o Essential for digital systems since computers process data in binary.
o Example: (101121011)2.
3. Octal System (Base-8):
o Uses digits 0, 1,2,3,4,5,6,7.
o Simplifies binary representation for large numbers.
o Example: (17817)8.
4. Hexadecimal System (Base-16):
o Uses digits 0,1,2,3,4,5,6,7,8,9 and letters A, B, C, D, E, F to represent values.
o Often used in programming and digital systems for compact data representation.
o Example: (1A3161A3)16.

Binary Number Table:

Binary Binary Binary

Number Number Number
Number Number Number
1 1 11 1011 21 10101
2 10 12 1100 22 10110
3 11 13 1101 23 10111
4 100 14 1110 24 11000
5 101 15 1111 25 11001
6 110 16 10000 26 11010
7 111 17 10001 27 11011
8 1000 18 10010 28 11100
9 1001 19 10011 29 11101
10 1010 20 10100 30 11110

Table 1: Equivalent Binary bits to the decimal number

How to Calculate Place Values:

For example, the number to be operated is 1235.
Thousands Hundreds Tens Ones
1 2 3 5
This indicates,
1235 = 1 × 1000 + 2 × 100 + 3 × 10 + 5 × 1
Given,
1000 = 103 = 10 × 10 × 10
100 = 102 = 10 × 10
10 = 101 = 10
1 = 100 (any value to the exponent zero is one)
The above table can be described as,
Thousands Hundreds Tens Ones
103 102 101 100
1 2 3 5
Hence,
1235 = 1 × 1000 + 2 × 100 + 3 × 10 + 5 × 1
= 1 × 103 + 2 × 102 + 3 × 101 + 5 × 100
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 Binary Number system

In binary system operates in base 2 and the digits 0-1 represent numbers

Thousands Hundreds Tens Ones Zeros

Decimal 103 102 101 100
Binary 23 22 21 20

Position values in Binary Numbers

Number Base Conversion

As, we have four types of number systems so each one can be converted into the remaining three systems. There are the following
conversions possible in Number System
1. Binary to other Number Systems.
2. Decimal to other Number Systems.
3. Octal to other Number Systems.
4. Hexadecimal to other Number Systems.

irst).

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Example 1: (152.25)10
Step 1:
Divide the number 152 and its successive quotients with base 2.
Operation Quotient Remainder

152/2 76 0 (LSB)

76/2 38 0

38/2 19 0

19/2 9 1

9/2 4 1

4/2 2 0

2/2 1 0

½ 0 1(MSB)

(152)10 = (10011000)2

Step 2:
Now, perform the multiplication of 0.27 and successive fraction with base 2.
Operation Result carry

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 0.25×2 0.50 0

0.50×2 0 1

(0.25)10 = (.01)2

Decimal to Octal Conversion

• The Octal system is a base-8 number system.
• It uses digits: 0, 1, 2, 3, 4, 5, 6, 7
Steps for conversion
• Divide the decimal number by 8.
• Record the remainder (it will be a number between 0 and 7).
• Repeat the division using the quotient obtained.
• Continue dividing until the quotient becomes 0.
• Write the remainders in reverse order (from last remainder to the first).

Example 1: (152.25)10
Step 1:
Divide the number 152 and its successive quotients with base 8.
Operation Quotient Remainder

152/8 19 0

19/8 2 3

2/8 0 2

(152)10 = (230)8

Step 2:
Now perform the multiplication of 0.25 and successive fraction with base 8.
Operation Result carry

0.25×8 0 2
(0.25)10 = (2)8
So, the octal number of the decimal number 152.25 is 230.2

Decimal to hexadecimal conversion

• The Hexadecimal system is a base-16 number system.
• It uses digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F, where:
Steps for Conversion:
• Divide the decimal number by 16.
• Record the remainder (it will be between 0 and 15, and if greater than 9,

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 it will be represented as A, B, C, etc.).
• Repeat the division using the quotient obtained in the previous step.
• Continue dividing until the quotient becomes 0.
• Write the remainders in reverse order (from the last remainder to the first).
Example 1 Example 2

Example 1: (152.25)10
Step 1:
Divide the number 152 and its successive quotients with base 8.
Operation Quotient Remainder

152/16 9 8

9/16 0 9

(152)10 = (98)16

Step 2:
Now perform the multiplication of 0.25 and successive fraction with base 16.
Operation Result carry

0.25×16 0 4
(0.25)10 = (4)16
So, the hexadecimal number of the decimal number 152.25 is 230.4.

Decimal to hexadecimal conversion

• The Hexadecimal system is a base-16 number system.
• It uses digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F
Steps for Conversion:
• Divide the decimal number by 16.
• Record the remainder (it will be between 0 and 15, and if greater than 9,
it will be represented as A, B, C, etc.).
• Repeat the division using the quotient obtained in the previous step.
• Continue dividing until the quotient becomes 0.
• Write the remainders in reverse order (from the last remainder to the first).

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Binary to Decimal system Conversion

Thousands Hundreds Tens Ones Zeros

Decimal 103 102 101 100
Binary 23 22 21 20
Octal 83 82 81 80
Hexadecimal 163 162 161 160

In converting Binary to other conversions the above table is considerable. The decimal number system operates in base 10. In binary
system operates in base 2 and the base is known as radix. The Octal system operates with base 8 and Hexadecimal operates in base
16. According to the place value we will convert the particular binary number to Decimal, Octal or Hexadecimal.

Binary to Decimal Conversion:

The process starts from multiplying the bits of binary number with its corresponding positional weights and add all those products.
4 3 2 1 0 -1 -2 -3
(10110.001) =(1×2 )+(0×2 )+(1×2 )+(1×2 )+(0×2 )+(0×2 )+(0×2 )+(1×2 )
2

=(1×16)+(0×8)+(1×4)+(1×2)+(0×1)+ (0×1⁄2)+(0×1⁄4)+(1×1⁄8)
=16+0+4+2+0+0+0+0.125
=22.125 )10
Octal to Decimal Conversion
• The Octal system is a base-8 number system.
• It uses digits: 0, 1, 2, 3, 4, 5, 6, 7.
Steps for Octal to Decimal Conversion
• Write the octal number.
• Multiply each octal digit by 8 raised to the power of its position
(starting from the right, the position is 0).
• Sum the results.
• The result will be the decimal equivalent.
Example 1: (152.25)8
Step 1:
We multiply each digit of 152.25 with its respective positional weight, and last we add the products of all the bits with its weight.
(152.25)8=(1×82)+(5×81)+(2×80)+(2×8-1)+(5×8-2)
(152.25)8=64+40+2+(2×1⁄8)+(5×1⁄64)
(152.25)8=64+40+2+0.25+0.078125
(152.25)8=106.328125
So, the decimal number of the octal number (152.25) 8 is (106.328125) 10

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Hexa-decimal to Decimal Conversion
To convert a hexadecimal number to decimal, you need to multiply each digit by the corresponding power of 16 and then sum the
results.
Steps for Hexadecimal to Decimal Conversion
1. Write down the hexadecimal number.
2. Start from the rightmost digit (least significant digit) and assign each digit a position, starting from 0.
3. Convert each hexadecimal digit into its decimal equivalent
4. Multiply each digit by 16 raised to the power of its position.
5. Sum the results to get the decimal equivalent.

Binary to Octal Conversion:

In a binary number, the pair of three bits is equal to one octal digit.
1. In the first step, make the pairs of three bits on both sides of the binary point. If there will be one or two bits left in a pair of
three bits pair, we add the required number of zeros on extreme sides.
2. In the second step, we write the octal digits corresponding to each pair.
Example 1: (111110101011.0011)
2
111 110 101 011.001 1
111 110 101 011.001 100
(7653.14)8

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Octal to Binary system Conversion
• Convert Each Octal Digit to Binary:
• Convert each digit of the octal number into its 3-bit binary equivalent.
• Combine the Binary Groups:
• Verify the Result:
• Double-check each octal digit and its binary equivalent to ensure accuracy.

Binary to Hexadecimal Conversion

The base numbers of binary and hexadecimal are 2 and 16, respectively. In a binary number, the pair of four bits is equal to one
hexadecimal digit.
1. In the first step, we have to make the pairs of four bits on both sides of the binary point. If there will be one, two, or three bits
left in a pair of four bits pair, we add the required number of zeros on extreme sides.
2. In the second step, we write the hexadecimal digits corresponding to each pair.
Example 1: (10110101011.0011)
1010 1011.0011
(7AB.3)16
Example 2: (10110101011.0011)2
1. Firstly, we make pairs of four bits on both sides of the binary point.
111 1010 1011.0011
On the left side of the binary point, the first pair has three bits. To make it a complete pair of four bits, add one zero on the extreme
side.
0111 1010 1011.0011

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2. Then, we write the hexadecimal digits, which correspond to each pair.
(011110101011.0011)2=(7AB.3)16

Example 3:

Conversion of binary to hexadecimal

Hexadecimal to Binary Conversion

To convert a hexadecimal number (base-16) to a binary number (base-2), the process is straightforward because each hexadecimal
digit directly maps to a 4-bit binary equivalent.
Steps for Hexadecimal to Binary Conversion
1. Write down the hexadecimal number.
2. Replace each hexadecimal digit with its 4-bit binary equivalent.
3. Combine the binary digits to form the full binary number

Hexaecimal to Binary conversion

Octal to hexadecimal conversion
To convert octal numbers (base-8) to hexadecimal numbers (base-16), the most straightforward method involves two steps:
1. Convert octal to binary.
2. Convert binary to hexadecimal.

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Since octal (base-8) and hexadecimal (base-16) are both number systems that can easily be represented by binary (base-2), this
approach simplifies the conversion process.

Example 1: (152.25)8
Step 1:
We write the three-bit binary digit for 1, 5, 2, and 5.
(152.25)8=(001101010.010101)2
So, the binary number of the octal number 152.25 is (001101010.010101)2
Step 2:
1. Now, we make pairs of four bits on both sides of the binary point.
0 0110 1010.0101 01
On the left side of the binary point, the first pair has only one digit, and on the right side, the last pair has only two-digit. To make
them complete pairs of four bits, add zeros on extreme sides.
0000 0110 1010.0101 0100
2. Now, we write the hexadecimal digits, which correspond to each pair.
(0000 0110 1010.0101 0100)2 = (6A.54)16
Hexadecimal to Octal Conversion:
To convert a hexadecimal number (base-16) to an octal number (base-8), the most straightforward approach involves two steps:
Step 1: Convert Hexadecimal to Binary
• Each hexadecimal digit can be directly converted into a 4-bit binary equivalent.
Step 2: Convert Binary to Octal
• After converting the hexadecimal number to binary, group the binary digits into groups of 3 (from right to left) and convert
each group to its octal equivalent.

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 Binary Addition
Adding two binary numbers will give us a binary number itself. Addition of two single-digit binary number is given in the
table below.

Binary Numbers Addition

0 0 0
0 1 1
1 0 1
1 1 0; Carry →1

For example: Add 11012 and 10012.

Binary Subtraction
Subtracting two binary numbers will give us a binary number itself. Subtraction of two single-digit binary number is given in
the table below.

Binary Numbers Subtraction

0 0 0
0 1 1; Borrow 1
1 0 1
1 1 0

Let us take an example of two binary numbers and subtract them.

Example: Subtract 11012, and 10102.
Solution: 11012 – 10102 = 00112

Complements
Complements are used in the digital computers in order to simplify the subtraction operation and for the logical
manipulations. For each radix-r system (radix r represents base of number system) there are two types of complements.

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 S.N Complement Description

The radix complement is referred to

1 Radix Complement
as the r's complement

The diminished radix complement is

2 Diminished Radix Complement
referred to as the (r-1)'s complement

Binary system
complements
As the binary system has base r = 2. So the two types of complements for the binary system are 2's complement and 1's
complement.
1's complement
The 1's complement of a number is found by changing all 1's to 0's and all 0's to 1's. This is called as taking complement or
1's complement. Example of 1's Complement is as follows.

2's complement
The 2's complement of binary number is obtained by adding 1 to the Least Significant Bit (LSB) of 1's complement of the
number.
2's complement = 1's complement + 1
Example of 2's Complement is as follows.

Binary Numbers Representation

We can make the binary numbers numbers into the following two groups − Unsigned numbers and Signed numbers. Unsigned
numbers contain only magnitude of the number. They don’t have any sign. That means all unsigned binary numbers are positive.

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Therefore, all positive numbers including zero can be treated as unsigned numbers if positive sign is not assigned in front of the

number.
Unsigned Numbers

Unsigned numbers contain only magnitude of the number. They don’t have any sign. That means all
unsigned binary numbers are positive. As in decimal number system, the placing of positive sign in front
of the number is optional for representing positive numbers. Therefore, all positive numbers including
zero can be treated as unsigned numbers if positive sign is not assigned in front of the number.

Representation of Un-Signed Binary Numbers

The bits present in the un-signed binary number holds the magnitude of a number. That means, if the un-
signed binary number contains ‘N’ bits, then all N bits represent the magnitude of the number, since it
doesn’t have any sign bit.

Example

Consider the decimal number 108. The binary equivalent of this number is 1101100. This is the
representation of unsigned binary number.

108 10 =
1101100 2

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It is having 7 bits. These 7 bits represent the magnitude of the number 108.

Signed Numbers

Signed numbers contain both sign and magnitude of the number. Generally, the sign is placed in front of
number. So, we have to consider the positive sign for positive numbers and negative sign for negative
numbers.

If sign bit is zero, which indicates the binary number is positive. Similarly, if sign bit is one, which
indicates the binary number is negative.
Representation of Signed Binary Numbers: There are three Sign-Magnitude form

1’s complement form

2’s complement form

Example

Consider the positive decimal number +108. The binary equivalent of magnitude of this number is
1101100. These 7 bits represent the magnitude of the number 108. Since it is positive number, consider
the sign bit as zero, which is placed on left most side of magnitude.

+108 10 = 01101100 2

Therefore, the signed binary representation of positive decimal number +108 is 𝟎𝟏𝟏𝟎𝟏𝟏𝟎𝟎. So, the same
representation is valid in sign-magnitude form, 1’s complement form and 2’s complement form for
positive decimal number +108.

Sign-Magnitude form

In sign-magnitude form, the MSB is used for representing sign of the number and the remaining bits
represent the magnitude of the number. So, just include sign bit at the left most side of unsigned binary
number. This representation is similar to the signed decimal numbers representation.
Example

Consider the negative decimal number -108. The magnitude of this number is 108. We know the unsigned
binary representation of 108 is 1101100. It is having 7 bits. All these bits represent the magnitude.
Since the given number is negative, consider the sign bit as one, which is placed on left most side of
magnitude.

−108 10 = 11101100 2

Therefore, the sign-magnitude representation of -108 is 11101100.

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1’s complement form

The 1’s complement of a number is obtained by complementing all the bits of signed binary number. So,
1’s complement of positive number gives a negative number. Similarly, 1’s complement of negative
number gives a positive number.

That means, if you perform two times 1’s complement of a binary number including sign bit, then you
will get the original signed binary number.

Example

Consider the negative decimal number -108. The magnitude of this number is 108. We know the signed
binary representation of 108 is 01101100.

It is having 8 bits. The MSB of this number is zero, which indicates positive number. Complement of zero
is one and vice-versa. So, replace zeros by ones and ones by zeros in order to get the negative number.

−108 10 = 10010011 2

Therefore, the 1’s complement of 108 10 is 10010011 2.

2’s complement form

The 2’s complement of a binary number is obtained by adding one to the 1’s complement of signed binary
number. So, 2’s complement of positive number gives a negative number. Similarly, 2’s complement of
negative number gives a positive number.
That means, if you perform two times 2’s complement of a binary number including sign bit, then you
will get the original signed binary number.

Example

Consider the negative decimal number -108.

We know the 1’s complement of (108)10 is (10010011)2

2’s compliment of 108 10 = 1’s compliment of 108 10 + 1.

= 10010011 + 1

= 100101002

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1’S Complement Subtraction
1’S Complement subtraction method allows subtracting numbers simply using addition operation only.
1. Subtracting a small number from a larger One: To subtract small numbers from a larger one, the procedure will be
as follows:-
a. Determine the 1’S complement of the smaller number.
b. Add the 1’S complement of the smaller number to the larger number.
c. Add the final carry to the result. This is called an end around carry.
Example Subtract (1011)2 from (1110)2 using the 1’S Complement method.

3. Subtracting a Large Number From a Smaller One

The procedure for subtracting a large number from a smaller one is as follows:-

a. Determine the 1’S complement of the larger number.

b. Add the 1’S complement of the larger number to the smaller number.

c. In this case, there is no carry. The result presents the 1’S complement of the real answer with opposite sign.

d. Take the 1’S complement of the result and change its sign to get the final answer.

2’S Complement of a Binary Number Simply the 2’S complement of a binary number is found by adding 1 to the 1’S
complement of that number

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2’S Complement Subtraction As in 1’S complement subtraction, the 2’S complement subtraction method allows
subtracting numbers simply by using addition operation only.
1. Subtracting a small number from a larger One to subtract small numbers from a larger one, the procedure will be as
follows:-
a. Determine the 2’S Complement of the smaller number.
b. Add the 2’S Complement of the smaller number to the larger number.
c. Discard the final carry from the result to obtain the answer (always there is a carry in this case).

2. Subtracting a Large Number From a Smaller One The procedure for subtracting a large number from a smaller one
using 2’S complement method is as follows:-
a. Determine the 2’S complement of the larger number.
b. Add the 2’S complement of the larger number to the smaller number.
c. In this case, there is no carry. The result is in 2’S complement form and is negative.
d. Take the 2’S complement of the result, and change the sign to get the answer.

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 We have two major approaches for storing real numbers: Fixed and Floating-Point Representation.
Fixed Point Representation
In computers, fixed-point representation is a real data type for numbers. It has a fixed number of bits for the
integral and fractional parts.
For example, if given fixed-point representation is IIIII.FFF, we can store a minimum value of 00000.001 and a
maximum value of 99999.999.
There are three parts of the fixed-point number representation: Sign bit, Integral part, and Fractional part. The below
figure depicts it.

Sign bit:- The fixed-point number representation in binary uses a sign bit. The negative number has a sign bit 1, while a
positive number has a bit 0.
Integral Part:- The integral part in fixed-point numbers is of different lengths at different places. It depends on the
register's size; for an 8-bit register, the integral part is 4 bits.
Fractional part:- The Fractional part is of different lengths at different places. It depends on the registers; for an 8-bit
register, the fractional part is 3 bits.
Size of Sign Bit, Integer Part, and Fractional Part for different registers are displayed below:

Register Sign Bit Integer Fraction Part

Part

8-bit register 1 bit 4 bits 3 bits

16-bit register 1 bit 9 bits 6 bits

32-bit register 1 bit 15 bits 9 bits

How to write numbers in Fixed-point notation?

Now that we have learned about fixed-point number representation, let's see how to represent it.
The number considered is 4.5
Step 1: We will convert the number 4.5 to binary form. 4.5 = 100.1
Step 2: Represent the binary number in fixed-point notation with the following format.

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 1.

Floating point representations

Many digital systems supports numbers with fractions, which are referred to as real numbers
in mathematics. For example, the value of π =3.14159265…… or e = 2.71828….. or
0.00000001 = 1x10-8.
The floating-point or scientific notation allows representing very large and very small numbers either integers or real
ones. Floating point numbers allow an arbitrary number of decimal places to the right of the decimal point. These
numbers are often represented in scientific notations.
The scientific notions in decimal can be represented as
± mantissa x 10exponent
Similarly, floating point representations using scie ntific notations for binary can have a form
as shown below:
± mantissa x 2exponent

The normalized floating point binary number can be represented as

N= (-1)S x (1.Fraction) x 2 (Exponent-Bias)

There are three parts in the representation.

S: sign bit: The sign bit is 0 for non-negative or positive numbers and 1 for negative
numbers. This is b31 in single precision and b63 for double precision.

E: exponent: The exponent is stored in a bias representation i.e, excess representation to

permit both positive and negative exponents. To provide for negative exponents, a biased
exponent is used. A bias is a number that is approximately midway in the range of values
expressible by the exponent.
For single precision, the exponent is excess/bias 127. Normally, one expect the excess/bias
to be half the number of representations. In this case, the number of representations is
256, and half of that is 128. Nevertheless, the excess is 127. Thus, the range of
possible exponents is -127 <= exponent <= 128. In double precision the bias is 1023.
The range of exponent is - 1023<=exponent<=1024.
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Example. 1: 57
Example.2: Consider the decimal number 85.125
The equivalent binary representation is
85 = 1010101
0.125 = 001
85.125 = 1010101.001
=1.010101001 x 2^6
sign = 0

1. Single precision:
biased exponent 127+6=133
133 = 10000101
Normalised mantisa = 010101001
we will add 0's to complete the 23 bits

The IEEE 754 Single precision is:

= 0 10000101 01010100100000000000000
This can be written in hexadecimal form 42AA4000

2. Double precision:
biased exponent 1023+6=1029
1029 = 10000000101
Normalised mantisa = 010101001
we will add 0's to complete the 52 bits

The IEEE 754 Double precision is:

= 0 10000000101
0101010010000000000000000000000000000000000000000000
This can be written in hexadecimal form 4055480000000000De-normalized
Notation
De-normalization Notation is just the reverse of the normalized notation. In normalized notation, after decimal we have
'1' written in the equation, but in the de-normalized notation, we have '0' after the decimal. For example, the largest de-
normalized number with excess-64 can be represented as:

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 Sign Bit Exponent Part Mantissa Part

0 1111111 01111111

Binary Codes:
In the coding, when numbers, letters or words are represented by a specific group of symbols, it is said that the
number, letter or word is being encoded. The group of symbols is called as a code. The digital data is represented, stored
and transmitted as group of binary bits. This group is also called as binary code. The binary code is represented by the
number as well as alphanumeric letter.
Advantages of Binary Code
Following is the list of advantages that binary code offers.
 Binary codes are suitable for the computer applications.
 Binary codes are suitable for the digital communications.
 Binary codes make the analysis and designing of digital circuits if we use the binary codes.
 Since only 0 & 1 are being used, implementation becomes easy.
Classification of binary codes
The codes are broadly categorized into following four categories.
 Weighted Codes
 Non-Weighted Codes
 Binary Coded Decimal Code
 Alphanumeric Codes
 Error Detecting Codes
 Weighted codes
o BCD (8421)
o 6311

o 2421

o 642-3

o 84-2-1

 Non_ Weighted codes

o Excess-3
o Gray
 Alphanumeric codes.
o EBCDIC
o ASCII
 Error detection codes (Parity).
 Weighted codes and non-weighted codes are used to represent the decimal numbers.
 Alphanumeric codes are used to represent the numeric and nonnumeric data (characters).
 Error detection codes are used to detect the errors during the data
transmission.
 Weighted codes use 4 binary digits to represent (0-9) decimal numbers.

Weighted Codes
Weighted binary codes are those binary codes which obey the positional weight principle. Each position of the
number represents a specific weight. Several systems of the codes are used to express the decimal digits 0 through 9. In
these codes each decimal digit is represented by a group of four bits.

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BCD code (8421 code)
 Simplest form: each decimal digit is replaced by its binary equivalent.

Example1: 937.25 is represented by

937.25

1001 0011 0111 0010 0101

(937.25)= (100100110111.00100101)BCD

 This representation is referred to as "Binary-Coded-Decimal": BCD or more explicitly as 8-4-2-1(8421

code).

The result is quite different than that obtained by converting the

number as a whole into binary.

Cases Based on SUM in BCD Addition:

a) BCD Addition on 6+8 b) BCD Addition on 75 + 35

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Example 3: convert 0110100000111001(BCD) to its decimal
equivalent.
Solution: Divide the BCD number into four-bit groups and convert each to decimal:

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 0110 1000 0011 1001

6 8 3 9

0110100000111001(BCD) = 683910

 BCD is used in interfacing between a digit device and a human being, e.g. digital voltmeter (DVM).

Example 4: Convert the following decimal and binary numbers to BCD.

a) 564810
b) 100011012

Solution:

a) 564810 =0101 0110 0100 1000

b) 100011012=14110=0001 0100 0001

Non-Weighted Codes
In this type of binary codes, the positional weights are not assigned. The examples of non-weighted codes are
Excess-3 code and Gray code.

Excess-3 code
The Excess-3 code is also called as XS-3 code. It is non-weighted code used to express decimal numbers. The
Excess-3 code words are derived from the 8421 BCD code words adding (0011)2 or (3)10 to each code word in 8421. The
excess-3 codes are obtained as follows −

Example

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Gray Code
It is the non-weighted code and it is not arithmetic codes. That means there are no specific weights assigned to
the bit position. It has a very special feature that, only one bit will change each time the decimal number is incremented
as shown in fig. As only one bit changes at a time, the gray code is called as a unit distance code. The gray code is a
cyclic code. Gray code cannot be used for arithmetic operation.

Gray Code to Binary Conversion: Binary to gray code

Conversion:

Alphanumeric codes

The alphanumeric codes are the codes that represent numbers and alphabetic characters. Mostly
such codes also represent other characters such as symbol and various instructions necessary for
conveying information. An alphanumeric code should at least represent 10 digits and 26 letters of
alphabet i.e. total 36 items. The following three alphanumeric codes are very commonly used for
the data representation.
 American Standard Code for Information Interchange (ASCII).
 Extended Binary Coded Decimal Interchange Code (EBCDIC).
 Five bitBaudot Code.
ASCII code is a 7-bit code whereas EBCDIC is an 8-bit code. ASCII code is more commonly used
worldwide while EBCDIC is used primarily in large IBM computers.
Logic Gates: In the binary lesson, we discussed the switches inside a
computer • Logic gates are the switches that turn ON or OFF depending on
what the user is doing! • They are the building blocks for how computers work.
Logic gates turn ON when a certain condition is true, and OFF when the 26/
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condition is false – They check whether or not the information they get follows
a certain rule • They either spit out the answer true (ON) or false (OFF)
• Remember: – True= ON = 1
– False = OFF=0
 Logic gates play an important role in circuit design and digital systems.
 It is a building block of a digital system and an electronic circuit that always have only
one output.
 These gates can have one input or more than one input, but most of the gates have two
inputs.

NOT Gate
• NOT gate is also known as an inverter or an inverting Buffer.
• NOT gate only has one input and one output. When the input signal is "Low", the
output signal is "High" and when the input signal is "High", the output is "Low".
• The Boolean expression for the NOT gate is as follows: A'=Y

• The Boolean expression for the NOT gate is as follows:

OR Gate
A'=Y
• The OR gate is a mostly used digital logic circuit.
• The output state of the OR gate will always be low when both of the inputs states is
low. Simply, if any input value in the OR gate is set to 1, then it will always return high-
level output(1).
• The logic or Boolean expression for the OR gate is the logical addition of inputs
denoted by plus sign(+) as : A+B=Y

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Fig: Logic Diagram
Table: Truth Table of 2 input OR gate
 • The Boolean expression for the NOT gate is as follows: A'=Y

AND Gate
• The AND gate plays an important role in the digital logic circuit.
• The output state of the AND gate will always be low when any of the inputs states is
low. Simply, if any input value in the AND gate is set to 0, then it will always return
low output(0).
• The logic or Boolean expression for the AND gate is the logical multiplication of inputs
denoted by a full stop or a single dot as A.B=Y

Fig: 2-input AND gate Table: Truth Table of 2-input AND gate

NAND Gate
• The NAND gate is a special type of logic gate in the digital logic circuit.
• The NAND gate is the universal gate. It means all the basic gates such as AND, OR,
and NOT gate can be constructed using a NAND gate.
• The NAND gate is the combination of the NOT-AND gate. The output state of the
NAND gate will be low only when all the inputs are high.
• Simply, this gate returns the complement result of the AND gate.
• The logic or Boolean expression for the NAND gate is the complement of logical
multiplication of inputs denoted by a full stop or a single dot as : (A.B)'=Y

Table: Truth table of 2-input NAND Gate

NOR Gate
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 • The NOR gate is also a universal gate. So, we can also form all the basic gates using
the NOR gate.
• The NOR gate is the combination of the NOT-OR gate. The output state of the NOR
gate will be high only when all of the inputs are low.
• Simply, this gate returns the complement result of the OR gate.
• The logical or Boolean expression for the NOR gate is the complement of logical
multiplication of inputs denoted by the plus sign as (A+B)'=Y

XOR gate
• The XOR gate stands for the Exclusive-OR gate. This gate is a special type of gate used
in different types of computational circuits. These gates are not basic gates in their own
and are constructed by combining with other logic gates. Their Boolean output function
is significant enough to be considered as a complete logic gate. The XOR and XNOR
gates are the hybrids gates.
• The 2-input OR gate is also known as the Inclusive-OR gate because when both inputs
A and B are set to 1, the output comes out 1(high). Simply, the output of the XOR gate
is high (1) only when both the inputs are different from each other.
• The symbol of the XOR gate is ⨁.

Fig: 2-input XOR Gate

Table: Truth Table of 2-input XOR Gate
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XNOR Gate

 The XNOR gate is the complement of the XOR gate. It is a hybrid gate.
 Simply, it is the combination of the XOR gate and NOT gate.
 The output level of the XNOR gate is high only when both of its inputs are the same, either
0 or 1.
 The symbol of the XNOR gate is the same as XOR, only complement sign is added.
Sometimes, the XNOR gate is also called the Equivalence gate.
 The Boolean expression of 2-input XNOR gate is as follows: Y=(A⨁B)'

Fig: 2-input XNOR Gate Table: Truth Table of 2-input XNOR Gate

Universal Logic Gates:

We can realize all of the other Boolean functions and gates by using just one single type of
universal logic gate, the NAND (NOT AND) or the NOR (NOT OR) gate, thereby reducing the
number of different types of logic gates required, and also the cost. Thus the NAND and the NOR
gates are commonly referred to as Universal Logic Gates.
UNIVERSAL GATE
The NAND and NOR gates are known as universal gates, since any logical function
can be implemented using NAND (or) NOR gates.

NAND Gates:The NAND gate can be constructed all the basic gates AND, OR and
NOT.

NAND Gate as AND:An AND gate function can be generated using only NAND
gates. It is generated by simply inverting output of NAND gate AB = AB.
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NAND gate as OR function: The OR function is generated using NAND only.

NAND Gate as NOT Function: NAND gate both inputs are connected together
and create NOT function.

NOR Gate: Similar to NAND gate, the NOR gate is also a universal gate, since it
can be used to form the all basic gates AND, OR and NOT gates.

NOR Gate as AND Gate Function: AND function is generated using only
NOR gates

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The above equation is implemented using only NOR gate, it is shown in fig.

The truth table of above function shown in table 4.13

NOR Gate Function as OR Gate: An OR gate can be generated using NOR

gate. It can be formed by investing the output of NOR gate i.e A+B = A+B. The fig
shows the NOR gate as function of OR.

NOR Gate Function as NOT Gate: An invester can be made connecting all
inputs to single common input. It is shown in figure 4.16.

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NAND as Universal gate

NOR as Universal gate

Minimization of Logic Expressions

Minimization of logic expressions is the process of simplifying a Boolean expression
or digital circuit to reduce its complexity without altering its functionality.
• Reduced Circuit Size: Fewer gates and components are required.
• Lower Power Consumption: Simplified circuits consume less power.
• Increased Speed: Fewer gates result in reduced propagation delay.
• Cost Efficiency: Reduced complexity lowers manufacturing costs.

Basic Theorem of Boolean Algebra

T1 : Properties of 0
(a) 0 + A = A
(b) 0 A = 0
T2 : Properties of 1
(a) 1 + A = 1
(b) 1 A = A
T3 : Commutative Law 33/
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 (a) A + B = B + A
(b) A B = B A
T4 : Associate Law
(a) (A + B) + C = A + (B + C)
(b) (A B) C = A (B C)
T5 : Distributive Law
(a) A (B + C) = A B + A C
(b) A + (B C) = (A + B) (A + C)
(c) A+A’B = A+B
T6 : Indempotence (Identity ) Law
(a) A + A = A
(b) A A = A
T7 : Absorption (Redundance) Law
(a) A + A B = A
(b) A (A + B) = A
T8 : Complementary Law
(a) X+X’=1
(b) X.X’=0
T9 : Involution
(a) x’’ = x
T10 : De Morgan's Theorem
(a) (X+Y)’=X’.Y’
(b) (X.Y)’=X’+Y’

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De Morgan's Laws
 De Morgan's First Law states that the complement of a sum of variables is equal to the
product of their individual complements. In other words, the complement of two or more
ORed variables is equivalent to the AND of the complements of each of the individual
variables.
 The complement of a product (ANDoperation) is equal to the sum (OR operation) of the 35/
complements of the individual terms. 57
Limitations of Boolean algebra
For simpler circuits or smaller logical expressions, Boolean algebra can suffice. However, for more
variables or when a guaranteed minimal solution is required, Karnaugh Maps are generally
preferred due to their visual and systematic approach.
1. Lack of Visual Representation
Relies purely on algebraic manipulation without a graphical approach.
2. Scalability Challenges
Becomes increasingly complex as the number of variables grows.
3. Error-Prone for Complex Expressions
Requires careful application of rules and theorems
4. Time-Consuming
Simplification often involves trial and error, which can take a long time for complex
circuits.\

K-Maps
In many digital circuits and practical problems we need to find expression with minimum variables. We can
minimize Boolean expressions of 2, 3, or 4 variables very easily using the K- map without using any Boolean
algebra theorems. The K-map can take two forms Sum of Product (SOP) and Product of Sum (POS)
according to the needs of the problem. The K-map is table-like representation but it gives more information
than TRUTH TABLE. We fill the grid of K- map with 0’s and 1’s then solve it by making groups.

Steps to solve expression using the K-map

1. Select K-map according to the number of variables.
2. Identify minterms or maxterms as given in the problem.
3. For SOP put 1’s in blocks of K-map respective to the minterms (0’s elsewhere).
4. For POS put 0’s in blocks of K-map respective to the maxterms(1’s elsewhere). 36/
5. Make rectangular groups containing total terms in power of two like 2,4,8 .. 57
 (except 1) and try to cover as many elements as you can in one group.
6. From the groups made in step 5 find the product terms and sum them up for SOP form.

The K-map Fill Order

2 - Variable Map 3- Variable Map 4 - Variable Map

AB\CD 00 01 11 10
A\B 0 1 A\BC 00 01 11 10
00 0 1 3 2
0 0 0 1 3 2
0 1
01 4 5 7 6
1 1 4 5 7 6
2 3
11 12 13 15 14

10 8 9 11 10

Grouping Rules: The Karnaugh map uses the following rules for the simplification of
expressions by grouping together adjacent cells containing ones

 No zeros allowed.
 No diagonals.
 Only power of 2 number of cells in each group.
 Groups should be as large as possible.
 Everyone must be in at least one group.
 Overlapping allowed.
 Wrap around is allowed.
 Get the fewest number of groups possible.

 Reduce the function y(A,B,C) = Σ (0,1,3,6,7)

Solution: Here the 3 variable as in the function so we draw 3 variable k-map and fill
ones in the given minterms

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  Simplify the sop function F(A,B,C) = Σ (1,2,3,7)

 Reduce the given function F(A,B,C,D) = Σ (1,2,3,5,8,10,11,12)

Solution:

In this problem 4 variable is given use 4 variable k-map

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 2.1 Combinational circuits
Combinational Logic Circuits are made from the basic and universal gates. The
output is defined by the logic and it is depend only the present input states not the previous
states.
Inputs and output(s) : logic 0 (low) or logic 1 (high).
For n input variables, there are 2n possible combinations of binary input variables. For each possible
input Combination, there is one and only one possible output combination. A combinational circuit
can be described by m Boolean functions one for each output variable

Fig. Block diagram of a combinational circuits

Definition of Combinational Circuit

Combinational circuits are specially designed using multiple interconnected logic
gates such that the output will be generated by computing the logical combinations
of the present input only. No clock pulse is present here. Moreover, no previously
stored value or state is taken into consideration here. The output is independent of
previous states.
Features of Combinational Circuit
 In this output depends only upon present input.
 It’s Speed is fast.
 Easy designed.
 There is no feedback between input and output.
 It is time independent.
 Elementary building blocks are Logic gates.
 Used for both arithmetic and boolean operations .
 Combinational circuits don’t have the capability to store any state.

Adder
The Basic operation in digital computer is binary addition. The circuit which perform the addition
of binary bits are called as Adder. The logic circuit which perform the addition of two bit is called Half
adder and three bit is called Full adder

Rules for two bit addition

0+0=0
0+1=1
1+0=1
1 + 1 = 102
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Half Adder
A Half Adder is a combinational circuit with two binary inputs (augends and addend bits and two
binary outputs (sum and carry bits.) It adds the two inputs (A and B) and produces the sum (S) and
the carry (C) bits. It is an arithmetic operation of addition of two single bit words..
Block diagram of Half adder
K-map simplification

Truth table of Half adder

Inputs Outputs
A B Carry Sum
0 0 0 0 Logic diagram
0 1 0 1
1 0 0 1
1 1 1 0

Full Adder:
Block diagram of Full adder: The full-adder adds the bits A and B and the carry from the
previous column called the carry-in (C in) and outputs the sum bit (S) and the carry bit called the
carry-out (Cout). The variable S gives the value of the least significant bit of the sum. The variable 40/
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Cout gives the output carry. The eight rows under the input variables designate all possible
combinations of 1s and 0s that these variables may have.
When all the bits are 0s, the output is 0. The S output is equal to 1 when only 1 input is equal to 1 or
when all the inputs are equal to 1. The Cout has a carry of 1 if two or three inputs are equal to 1.

The Full Adder can be implement using Two Half Adders and OR gates

The expression for sum is

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 The Expression for carry is

Logic Diagram

Decoder:
2 to 4 Decoder: A binary code of n bits is capable of representing up to 2^n distinct elements of
coded information. The name “Decoder” means to translate or decode coded information from
one format into another, so a digital decoder transforms a set of digital input signals into an
equivalent decimal code at its output. A decoder is a combinational circuit that converts binary
information from n input lines to a maximum of 2^n unique output lines.
It has 2 inputs and 22 = 4 outputs.
 Let 2 to 4 Decoder has two inputs A & B and four outputs Z3, Z2, Z1 & Z0. The block
diagram of 2 to 4 decoder is shown in the following figure
 One of these four outputs will be ‘1’ for each combination of inputs when enable, E is ‘1’.
The Truth table of 2 to 4 decoder is shown below

Circuit Diagram Truth Table

From Truth table, we can write the Boolean functions for each output as

Z3=A.B

Z2=A.B′

Z1=A′.B 42/
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Z0=A′.B′

Logic Diagram

2 to 4 Decoder with Enable input Truth Table

From Truth table, we can write the Boolean functions for each output as

Z3=E.A.B

Z2=E.A.B′

Z1=E.A′.B

Z0=E.A′.B′

Logic Diagram

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3 to 8 Decoder

It has 3 inputs and 23 = 8 outputs.

Truth Table Logic Diagram

HIGHER DECODER FROM LOWER DECODERS

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Example: Obtain a 4 to 16 decoder using a) 2 to 4 decoder (b) 3 to 8 decoder 57
a) we take abcd2 as the input to the decoder. Following is the diagram to
design 4 to 16 decoder using 2 to 4 decoders

When we have a = 0 & b=0 then top most decoder is enabled and 1 is placed on the
output line out of 0 to 3 based on the value of cd.

When we have a = 0 & b=1 then 2nd decoder from top is enabled and 1 is placed on the
output line out of 4 to 7 based on the value of cd.

When we have a=1 b=0 then 3rd decoder is enabled and 1 is placed on the output line out
of 8 to 11 based on the value of cd.

When we have a=1 b=1 then bottom most decoder is enabled and 1 is placed on the
output line out of 12 to 15 based on the value of cd.

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Hence top 4 outputs generate min terms 0000 to 0011, next 4 generates
min terms 0100 to 0111, next generates 1000 to 1011 and the last 4
outputs generate min terms 1100 to 1111.

b) 4 to 16 Decoder
In this section, let us implement 4 to 16 decoder using 3 to 8 decoders. We
know that 3 to 8 Decoder has three inputs A2, A1 & A0 and eight outputs, Y7
to Y0. Whereas, 4 to 16 Decoder has four inputs A 3, A2, A1 & A0 and sixteen
outputs, Y15 to Y0

We know the following formula for finding the number of lower order
decoders required.
𝑚2
Required number of lower order decoders =
𝑚1

Where, m1 is the number of outputs of lower order decoder and m2 is the

number of outputs of higher order decoder.
Here, m1 = 8 and m2 = 16. Substitute, these two values in the above formula.
Required number of 2to4 decoders = 16/8 = 2
Therefore, we require two 3 to 8 decoders for implementing one 4 to 16
decoder. The block diagram of 4 to 16 decoder using 3 to 8 decoders is
shown in the following figure.

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 c) 3 to 8 Decoder
In this section, let us implement 3 to 8 decoder using 2 to 4
decoders. We know that 2 to 4 Decoder has two inputs, A1 & A0 and four
outputs, Y3 to Y0. Whereas, 3 to 8 Decoder has three inputs A 2, A1 & A0
and eight outputs, Y7 to Y0.
We can find the number of lower order decoders required for
implementing higher order decoder using the following formula.
𝑚2
Required number of lower order decoders =
𝑚1

Where, m1 is the number of outputs of lower order decoder and m2 is the

number of outputs of higher order decoder.
Here, m1 = 4 and m2 = 8. Substitute, these two values in the above formula.
Required number of 2to4 decoders = 8/4 = 2
Therefore, we require two 2 to 4 decoders for implementing one 3 to 8
decoder. The block diagram of 3 to 8 decoder using 2 to 4 decoders is
shown in the following figure.

Encoders
An Encoder is a combinational circuit that performs the reverse operation of
Decoder. It has maximum of 2n input lines and ‘n’ output lines. It will produce a
binary code equivalent to the input, which is active High. Therefore, the
encoder encodes 2n input lines with ‘n’ bits. It is optional to represent the
enable signal in encoders. 47/
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 4 to 2 Encoder: Let 4 to 2 Encoder has four inputs Y3, Y2, Y1 & Y0 and two
outputs A1 & A0. The
block diagram of 4 to 2 Encoder is shown in the following figure.

The Truth table of 4 to 2 encoder is shown below

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From Truth table, we can write the Boolean functions for each output as
A1 = Y 3 + Y 2

A0 = Y3 + Y1
We can implement the above two Boolean functions by using two input
OR gates. The circuit diagram of 4 to 2 encoder is shown in the following
figure –

Mutliplexer (Mux)
Multiplexer is a combinational circuit that selects binary information from
one of many inputs and directs it into single output.

The selection of particular input is controlled by a set of selection

line Mutliplexer has 2n inputs, n select line (control input) and one

output
It also called as Data selector

2 to 1 Multiplexer

has 21 inputs, 1 select line and one output

Circuit diagram

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 4 to 1 MUX

4 to 1 MUX has 22 = 4 inputs, 2 select line and one output

4x1 Multiplexer has four data inputs I3, I2, I1 & I0, two selection lines A & B
and one output . The block diagram of 4x1 Multiplexer is shown in the
following figure

8 to1 MUX: 8 to1 MUX has 23 = 8 inputs, 3 select line and one output

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HIGHER MUXes FROM LOWER MUXes
Example 1: Implement - a) 8 to 1 MUX and b) 16 to 1 MUX using 4 to

1 MUX.

Ans: a) Select lines are abc2

Following is the 8 to 1 multiplexer from 4 to 1 multiplexer

b) Select lines are abcd2

Following is the circuit for 16 to 1 MUX

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Example 2: 4: 1 MUX using 2: 1 MUX

Demultiplexer (DEMUX)
Demultiplexer has 2n outputs , n select lines, one

input. A demultiplexer is also called a data

distributor.

1- to-2 demultiplexer
has 22 outputs , 2 select lines, one input.

The truth table

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 Logic diagram

1-to-4 Demultiplexer

It has one input,2 select lines,4 outputs

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 Logic Diagram

1-to-8 Demultiplexer
Block Diagram:

Truth Table:

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Boolean Equation:

1-to-8 DEMUX using Two 1-to- 4 Demultiplexers: 1-to-8 demultiplexer can be

implemented by using two 1-to-4 demultiplexers with a proper cascading.

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 In the above figure, the highest significant bit A of the selection inputs
are connected to the enable inputs such that it is complemented
before connecting to one DEMUX and to the other it is directly
connected. By this configuration, when A is set to zero, one of the
output lines from Y0 to Y3 is selected based on the combination of
select lines B and C. Similarly, when A is set to one, based on the
select lines one of the output lines from Y4 to Y7 will be selected.

i. Applications of Demultiplexer

1. Synchronous data transmission systems

2. Boolean function implementation (as we discussed full subtractor
function above)
3. Data acquisition systems
4. Combinational circuit design
5. Automatic test equipment systems

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