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Electronics Lab Manual

Volume 1

KA Navas, M Tech
Asst.Professor, ECE Dept.
College of Engineering Trivandrum
Thiruvananthapuram-695016
kanavas@rediffmail.com

Rajath Publishers, Kochi 682020

Machine Translated by Google

Electronics Lab Manual Volume 1

Fourth edition

Copyright c 2008 Rajath publishers and the author jointly

This book is sold subjected to the condition that it shall not, by way of trade or otherwise, be lent,
resold, hired out, or otherwise circulated without publisher's prior written consent in any form of
binding or cover other than that in which it is published and without a similar condition
including this condition being imposed on the subsequent purchaser and without limiting the
rights under copyright reserved above, no part of this publication may be reproduced,
stored in or introduced into a retrieval system, or transmitted in any form or by any
means(electronic, mechanical, photocopying, recording or otherwise), without prior
permission of the copyright owner.

Published by
Rajath Publishers
28/450-A, Club Road, Girinagar South
Kadavanthra, Kochi-682020
Phone:0484-2313911
e-mail:rajathpbs@yahoo.com

Price Rs. 170.00

Type set in LATEX

Printed at Pioneer offset, Ravipuram, Kochi-15
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Contents

1 ELECTRONICS WORKSHOP 9
1.1 Passive electronic components . . ......... . . . . . . . . . . . . . 9
1.2 Active electronic components . . ......... . . . . . . . . . . . . . 21
1.3 Color code for resistors . . . . . . . ....... . . . . . . . . . . . . . 26
1.4 Coding for capacitors . . . . . . . . . ....... . . . . . . . . . . . . . 28
1.5 Numbering of semiconductor devices . . . . . . . . . . . . . . . . . . . . 30
1.6 Cathode ray oscilloscope . . . . . . . ....... . . . . . . . . . . . . . 31
1.7 Familiarization of multimeters . . ....... . . . . . . . . . . . . . . . 36
1.8 DC source and signal generator . . . ....... . . . . . . . . . . . . . 40
1.9 Testing of electronic components . . ....... . . . . . . . . . . . . . 41
1.10 PCB fabrication . . . . . . . . . . . ....... . . . . . . . . . . . . . 44
1.11 Soldering practice . . . . . . . . . ....... . . . . . . . . . . . . . . . 46
1.12 Transformer winding practice . . . . ....... . . . . . . . . . . . . . 49

2 BASIC ELECTRONICS LAB (SOLID STATE DEVICES LAB) 52

2.1 Characteristics of PN junction diode . . . . . . . . . . . . . . . . . . . . 52
2.2 Characteristics of zener diode . . ......... . . . . . . . . . . . . . 58
2.3 Characteristics of LEDs . . . . . . ......... . . . . . . . . . . . . . 60
2.4 Rectifier circuits . . . . . . . . . ....... . . . . . . . . . . . . . . . 63
2.5 Study of filter circuits . . . . . . ....... . . . . . . . . . . . . . . . 69
2.6 Clipping circuits (Shunt clippers) . . . . . . . . . . . . . . . . . . . . . . 74
2.7 Clipping circuits (Series clippers) . . . . . . . . . . . . . . . . . . . . . . 82
2.8 Clipping circuits using zener diodes . . . . . . . . . . . . . . . . . . . . . 84
2.9 Clamping circuits . . . . . . . . . ....... . . . . . . . . . . . . . . . 87
2.10 Clamping circuits using zener diodes . . . . . . . . . . . . . . . . . . . . 92
2.11 CE Characteristics of transistors . ....... . . . . . . . . . . . . . . . 93
2.12 CB Characteristics of transistors . ......... . . . . . . . . . . . . . 100
2.13 Characteristics of JFET . . . . . ......... . . . . . . . . . . . . . 104

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2.14 Characteristics of MOSFET . . . . . . . . . . . . . ....... . . . . . 108

2.15 Characteristics of UJT . . . . . . . . . . . . . . . . ....... . . . . . 111
2.16 Zener diode regulator . . . . . . . . . . . . . . . . ....... . . . . . 114
2.17 RC integrator . . . . . . . . . . . . . . . . . . . . . ....... . . . . . 116
2.18 RC differentiator . . . . . . . . . . . . . . . . . . . ....... . . . . . 119
2.19 RC low pass filter . . . . . . . . . . . . . . . . . . . ....... . . . . . 121
2.20 RC high pass filter . . . . . . . . . . . . . . . . . . ....... . . . . . 123
2.21 Series resonant circuit . . . . . . . . . . . . . . ....... . . . . . . . 125
2.22 Parallel resonant circuit . . . . . . . . . . . . . ....... . . . . . . . 127
2.23 Characteristics of SCR . . . . . . . . . . . . . . . . ....... . . . . . 129
2.24 Characteristics of TRIAC . . . . . . . . . . . . . . ....... . . . . . 132
2.25 Characteristics of DIAC . . . . . . . . . . . . . . . ....... . . . . . 133
2.26 Solved examination questions . . . . . . . . . . ......... . . . . . 135

3 ELECTRONIC CIRCUITS LAB 152

3.1 Transistor biasing circuits . . . . . . . . . . . . ....... . . . . . . . 152
3.2 RC-coupled amplifier . . . . . . . . . . . . . . . . . ....... . . . . . 156
3.3 Two stage RC-coupled amplifier . . . . . . . . . . . ......... . . . 164
3.4 Emitter follower . . . . . . . . . . . . . . . . . ......... . . . . . 167
3.5 Tuned amplifier . . . . . . . . . . . . . . . . . . . . ....... . . . . . 170
3.6 Common source JFET amplifier . . . . . . . . . . . ......... . . . 173
3.7 Source follower . . . . . . . . . . . . . . . . . . . . ....... . . . . . 177
3.8 Power amplifier . . . . . . . . . . . . . . . . . . . . ....... . . . . . 179
3.9 Differential amplifier . . . . . . . . . . . . . . . ....... . . . . . . . 184
3.10 Differential amplifier with constant current source . . . . . . . . . . . . 187
3.11 Cascode amplifier . . . . . . . . . . . . . . . . . . . ....... . . . . . 189
3.12 RC phase shift oscillator . . . . . . . . . . . . . . . ....... . . . . . 192
3.13 RC phase shift oscillator using JFET . . . . . . . . ....... . . . . . 196
3.14 Wien bridge oscillator . . . . . . . . . . . . . . ......... . . . . . 197
3.15 Wien bridge oscillator using JFET . . . . . . . . . ....... . . . . . 200
3.16 Hartley and Colpitts oscillators . . . . . . . . . ......... . . . . . 202
3.17 Series voltage regulator without feedback . . . . . ....... . . . . . 207
3.18 Series voltage regulator with feedback . . . . . . . ....... . . . . . 211
3.19 Crystal oscillator . . . . . . . . . . . . . . . . . ....... . . . . . . . 216
3.20 Transistor as a switch . . . . . . . . . . . . . . . . ....... . . . . . 218
3.21 Bistable multivibrator . . . . . . . . . . . . . . ....... . . . . . . . 221
3.22 Monostable multivibrator . . . . . . . . . . . . ......... . . . . . 227
3.23 Astable multivibrator . . . . . . . . . . . . . . ....... . . . . . . . 232
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3.24 Gated astable multivibrator . . . ....... . . . . . . . . . . . . . . . 237

3.25 Schmitt trigger . . . . . . . . . . ....... . . . . . . . . . . . . . . . 239
3.26 Sweep wave generator . . . . . . . . ....... . . . . . . . . . . . . . 243
3.27 Linear sweep wave generator . . . . ....... . . . . . . . . . . . . . 246
3.28 Miller sweep circuit . . . . . . . . ....... . . . . . . . . . . . . . . . 247
3.29 Bootstrap sweep circuit . . . . . ......... . . . . . . . . . . . . . 249
3.30 Current time base generator . . . . . ....... . . . . . . . . . . . . . 253
3.31 UJT relaxation oscillator . . . . . ......... . . . . . . . . . . . . . 255
3.32 Feedback amplifiers . . . . . . . . ....... . . . . . . . . . . . . . . . 258
3.33 UJT control of SCR . . . . . . . . . ....... . . . . . . . . . . . . . 263
3.34 TRIAC controlled with DIAC . . . . ....... . . . . . . . . . . . . . 264
3.35 Controlled full wave rectifier . . . ....... . . . . . . . . . . . . . . . 265
3.36 Controlled bridge rectifier . . . . ....... . . . . . . . . . . . . . . . 265
3.37 Light activated relay . . . . . . . ....... . . . . . . . . . . . . . . . 266
3.38 LVDT . . . . . . . . . . . . . . . . . ....... . . . . . . . . . . . . . 267
3.39 CA3028 cascode/differential amplifier . . . . . . . . . . . . . . . . . . . 268
3.40 Voltage controlled oscillator . . . ......... . . . . . . . . . . . . . 271

4 Digital Electronics Lab 4.1 274

Study of digital ICs and IC trainer kit . . . . . . . . . . . . . . . . . . . 274
4.2 TTL characteristics . . . . . . . . ......... . . . . . . . . . . . . . 278
4.3 Study of combinational circuits . ....... . . . . . . . . . . . . . . . 282
4.4 Half adder and full adder . . . . . . ....... . . . . . . . . . . . . . 285
4.5 Adder and subtractor circuits using 7483 . . . . . . . . . . . . . . . . . . 288
4.6 Code converters . . . . . . . . . . ......... . . . . . . . . . . . . . 292
4.7 Timing circuits using gates . . . ......... . . . . . . . . . . . . . 296
4.8 Timing circuits using 74121 and 74123 . ....... . . . . . . . . . . . 299
4.9 Flip flops using gates . . . . . . . ......... . . . . . . . . . . . . . 303
4.10 Shift registers . . . . . . . . . . . ....... . . . . . . . . . . . . . . . 307
4.11 Ring counter and Johnson counter . ....... . . . . . . . . . . . . . 310
4.12 Ring counter and Johnson counter using 7495 . . . . . . . . . . . . . . . 314
4.13 Ring counter and Johnson counter using 74194 . . . . . . . . . . . . . . 316
4.14 Asynchronous counters . . . . . . . . ....... . . . . . . . . . . . . . 318
4.15 Synchronous counters . . . . . . . . ....... . . . . . . . . . . . . . 323
4.16 Counter ICs . . . . . . . . . . . . . . ....... . . . . . . . . . . . . . 333
4.17 Magnitude comparator . . . . . . . . ....... . . . . . . . . . . . . . 338
4.18 Multiplexers using gates . . . . . ....... . . . . . . . . . . . . . . . 340
4.19 Demultiplexers using gates . . . . ....... . . . . . . . . . . . . . . . 341
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4.20 Study of multiplexer ICs . . . . . . . . . . . . . ....... . . . . . . . 342

4.21 Logic design using multiplexer ICs . . . . . . . . . ....... . . . . . 348
4.22 Study of demultiplexer ICs . . . . . . . . . . . ......... . . . . . 351
4.23 Logic design using demux/decoder ICs . . . . . . . ......... . . . 355
4.24 Binary sequence generator . . . . . . . . . . . . . . ....... . . . . . 357
4.25 Sequence detector . . . . . . . . . . . . . . . . . ......... . . . . . 358
4.26 CMOS characteristics . . . . . . . . . . . . . . ......... . . . . . 362
4.27 TTL-CMOS interconnections . . . . . . . . . . . . ....... . . . . . 363
4.28 Static display . . . . . . . . . . . . . . . . . . . ....... . . . . . . . 365
4.29 Analog to digital converter . . . . . . . . . . . . . ....... . . . . . 367
4.30 Digital to analog converter . . . . . . . . . . . . . . ....... . . . . . 370
4.31 Astable multivibrator using 555 . . . . . . . . . . . ....... . . . . . 373
4.32 Monostable multivibrator using 555 . . . . . . . . ....... . . . . . 377
4.33 Parity generator and checker . . . . . . . . . . . . ....... . . . . . 379
4.34 Schmitt trigger using 7414 . . . . . . . . . . . . . . ....... . . . . . 381
4.35 Study of semiconductor memories . . . . . . . . . . ....... . . . . . 382
4.36 Solved examination questions . . . . . . . . . . ......... . . . . . 384
4.37 Unsolved examination questions . . . . . . . . . . . ....... . . . . . 390
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Chapter 1

ELECTRONIC CIRCUITS LAB

1.1 TRANSISTOR BIASING CIRCUITS

Aim To bias a given BJT to work in a desired Quiescent operating point by employing different
biasing techniques.

Components and equipments required board, Transistor, dc source, resistors, bread

ammeter and voltmeter.

Theory A BJT must be biased in active operating region to function as an am plifier. In order to
bias a BJT in active operating region, base-emitter junction must be forward biased and base-
collector junction must be reverse biased. Biasing can be done with the help of a DC source and
a few resistors. Different methods are used to bias the BJT. The objective of this experiment is
to study the effect of the variation of the parameters on the operating point.

Fixed bias circuit A resistor is used to tie the base of the transistor to VCC for the fixed bias set
up. Saturation conditions are avoided in this bias set up because the base-collector junction is
no longer reverse biased. Therefore the signal output will not be distorted. However the stability
of the circuit is poor against the parameter variations.

Emitter-stabilized bias circuit The stability of the fixed bias circuit can be improved significantly
by introducing a resistor RE in the emitter terminal.
Collector feedback bias circuit Stability can be improved by introducing a feed back path from
collector to base through a resistor. Though Q-point is not completely independent of ÿ (hF E),
current gain of the transistor, sensitivity to changes in ÿ or temperature variations are less than
that for fixed bias and emitter-bias configurations.
Voltage divider bias circuit A potential divider resistor network R1R2 provides

9
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10 Electronics Lab Manual Volume 1

the sufficient voltages across the transistor junctions. This amplifier set up is almost independent
of ÿ. R1 and R2 are designed such that a stable voltage drop exists across them even when
the base current varies. For this, current through R1 and R2 is assumed to be the same and it
is much higher than the base current. Therefore R2 is made much greater than the resistance
across base and emitter which is (1 + ÿ)RE. RE includes internal emitter resistance re also.

Procedure

1. Set up the fixed bias circuit after testing the components. Vary only one of the
parameters VCC, RC, RB and ÿ and enter the updated values in the table. To
change ÿ, use transistor BC177 whose ÿ is 75.
2. Repeat the experiments by changing other parameters. Draw the load line on a
graph with VCE along x-axis and IC along y-axis.
3. Set up other bias circuits one by one. Repeat the experiments by changing one
parameter at a time.

Fixed bias circuit

VCC 12V

RC 3.3k RB
RB VCC RC ÿ VCE IC
560k

+
A 0-10 mA
-
+
V 0-10V
BC107 -

Design

Select transistor BC107 since its ÿ ranges from 100 to 500 at IC = 2 mA, as per
data sheet.

Let the Q-point be VCE = 6 V, and IC = 2 mA at VCC = 12 V.

Then VRC = IC × RC = 6 V.

From this, RC = 3 k. Use 3.3k std.

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Design

Let the Q-point be VCE = 6 V, and IC = 2 mA at VCC = 12 V.

Voltage across RC = 6 V. From this, RC = 3 k. Use 3.3 k.

VRB = VCE ÿ VBE = 6 V - 0.7 V = 5.3 V.

Also, VRB = IB × RB = 5.3 V. From this, RB = 265 k. Use 220 k.

Voltage divider bias

VCC 12V

RC
2.2k
R1 47k +
A 0-10 mA VCC RC ÿ VCE IC
-
BC107 +
V 0-10V
-
RE
R2 15k
1k

Design

Let the Q-point be VCE = 6 V, and IC = 2 mA at VCC = 12 V.

Assume voltage across RC = 4 V and that across RE = 2 V.

VRC = IC × RC = 4 V. From this, we get RC = 2 k. Use 2.2k std. VRE = IE × RE

= 2 V. Because, IE ÿ IC. From this, we get RE = 1 k.

Design of voltage divider R1 and R2

Assume the current through R1 = 10IB and that through R2 = 9IB to avoid loading of the
potential divider network R1 and R2 by the base current. (In other words to keep the bias
voltages across R1 and R2 stable against the base current variations).

ie, VR2 = VBE + VRE = 0.6 V + 2 V = 2.6 V. Also, VR2 = 9IBR2 = 2.6 V.
2.6 = 14 k. Use 15 k.
But IB = IC/ÿ = 2 mA/100 = 20 µA. Then R2 = 9×20×10ÿ6

VR1 = Voltage across R1 = VCC ÿ VR2 = 12 V - 2.6 V = 9.4 V

9.4
Also, VR1 = 10IBR1 = 9.4 V. Then R1 = 10×20×10ÿ6= 47 k.
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Electronics Lab Manual Volume 1 13

1.2 RC-COUPLED AMPLIFIER

Aim To design and set up an RC-coupled CE amplifier using bipolar junction.

transistor and to plot its frequency response.

Components and equipments required sistors, Transistor, dc source, capacitors, re

bread board, signal generator, multimeter and CRO.

Theory RC-coupled CE amplifier is widely used in audio frequency applications.

in radio and TV receivers. It provides current, voltage and power gains. Base current
controls the collector current of a common emitter amplifier. A small increase in base
current results in a relatively large increase in collector current. Similarly, a small
decrease in base current causes large decrease in collector current. The emitter-base
The junction must be forward biased and the collector base junction must be reverse biased.
for the proper functioning of an amplifier. In the circuit diagram, an NPN transistor
is connected as a common emitter ac amplifier. R1 and R2 are employed for the
voltage divider bias of the transistor. Voltage divider bias provides good stabilization
independent of the variations of ÿ. The input signal Vin is coupled through CC1 to the
base and output voltage is coupled from collector through the capacitor CC2.
The input impedance of the amplifier is expressed as Zin = R1||R2||(1 +hF Ere) and
output impedance as Zout = RC||RL where re is the internal emitter resistance of the
transistor given by the expression = 25 mV/IE, where 25 mV is temperature equivalent
voltage at room temperature.
Selection of transistors Transistor is selected according to the frequency of operation,
and power requirements. The hF E of the transistor is another aspect we should
be careful about. Low frequency gain of a BJT amplifier is given by the expression.
Voltage gain Av = ÿhF E RL , AV = ÿhF E.
Ri . In the worst case with RL = Ri
hF E of any transistor will vary in large ranges. For example, the hF E (a general of SL100
purpose transistor) varies from 40 to 300. hF E of BC107 (an AF driver)
varies from 100 to 500. Therefore a transistor must be selected such that its minimum
guaranteed hF E is greater than or equal to AV required.

Selection of supply voltage VCC For a distortionless output from an audio

amplifier, the operating point must be kept at the middle of the load line selecting
VCEQ = 50% VCC(= 0.5VCC). This means that the output voltage swing in either
positive or negative direction is half of VCC. However, VCC is selected 20% more than
the required voltage swing. For example, if the required output swing is 10 V, VCC is
selected 12 V.

Selection of collector current IC The nominal value of IC can be selected from

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14 Electronics Lab Manual Volume 1

the data sheet. Usually it will be given corresponding to hF E bias. It is the bias current at which hF
E is measured. For BC107 it is 2 mA, for SL100 it is 150 mA, and for power transistor 2N3055 it is 4
A.

Design of emitter resistor RE Current series feedback is used in this circuit using RE. It stabilizes
the operating point against temperature variation. Voltage across RE must be as high as possible.
But, higher drop across RE will reduce the output voltage swing. So, as a rule of thumb, 10% of
VCC is fixed across RE.
RE = VRE = VRE since IE ÿ IC, RE = 0.1 VCC IC
IE IC

Design of RC Value of RC can be obtained from the relation RC = 0.4VCC/IC since remaining 40%
of VCC is dropped across RC.

Design of potential divider R1 and R2 Value of IB is obtained by using the expression IB = IC/hF E
min. At least 10IB should be allowed to flow through R1 and R2 for the better stability of bias
voltages. If the current through R1 and R2 is near to IB, slight variation in IB will affect the voltage
across R1 and R2. In other words, the base current will load the voltage divider. When IB gets
branched into the base of transistor, 9IB flows through R2. Values of R1 and R2 can be calculated
from the dc potentials created by the respective currents.

Design of bypass capacitor CE The purpose of the bypass capacitor is to bypass signal current to
ground. To bypass the frequency of interest, the reactance of the capacitor XCE computed at that
frequency should be much less than the emitter resistance. As a rule of thumb, it is taken XCE ÿ RE/
10.

Design of coupling capacitor CC The purpose of the coupling capacitor is to couple the ac signal to
the input of the amplifier and block dc. It also determines the lowest frequency that to be amplified.
Value of the coupling capacitor CC is obtained such that its reactance XC at the lowest frequency
(say 100 Hz or so for an audio amplifier), should be less than the input impedance of the amplifier.
That means XC must be ÿ Rin/10. Here Rin = R1||R2||(1 + hF Ere) where re is the internal emitter
resistance of the transistor given by the expression = 25 mV/IE at room temperature.

Procedure

1. Test all the components using a multimeter. Set up the circuit and verify dc bias conditions.
To check dc bias conditions, remove input signal and capacitors in the circuit.

2. Connect the capacitors in the circuit. Apply a 100 mV peak to peak sinusoidal signal from the
function generator to the circuit input. Observe the input and output waveforms on the CRO
screen simultaneously.
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Electronics Lab Manual Volume 1 15

3. Keep the input voltage constant at 100 mV, vary the frequency of the input signal from 0
to 1 MHz or highest frequency available in the generator. Measure the output amplitude
corresponding to different frequencies and enter it in tabular column.

4. Plot the frequency response characteristics on a graph sheet with gain in dB on y-axis and
logf on x-axis. Mark log fL and log fH corresponding to 3 dB points.
(If a semi-log graph sheet is used instead of ordinary graph sheet, mark f along x-axis
instead of logf).
5. Calculate the bandwidth of the amplifier using the expression BW= fH ÿ fL.
6. Remove the emitter bypass capacitor CE from the circuit and repeat the steps 3 to 5 and
observe that the bandwidth increases and gain decreases in the absence of CE.

Circuit diagram

VCC +12 V

R1 47k RC 2.2k CC2 10 Fµ

+-
CC1 10µF Vo
-+ B C
BC107
E
RL
Vin R2 RE 820ÿ _
100 mV 10k 680ÿ_ + CE
BC107
- 22 Fµ

CBE

Design

Output requirements: Mid-band voltage gain of the amplifier = 50 and required output voltage
swing = 10 V.

Selection of transistor Select transistor BC107 since its minimum guaranteed hF E(= 100) is
more than the required gain (=50) of the amplifier.

Quick Reference data of BC107

Type: NPN-Silicon, Application: In audio frequency

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Maximum rating: VCB = 50 V, VCE = 45 V, VEB = 6 V, IC = 100 mA.

Nominal rating: VCE = 5 V, IC = 2 mA, hF E = 100 to 500.

DC biasing conditions VCC is taken as 20% more than required ouput swing.
Hence VCC = 12 V.

IC = 2 mA, because hF E is guaranteed 100 at that current as per data sheet.

In order to make the operating point at the middle of the load line, assume the dc conditions
VRC = 40% of VCC = 4.8 V, VRE = 10% of VCC = 1.2 V and VCE = 50% of VCC = 6 V .

Design of RC VRC = IC × RC = 4.8 V. From this, we get RC = 2.4 k. Use 2.2 k.

Design of RE VRE = IE × RE = 1.2 V. From this, we get RE = 600 ÿ because IE ÿ IC. Use 680
ÿ std.

Design of voltage divider R1 and R2

Assume the current through R1 = 10IB and that through R2 = 9IB for a stable
voltage across R1 and R2 independent of the variations of the base current.

VR2 = Voltage drop across R2 = VBE + VRE.

ie, VR2 = VBE + VRE = 0.6 + 1.2 = 1.8 V. Also, VR2 = 9IBR2 = 1.8 V.
1.8
But IB = IC/hF E = 2 mA/100 = 20 µA. Then R2 = 9×20×10ÿ6
= 10.6 k. Use 10 k.

VR1 = voltage across R1 = VCC ÿ VR2 = 12 V ÿ 1.8 V = 10.2 V

10.2
Also, VR1 = 10IBR1 = 10.1 V. Then R1 = 10×20×10ÿ6
= 50 k. Select 47k std.

Design of RL: Gain of the common emitter amplifier is given by the expression AV = ÿ(rc/re).
Where rc = RC||RL and re = 25 mV /IE = 25 mV /2 mA = 12.5 ÿ.

Since the required gain = 50, substituting it in the expression we get, RL = 845 ÿ.
Use 820 ÿ std.

Design of coupling capacitors CC1 and CC2

XC1 should be less than the input impedance of the transistor. Here, Rin is the
series impedance.

Then XC1 ÿ= Rin/10. Here Rin = R1||R2||(1 + hF Ere) because is RE bypassed.

We get Rin = 1.1 k. Then XC1 ÿ 110 ÿ.

So, CC1 ÿ 1/2ÿfL × 110 = 14 µF. Use 15 µF std.

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Electronics Lab Manual Volume 1 17

Similarly, XC2 ÿ Rout/10, where Rout = RC. Then XCE ÿ 240 ÿ.

So, CC2 ÿ 1/2ÿ × 240 = 6.6 µF. Use 10 µF std.

Design of bypass capacitors CE

To bypass the lowest frequency (say 100Hz), XCE should be less than or equal to
the resistance RE.

ie, XCE ÿ RE/10 Then, CE ÿ 1/(2ÿ × 100 × 68) = 23 µF. Use 22 µF.

Graph
Gain in dB
Gain in dB
M dB
M-3 dB M dB
M-3 dB

log f log f
log fL log fH log fL log fH
With CE Without CE

Result
With CE:
Mid-band gain of the amplifier =. . . . . .
Bandwidth of the amplifier =. . . . . . Hz
Without CE:
Mid-band gain of the amplifier = ......
Bandwidth of the amplifier = . . . . . .Hz

Troubleshooting
1. Before the ac signal is applied, check dc conditions of the amplifier. Ensure that the transistor
is in active region by verifying that the EB junction is forward biased and CB junction is
reverse biased.
2. Replace RE by a pot and connect the bypass capacitor at the variable terminal of the pot.
Verify whether VBE = 0.6 V. This is very important.
3. If the output waveform gets clipped, reduce the amplitude of the input signal, vary RC
or adjust VCC slightly.
4. If the voltage at the collector VC = 12 V, collector circuit is not drawing current. Trans sistor
is in cut off state. Base-emitter junction may not be forward biased.
5. If VC = 0, possible trouble is open collector circuit or collector shorted to earth. If
VE = 0, emitter is drawing current.
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18 Electronics Lab Manual Volume 1

Answered examination questions

1. Design and set up an amplifier for the specifications: gain = -50, output voltage = 10.
V P P , fL = 50 Hz and calculate Zi .
Negative sign of the gain indicates that the output of an RC coupled amplifier is the amplified
and inverted version of the input. fL should be considered while designing the coupling
capacitor. Set up an RC coupled amplifier for a gain of 50. To obtain an output voltage of
10 V peak to peak, take VCC 20% more than the required voltage swing. ie, 12 V. To
measure the input impedance, connect a 10 k resistor in series with the function generator
and note down the potential difference across the resistor. Then calculate the current
through the resistor. The input impedance is equal to the ratio of the voltage at the right
side of the 10 k resistor with respect to the current through it.

2. Set up an RC coupled amplifier and measure its input and output impedances.
Measurement of input resistance Method 1: Connect a known resistor (say 1 k) in series
between the signal generator and the input of the circuit. Calculate the current though the
resistor from the potential difference across it. Since this current also flows into the circuit,
input resistance can be measured taking the ratio of the voltage at the right side of the
resistor to the current.
Method 2: Connect a pot in series between the signal source and the input of the circuit.
Adjust the pot until the input voltage to the circuit is 50% of the signal generator voltage.
Remove the pot from the circuit and measure its resistance using a multimeter.
Measurement of output resistance Method 1: Measure the open circuit output voltage.
This is the Thevenin voltage. Output resistance of the circuit is actually the Thevenin
resistance in series with the Thevenin voltage. Connect a known value resistor, say 1 k and
measure the voltage across it. A reduction in the output voltage can be observed.
Calculate the current through the resistor. Since this current also flows trough the Thevenin
resistance, output resistance is the ratio of the difference in the output voltage to the current.

Method 2: Connect a pot at the output of the circuit. Adjust the pot until the voltage across
it is 50% of the open circuit voltage. Remove the pot from the circuit and measure its
resistance using a multimeter.

3. Set up an RC coupled amplifier using a PNP transistor for a gain = 20 dB and stability.
factor = 5.

When a PNP transistor is used, the polarity of supply voltage VCC must be reversed.
Convert dB to linear scale. Take stability factor 5 = 1 + RB/RE, where RB = R1 parallel with
R2.

4. Design and set up an RC coupled amplifier for a stability factor of 5 and fH = 30 kHz.
Design the amplifier as described in the previous question. Use a capacitor in parallel to
the output to function as a low pass filer for a cut off frequency fH = 1/2ÿRC C.
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20 Electronics Lab Manual Volume 1

11. How is the input of the RC coupled amplifier phase shifted by 180ÿ at the output?
The collector voltage is given by the expression VC = VCC ÿ IC RC . The increase in the
input voltage causes an increase in the collector current. Increase in the collector current
reduces the collector voltage. Inverse is also true. Thus the amplifier provides the phase.
inversion.

Exercise

1. Differentiate between ac and dc load lines? Explain their importance in amplifier analysis.

2. Why is the center point of the active region chosen for dc biasing?

3. What happens if extreme portions of the active region are chosen for dc biasing?

4. Draw the output characteristics of the amplifier and mark the load-line on it. Also mark
the three regions of operation on the output characteristics.

5. Which are the different forms of coupling used in multi-stage amplifiers?

6. Draw hybrid and hybrid-ÿ equivalent models of a transistor in the CE configuration.

7. Draw the Ebers-Moll model of a BJT.

8. What are self bias and fixed bias?

9. Give a few applications of RC-coupled amplifier.

Table 1.1: Maximum ratings of commonly used transistors

Number Type Application IC ÿ = hF E Package

BC107 Si, NPN Audio, low power 100 mA 100-500 TO 18
2N2222 Si, NPN Switching 800 mA 100-300 TO 18
SL100 Si, NPN General purpose 1A 40-300 TO 5
SK100 Si, PNP General purpose 1A 40-300 TO 5
BC147 Si, NPN Driver 200 mA 125-500 MM 10
BC177 Si, PNP Driver 200 mA 75-260 TO 18
BF194 Si, NPN AM radio 30 mA 67-220 TO 92
BF195 Si, NPN AM radio 30 mA 36-125 MM 10
2N3055 Si, NPN High power 15 A 20-70 TO 3
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Electronics Lab Manual Volume 1 21

1.3 TWO STAGE RC-COUPLED AMPLIFIER

Aim To design, set up and study a two stage RC coupled CE amplifier using BJT.
Components and equipments required Transistor, dc source, capacitors, resis tors, bread
board, signal generator, multimeter and CRO.
Theory Multistage amplifiers are used in cascade to improve parameters such as voltage
gain, current gain, input impedance and output impedance etc. Common emitter stages
are cascaded to increase the voltage gain. A two stage amplifier provides an overall
voltage gain of A1A2, where A1 and A2 are the gains of first and second stages
respectively. Since each stage provides a phase inversion, the final output signal is in
phase with the input signal.
The input impedance of the second stage is in parallel with RC1 of the first stage.
The ac voltage gain of the first stage is A1 = RC1||Rin2/(re + Re) where Rin2 is the
input resistance of the second stage. Rin2 = R12||R22||(1 + hF Ere)
The ac voltage gain of the second stage is A2 = (RC2||RL)/re
Care must be taken while selecting A1 and A2. If A1 is large, the input to the second
stage will become too high. This may pull out the transistor of the second stage from active
region. For example, if we need an overall voltage gain of 100, select A1 = 4 and A2 = 25.
Gain of the first stage can be controlled by a negative feed back in series with the emitter.
This is achieved by the unbypassed resistor Re.

Circuit diagram

VCC +12 V

R12 RC2
R11 47k RC1 2.2k CC2 22 Fµ 47k 2.2k CC2 22 Fµ

CC1 22µF +- +-

-+ BC107 BC107

RL
Vin R21 Re 180ÿ
R22 470ÿ _
100 mV 10k 10k +
RE CE
' 680ÿ _
R + CE - 33 Fµ
e
470ÿ _
- 33 Fµ
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40 Electronics Lab Manual Volume 1

RLCC >> TS where TS is the lowest signal frequency (20 Hz).

CC = 1/(2ÿ20RL) = 360 µF. Use 470 µF std.

Class-AB power amplifier

+VCC +6 V

R
1k

C C 470 µF
-+ T2
SL100
1N4001
CC 470 µF
-+
RB
VO
1k
1N4001
Vin 2 VPP -+ T1
20 Hz SK100 RL
C C 470 µF 22ÿ _
R
1k

Design

Design of class-AB power Design of RL and CCis the same as that of class-B amplifier.

Design of R and RB The bias current through the compensating diodes ID is

same as the ICQ in order to match the diode curves and VBE curves of the transistor.
ICQ should be 1 to 5 percent of collector saturation current ICsat.

Average current ICsat = VCEQ/ÿRL = 3/ÿRL = 43 mA

ICQ = ID = ICsat × 5% = 2.15 mA

Applying KVL in the diode bias network, 6 V = ID × 2R + 1.2 V + ID × RB

ID × RB should be about 2 V to drive into class-AB.

ID × RB = 2 V. From this RB = 930 ÿ. Use 1 k.

Waveforms
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Electronics Lab Manual Volume 1 49

5. Calculate the bandwidth of the amplifier using the expression BW = fH ÿ fL.

Observation and graph

Vin =100mV
Gain in dB
f in Hz Voin Volts Gain (dB)
-3 dB

log f
log fL log fH

Result Bandwidth = · · · · · · Hz.

Answered viva-voce questions

1. Why is a cascode amplifier called as wide band amplifier?

The miller capacitance present in ordinary CE amplifier limits the high frequency op eration.
But in cascode amplifier miller capacitance is absent and hence bandwidth is widened.

2. What are the characteristics of a cascode amplifier?

AV = Same that of CE stage, Zi = Same as that of CE stage Aj =
Approximately equal to that of CE stage, Z0 = Very high like CB stage.

1.12 RC PHASE SHIFT OSCILLATOR

Aim To design and set up an RC phase shift oscillator using BJT and to observe the sinusoidal
output waveform.

Components and equipments required Transistor, dc source, capacitors, resis tors,

potentiometer, breadboard and CRO.

Theory An oscillator is an electronic circuit for generating an ac signal voltage with a dc supply
as the only input requirement. The frequency of the generated signal is decided by the circuit
elements. An oscillator requires an amplifier, a frequency selective network, and a positive
feedback from the output to the input. The Barkhausen criterion for sustained oscillation is Aÿ =
1 where A is the gain of the amplifier and ÿ is the feedback factor. The unity gain means signal
is in phase. (If the signal is 180ÿ out of phase, the gain will be ÿ1.)
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50 Electronics Lab Manual Volume 1

If a common emitter amplifier is used, with a resistive collector load, there is a 180ÿ phase
shift between the voltages at the base and the collector. Feedback network between the collector
and the base must introduce an additional 180ÿ phase shift at a particular frequency.

In the figure shown, three sections of phase shift networks are used so that each section
introduces approximately 60ÿ phase shift at resonant frequency. By analysis, resonant frequency
f can be expressed by the equation,

1
f=
2ÿRC 6 + 4Rc/R The

three section RC network offers a ÿ of 1/29. Hence the gain of the amplifier
should be 29. For this, the requirement on the hF E of the transistor is found to be

hF E ÿ 23 + 29(R/RC) + 4(RC/R).

The phase shift oscillator is particularly useful in the audio frequency range.

Circuit diagram

VCC +12 V

CC1µF

R1 47k RC 2.2k + - Vo C 0.01µF C 0.01µF

C 0.01µF

BC107

R R
RE
+ 4.7 k 4.7 k R
C 22 µF 4.7 k
R2 10k 680ÿ _ -

Design

Output requirements Sine wave with amplitude 10 VP P and frequency 1 kHz.

Design of the amplifier Select transistor BC107. It can provide a gain more than 29 because its
minimum hF E is 100.

DC biasing conditions VCC = 12 V, IC = 2 mA,VRC = 40% of VCC = 4.8 V, VRE = 10% of VCC
= 1.2 V and VCE = 50% of VCC = 6 V.
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52 Electronics Lab Manual Volume 1

Waveform

Vo

Result Amplitude and frequency of sine wave = · · · · · · V, · · · · · · Hz respectively.

Troubleshooting Ensure that the amplifier provides sufficient gain. For this, disconnect the
feedback, feed an input sine wave to the amplifier and observe the output. Gain should be
more than 33.

Answered examination questions

1. Obtain two sinusoidal signals which are 180ÿ out of phase with each other.
This can be obtained from an RC phase shift oscillator. Two 180ÿ out of phase signals can
be obtained from the base and collector terminals of the transistor. But the amplitude of the
signal at base will be small and distorted.

Answered viva-voce questions

1. Classify the sinusoidal oscillators.
Sinusoidal oscillators can be classified as RC and LC oscillators. LC oscillators are used
for high frequency generation while RC oscillators for audio frequency generation.
2. Explain Barkhausen criteria for sustained oscillation.
a) Total loop gain (Aÿ) of the circuit must be exactly unity, where A is the gain of the
amplifier and ÿ is the feedback factor. b) Total phase shift around the loop must be 360ÿ .
3. What are the practical applications of a phase shift oscillator?
RC-phase shift oscillator is widely used as audio frequency oscillator.
4. What happens when CE is removed? Why?
When CE is removed, gain of the amplifier decreases and oscillation gets damped.
5. Why is a minimum hF E value required for the circuit to function as an oscillator?
A minimum hF E is required to obtain sufficient gain for the amplifier part to satisfy the
Barkhausen criteria for oscillation.

6. How does one RC section generate a phase difference of 60ÿ ?

Phase shift introduced by one RC network is tanÿ1 (ÿRC). Suitable values of R and C will
provide 60ÿ phase shift between input and output of one RC network at a particular
frequency.
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64 Electronics Lab Manual Volume 1

1.17 SERIES VOLTAGE REGULATOR WITHOUT FEED

BACK

Aim To study the performance of zener diode regulator with emitter follower output and to plot
line regulation and load regulation characteristics.

Components and equipments required Transistor, zener diode, resistor, rheostat, dc source,
voltmeter, ammeter and bread board.

In theory The limitations of an ordinary zener diode regulator are, the changes in current flowing
through the zener diode cause changes in output voltage, the maximum load current that can
be supplied is limited and large amount of power is wasted in zener diode and series resistance.

These defects are rectified in a zener regulator with emitter follower output. It is a circuit
that combines a zener regulator and an emitter follower. The dc output voltage of the emitter
follower is Vÿ = VZ ÿ VBE. When input voltage changes, zener voltage remains the same and
so does the output voltage.
In an ordinary zener regulator, if the load current IL required is in the order of amperes, the
zener diode should also have the same current handling capacity. But in zener regulator with
emitter follower output, current flowing through the zener is IL/ÿ.
Another advantage of this circuit is low output impedance.
The expression for the output voltage can also be expressed as Vÿ = Vi ÿVCE. This means
that when the input voltage increases, output remains constant by dropping excess voltage
across the transistor.
The limitation of this circuit is that the output voltage directly depends on the zener voltage.
This is rectified in the series voltage regulator with feedback using error amplifier.

Procedure

1. Set up the circuit on the bread board after identifying the component leads.
Verify the circuit using a multimeter.
2. Note down output voltage by varying the input voltage from 0 V to 30 V in steps of 1 V.
Plot line regulation characteristics with Vi along x-axis and Vÿ along y-axis. Calculate
percentage line regulation using the expression ÿVÿ/ÿVi .
3. Keep the input voltage at 15 V and note down output voltage by varying load current from
0 to 500 mA in equal steps using a rheostat. Plot load regulation characteristics with IL
along x-axis and Vÿ along y-axis.
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Electronics Lab Manual Volume 1 65

4. Measure the full load voltage VF L by adjusting the rheostat until ammeter reads.
500 mA.
5. Remove the rheostat and measure the output voltage to get no-load voltage VNL.
6. Mark VNL and VF L on the load regulation characteristics and calculate load
regulation as per the equation,

VNL ÿ VF L
VR = 100%
VNL

Circuit diagram
2N3055 + _
A
100 ÿ 0-1A
1/2 W RB

+ +
SZ9.1 ÿ800 _
V 0 - 30 V V 0 - 30 V
0 - 30 V 1A
_ _

Design

Output requirements Vÿ = 8.5 V, IL = 500 mA when input is in the range 15 ± 5 V.

Selection of transistor Select the power transistor 2N3055

Details of 2N3055: type : Si-NPN. Application: AF Power, Maximum ratings: VCB = 100 V, VCE
= 60 V, VEB = 7 V, IC max = 15 A, P = 115 W, Nominal ratings: VCE = 4 V, IC = 4 A, hF E = 20
to 70.

C is the
2N3055 case itself

Top view Pins are pointing towards viewer

Selection of zener diodes

We know that, VZ = Vÿ + VBE. Since the required output voltage Vÿ = 8.5 V,

VZ = Vÿ + 0.6 V = 9.1 V . Select SZ9.1 zener diode.
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128 Electronics Lab Manual Volume 1

Result
Mid-band gain of IF amplifier = · · · · · · ·
Center frequency = · · · · · · Hz

1.40 VOLTAGE CONTROLLED OSCILLATOR

Aim To design and set up a voltage controlled oscillator using astable multivibrator for a center
frequency of 1 kHz.
Equipments and components required Transistors, resistors, capacitors, signal generator,
bread board and dc supply.
Theory VCO is an oscillator whose frequency can be varied in accordance with an input voltage.
It is possible to convert an astable multivibrator into a VCO by connecting an additional voltage
source VBB to R1 and R2. The collector supply remains VCC. If VBB is varied, the time period
of output T changes in accordance with the equation T = 2RCln(1 + VCC/VBB). With a fixed
value of VCC, it can be seen from the equation that the output frequency of the circuit is
nonlinear function of VBB. However, this relation can be linearized by employing a constant
current source for linear charging of the capacitor. This circuit is used as an FM generator
because frequency of a signal is varied according to the amplitude of another signal.

Circuit diagram

VCC +10 V

Vin

RC R1 220k
2.7k RE 22k RE 22k RC 2.7k B C

Q3 2N869 E
Q4 2N869
C 0.1 Fµ
VC2

C 0.1 F µ
Q1 Q2
BC107 BC107 R2 270k
VB1 VB2
CBE
Pinout of 2N869
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Electronics Lab Manual Volume 1 129

Design

Choose transistor BC107 as Q1 and Q2. For the design of astable part, refer astable
multivibrator experiment.
DC conditions VCC = 10 V and IC = 2 mA. Let Vin be 2 V.

Design of RE Voltage across RE = Vin ÿ 2VBE = 2 V-1.2 V = 0.8 V.

Base current through Q1 or Q2 is IB = IC/hF E = 2 mA/100 = 20 µA

To ensure saturation, take base current = 2IB. Then RE < VRE/IB =

0.8 V /40 µA = 20 k. Use 22k std.

Use 2N869 or equivalent as Q3 and Q4

Data of 2N869:

Maximum ratings: VCB = 25 V, VCE = 18 V, VEB = 5 V, IC = 100 mA.

Nominal ratings: VCE = 5 V, IC = 10 mA, hF E = 20 (min)

Design of R1 and R2 Assume base current IB of Q3 and Q4 = IC/hF E 40µA/20 = 2 µA =

Let 10IB flows through R1 and 9IB through R2.

A +5 V at the base of Q3 and Q4 will ensure that their collector base junctions get reverse
biased to function as a CB amplifier.

Then R1 = 5V /10IB = 250 k. Use 220k std. R2 = 5V /9IB = 278 k. Use 270 k.

Graph

f Hz
Vin Volts f in Hz

VinVolts

Procedure

1. Set up a conventional astable multivibrator using base resistors 82 k. Observe the collector
and base waveforms of both transistors.
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130 Electronics Lab Manual Volume 1

2. If the astable multivibrator is found to be working properly, connect the remaining

components.
3. Feed a 5 V, 10 Hz sine wave as the input Vin. Observe the input and output
waveforms on CRO.
4. Replace the sine wave by a 5 V dc. Vary the dc voltage and note down the corresponding
frequency. Enter it in tabular column and draw the graph with dc voltage along x-axis
and frequency along y-axis.

Waveforms

Vin

VB1
t

VC1
t
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