8086 Microprocessor
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• 8086 Microprocessor is an enhanced version of 8085Microprocessor
that was designed by Intel in 1976. It is a 16-bit Microprocessor
having 20 address lines and16 data lines that provides up to 1MB
storage.
• It supports two modes of operation, i.e. Maximum mode and
Minimum mode. Maximum mode is suitable for system having
multiple processors and Minimum mode is suitable for system having
a single processor.
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Features of 8086
• The most prominent features of a 8086 microprocessor are as follows
It has an instruction queue, which is capable of storing six instruction bytes
from the memory resulting in faster processing.
It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal
data bus, and 16-bit external data bus resulting in faster processing.
It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which
improves performance.
Fetch stage can prefetch up to 6 bytes of instructions and stores them in
the queue. Execute stage executes these instructions.
It has 256 vectored interrupts.
It consists of 29,000 transistors.
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Comparison between 8085 & 8086 Microprocessor
• Size − 8085 is 8-bit microprocessor, whereas 8086 is 16-bit microprocessor.
• Address Bus − 8085 has 16-bit address bus while 8086 has 20-bit address
bus.
• Memory − 8085 can access up to 64Kb, whereas 8086 can access up to 1
Mb of memory.
• Instruction − 8085 doesn’t have an instruction queue, whereas 8086 has an
instruction queue.
• Pipelining − 8085 doesn’t support a pipelined architecture while 8086
supports a pipelined architecture.
• I/O − 8085 can address 2^8 = 256 I/O's, whereas 8086 can access 2^16 =
65,536 I/O's.
• Cost − The cost of 8085 is low whereas that of 8086 is high.
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8086 Architecture
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8086 Architecture
• 8086 Microprocessor is divided into two functional units, i.e., EU
(Execution Unit) and BIU (Bus Interface Unit).
• EU (Execution Unit)
Execution unit gives instructions to BIU stating from where to fetch the data
and then decode and execute those instructions. Its function is to control
operations on data using the instruction decoder & ALU. EU has no direct
connection with system buses, it performs operations over data through BIU.
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8086 Architecture (Execution Unit)
• ALU
It handles all arithmetic and logical operations, like +, −, ×, /, OR, AND, NOT
operations.
• Flag Register
It has 9 flags and they are divided into 2 groups − Conditional Flags and Control
Flags.
Conditional Flags: Carry flag, Auxiliary flag, Parity flag, Zero flag, Sign flag,
Overflow flag
Control Flags: Trap flag, Interrupt flag, Direction flag
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8086 Architecture (Execution Unit)
Flag Registers
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8086 Architecture (Execution Unit)
• General purpose registers
AX register − It is also known as accumulator register. It is used to store
operands for arithmetic operations.
BX register − It is used as a base register. It is used to store the starting base
address of the memory area within the data segment.
CX register − It is referred to as counter. It is used in loop instruction to store
the loop counter.
DX register − This is data register. Data register can be used as a port number in
I/O operations. It is also used in multiplication and division.
SP − This is stack pointer register pointing to program stack. It is used in conjunction
with SS for accessing the stack segment.
BP − This is base pointer register pointing to data in stack segment. Unlike SP, we can
use BP to access data in the other segments.
SI − This is source index register which is used to point to memory locations in the data
segment addressed by DS.
DI − This is destination index register performs the same function as SI.
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8086 Architecture (Bus Interface Unit)
• BIU takes care of all data and addresses transfers on the buses for the
EU like sending addresses, fetching instructions from the memory,
reading data from the ports and the memory as well as writing data
to the ports and the memory. EU and BIU are connected with the
Internal Bus (ALU Data Bus).
• It has the following functional parts −
• Instruction queue − BIU contains the instruction queue. BIU gets upto
6 bytes of next instructions and stores them in the instruction queue.
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8086 Architecture (Bus Interface Unit)
• Segment register − BIU has 4 segment buses, i.e. CS, DS, SS& ES. It
also contains 1 pointer register IP, which holds the address of the next
instruction to executed by the EU.
CS − It stands for Code Segment.
DS − It stands for Data Segment.
SS − It stands for Stack Segment.
ES − It stands for Extra Segment.
• Instruction pointer − It is a 16-bit register
used to hold the address
of the next instruction to be executed.
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8086 Registers
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