SOLUTION MANUAL

SPRING MID-SEMESTER EXAMINATION-2024-25

School of Electronics Engineering
Kalinga Institute of Industrial Technology
Deemed to be University
4th Semester
Subject: MICROPROCESSORS AND EMBEDDED SYSTEMS (EC 20002) (Regular)

Format-2
Instructions:-
 3 (three) questions are to be attempted.
 Question Paper consists of 3 (three) Sections i.e. A, B and C.
 Section A is Compulsory and to cover the entire mid semester syllabus.
 The Examinee has to attempt any 1 (one) questions from the Sections B and C.
Time: 1.5 hours Full Marks: 20
The figures in the right-hand side indicate full marks.
All parts of a question should be answered at one place only.

Question Question Marks

No
Q1. Answer the following questions in short. [1x5]
What is meant by “pipelining” in the instruction queue of
8086 MP?
Ans: Pipelining in the 8086 microprocessor refers to the
technique of overlapping instruction fetching and execution
a
to improve processing speed. The 8086 uses a 6-byte
instruction queue to implement instruction prefetching,
allowing it to fetch the next instructions while executing the
current one.
What is the function of each Control Flag in 8086 MP?
Ans:
Direction Flag (DF) – Controls string operations:
 DF = 0 → SI/DI Auto-increment (processes strings
from low to high memory).
Question  DF = 1 → SI/DI Auto-decrement (processes strings
Type from high to low memory).
(SAT) Interrupt Flag (IF) – Controls interrupt handling:
b
 IF = 1 → Enables maskable interrupts.
 IF = 0 → Disables maskable interrupts.
Trap Flag (TF) – Enables single-step execution for
debugging:
 TF = 1 → Executes one instruction at a time,
triggering an interrupt after each instruction.
 TF = 0 → Normal execution without single-step
debugging.
From which address the 8086 MP starts execution after reset.
Justify your answer.
Ans:
c
After a reset, CS:IP = FFFF:0000, the 8086 microprocessor
starts executing from physical address FFFF0H
(hexadecimal).
 What would be the effect of the following program in the
8086 MP system:
MOV AX, 9025H;
CWD ;
d Ans: CWD (Convert Word to Doubleword) extends the sign
of AX into DX to form a 32-bit signed value.
Here, since 9025H is negative (MSB = 1), the result is:
 DX = FFFFH
 AX = 9025H
Determine the number of address lines for a 32kB EPROM
e chip.
Ans: 15
Section-B
a) If [AX] = 1000H, [BX] = 5276H, [SS] = 5000H, [SP] = 1235H then
what would be the content of registers AX, BX, and SP after executing
the following program in 8086 MP? Justify your answer. [1.5]

PUSH AX;
PUSH BX;
POP AX;
POP BX;
Ans: [AX]  [BX]; [AX] = 5276H, [BX] = 1000H;
[SP] = [SP] – 2 – 2 + 2 + 2 = [SP] = 1235H

b) With a neat diagram explain the functioning of the transceiver circuit

using 𝐷𝑇/𝑅 and 𝐷𝐸𝑁 signals of 8086 MP. [2]
Ans: Transceiver circuit is used to avoid the loading effect on the
databus of 8086 MP.
DEN (Data Enable) - This signal is provided as enable for data flow
through the transceiver.
DT / R (Data Transmit / Receive) - Controls direction of data flow.
Q2.
1.5+2+4

DEN DT / R Data transfer

0 1 AB

0 0 BA

1 X No data transfer
 c) Design an 8086 MP system to interface a total of 64k×8 EPROM using
a 3-to-8-line decoder. The starting address of the EPROM should be
80000H. Draw the memory map also. (The EPROM chips are available
in modules of 32k×8) [4]
Ans:

a) What is the purpose of the following pins of the 8086 MP: [1.5]
(i)𝑇𝐸𝑆𝑇 (ii) QS1 and QS0
Ans:
(i)The 𝑇𝐸𝑆𝑇 (Active Low) input pin is used for wait state control in
8086. It is used in conjunction with the WAIT instruction. Typically
used for synchronization with co-processors (e.g., 8087 math co-
Q3. processor). 1.5+2+4
Function:
 If 𝑇𝐸𝑆𝑇 = 0, the processor enters a wait state and halts execution.
 If 𝑇𝐸𝑆𝑇 = 1, the processor continues normal execution.
 (ii) These Queue Status pins indicate the state of the instruction
queue in 8086's pipelining system.
 The values of QS1 and QS0 determine the status of the instruction
queue as follows:
 QS1 QS0 Queue Status
0 0 No operation
0 1 The first byte of the opcode fetched
1 0 Queue is empty
Subsequent byte from the queue
1 1
fetched

b) Find the content of the AX register, the status of the zero flag and
parity flag after executing the following program in 8086 MP: [2]
MOV AX, 4000H;
TEST AH, 80H;
Ans: MOV AX, 4000H; [AX] = 4000H
TEST AH, 80H; [AH] and 80H = 40H and 80H (bitwise logical
AND operation)
[AX] = 4000H; ZF = 1; PF = 1.
c) Design an 8086 MP system to interface 32k×8 RAM using a 3-to-8-line
decoder. The starting address for RAM is 90000H. Draw the memory
map also. (The RAM chips are available in modules of 16k×8) [4]
Ans:
 Section-C
a) Draw the internal block diagram of 8086 MP and explain the formation
of the 20-bit physical address with a suitable example. [3.5]
Ans:

The 8086 microprocessor uses a segmented memory addressing

Q4 scheme, where a 20-bit physical address is generated using segment 3.5+2+2
and offset addresses.
Physical Address=(Segment Register×10H)+Offset Address
 The segment register (Base address) provides the upper 16 bits,
and the offset gives the displacement within that segment.
 The segment register is left-shifted by 4 bits (multiplied by 10H in
hexadecimal) before adding the offset to form a 20-bit address.
Example: Given Segment Register (CS) = 1000H, Offset Address (IP)
= 5678H. The 20-bit physical address = 10000H+5678H=15678H

b) Write an assembly language program with suitable comments to

multiply the content of AX by 66 using shift left instruction in 8086
MP. [2]
Ans:
[AX] × 66 = [AX] × (64+2) = ([AX]×2 )+([AX]×2 )
MOV AX, 1234H ; Load AX with some value (example: 1234H)
MOV BX, AX ; Copy AX to BX for later use
SHL AX, 6 ; [AX] = [AX] × 64 (Shift left by 6 bits)
SHL BX, 1 ; [BX] = [BX] × 2 (Shift left by 1 bit)
 ADD AX, BX ; [AX] = [AX] × 64 + [AX] × 2 ([AX] = [AX] × 66)

c) What is the use of REP, REPE/REPZ, and REPNE/REPNZ in string

instructions of 8086 MP? [2]
Ans:
In 8086 assembly language, the Repeat prefixes is used with string
instructions to perform repeated operations efficiently. It allows
processing of data without writing explicit loops.
1. REP (Repeat Prefix)
 Purpose: Repeats the execution of string instructions while CX ≠
0.
 Operation:
o The instruction executes once.
o CX is decremented after each execution.
o The process continues until CX = 0.
Example REP MOVSB
2. REPE / REPZ (Repeat while Equal / Repeat while Zero)
 Purpose: Repeats the string comparison instructions while CX ≠ 0
and ZF = 1 (zero flag is set).
 Operation:
o Execution continues as long as CX ≠ 0 and ZF = 1.
o Stops when CX = 0 or ZF = 0 (indicating a mismatch).
Example REPE SCASB
3. REPNE / REPNZ (Repeat while Not Equal / Repeat while Not Zero)
 Purpose: Repeats string comparison instructions while CX ≠ 0 and
ZF = 0 (zero flag is clear).
 Operation:
o Execution continues as long as CX ≠ 0 and ZF = 0.
o Stops when CX = 0 or ZF = 1 (indicating a match).
Example REPNE SCASB
a) Draw the maximum mode configuration of the 8086 MP system and
explain the significance of each IC in it. [3.5]
Ans:

Q5 3.5+2+2
 8086 Microprocessor: Acts as the main processor that executes
instructions.
8288 Bus Controller
 Generates control signals like 𝑀𝑅𝐷𝐶 , 𝑀𝑊𝑇𝐶 , 𝐼𝑂𝑅𝐶 ,
𝑎𝑛𝑑 𝐼𝑂𝑊𝐶 .
 Converts S0, S1, S2 signals from 8086 into proper control
signals.
 Helps manage memory and I/O operations.
8284 Clock Generator
 Provides the clock signal to synchronize operations.
 Generates reset and clock signals for proper system functioning.
74245/8286 bus transceiver is used to
 Buffer the address/data bus (AD0-AD15) to reduce loading on
the microprocessor.
 Enable bidirectional data transfer between CPU and memory/I/O.
 Provide isolation between different system components.
74373/8282 Octal latch:
 Latches the lower 16-bit address (AD0-AD15) from the 8086
processor.
 Uses ALE (Address Latch Enable) signal to latch the address.

b) Suppose the ASCII code of 6 is 36H. Write an 8086 assembly language

program with suitable comments to find a data ‘6’ is present in a string
array of 100 bytes located from the address 94000H in the extra
segment. [2]
Ans:
MOV AX, 9000H ; Load the extra segment (9000H)
MOV ES, AX ; Set extra segment
MOV DI, 4000H ; Starting offset of the string in ES
MOV CX, 0064H ; Loop counter (100 bytes)
MOV AL, 36H ; ASCII code of '6' to search
CLD ; Clear direction flag (scan forward)
REPNE:SCASB ; Scan the string, stop if AL is found (ZF=1) or
CX=0

c) How does the 8086 MP utilize memory banks to read/write 16-bit data
efficiently? Give an example. [2]
Ans:
The 8086 microprocessor has a 16-bit data bus, meaning it can read and
write 16-bit data in one memory cycle. To achieve efficient memory
access, 8086 uses a two-bank memory system:
 Even-addressed bank (lower byte, D0-D7)
 Odd-addressed bank (upper byte, D8-D15)
Each bank consists of 8-bit memory chips, allowing simultaneous
access to both bytes when needed.
Case 1: 16-bit word at an even address
 Both banks are enabled simultaneously, allowing a single
read/write cycle.
Efficient, as it completes in one cycle.
Case 2: 16-bit word at an odd address
  8086 first reads/writes the odd bank.
 Then, it reads/writes the even bank.
Requires two memory cycles, reducing efficiency.