EXP.
NO:04 DATE:
DELTA MODULATION
AIM:
To construct a Delta Modulator and to study its performance.
DEVICES, COMPNONENTS AND EQUIPMENT REQUIRED:
SL.NO NAME TYPE/RANGE QUANTITY
1 Op-amp IC 741 3
2 Dual D-Flipflop IC 4013 1
3 Resistors 10KΩ 3
4.7 KΩ 1
100 KΩ 2
4 Capacitors 0.01µF 2
5 Regulated Power Supply (0-30)V 1
6 Function Generator (0-1M)Hz 1
7 Cathode Ray Oscilloscope 30MHz 1
THEORY:
Delta modulation uses a single bit PCM code to achieve digital transmission of analog
signals. With conventional PCM each code is a binary representation of both sign and
magnitude by a particular sample. Therefore, the multiple bit code is required to represent to
the values that the samples can be with delta modulation, rather than transmit a coded
representation of samples. Gain for various messages is added to the points and the pulses are
represented in the receiver by a suitable multiplexer.
Assume N similar message are multiplexed each being band limited with the maximum
spectral extent of wf. At the transmitted side, the pulse modulator accepts an input gain of
constant amplitude clock pulses. Modulator, according to a rate of ws/2 pulses per second,
converts the pulses to an output, train of polar pulses with polarity determined by the error
signal e(t). If e(t)is positive at the time of any given input pulses, the output pulse is positive,
else it is negative.
e(t)= f(t)-fq(t)
Where f(t) = input message
fq(t) = feedback signal
Only a single bit is transmitted which simply indicate whether that sample is larger or
smaller than the previous sample. The algorithm of a delta modulation system is quite simple.
If the current sample is smaller than the previous sample the logical ’0’ is transmitted or else
logical ‘1’ is transmitted.
One bit coding is made possible by feedback which is an integral part of the encoding
process. The simplest form of delta modulation provides a staircase to the oversampled version
of an input base band signal. In delta modulation the modulator transmits binary output pulses
whose polarity depends on the difference between the modulating and feedback signal. These
generated pulses having duration ‘T’ which is short relative to the time Ts= 2/ws between the
sample pulses. Thus, the integrated output will be staircase type waveform with an up going
step for a negative pulse.
Each transmitted pulse is early encoded version of the signal e(t). The wave function of
the loop is to force out the fq(t) to be an approximation of f(0). With delta modulation, each
sample requires the transmission of any one bit. Therefore, the bit rate association with delta
modulation are lower than conventional PCM. However, the slope overload of granular noise
is the limitation of delta modulation.
∆=2δ ………(3.1)
Figure 3.1 Staircase approximation of Message signal
DIAGRAM:
MODEL GRAPH:
PROCEDURE:
1) Connections are given stage by stage as shown in figure 3.2.
2) The digital sampler is constructed first.
3) The message signal is applied to the non-inverting terminal of the comparator.
4) Without the feedback the waveforms are checked.
5) The sampling pulse is applied to the clock input of D-flipflop. Set the sampling
frequency much greater than twice the message frequency.
6) The output of the sampler is given to the integrated circuit.
7) The output of the inverting amplifier is given as input to the inverting terminal of the
comparator in the digital sampler.
8) With feedback the delta modulation output from the D-flipflop is observed.
TABLE:
Sl. No. Signals Amplitude(V(p-p)) Frequency (Hz)
1. Message Signal
2. Sampling Signal
3. Comparator Output
4. Integrator Output
5. Inverted Output
6. DM Output
RESULT:
Thus, the Delta Modulator has been constructed, studied and Output Waveforms Have
been Obtained
