Create a project in quartus :-
Give the name of the project and the give the project directory where we wanted to create
● After giving the directory click next .
● Then again click next and again click next .
● Now we can see the window of selecting the board of de1 soc / selected the board by
move to
Board >> de1 soc board
● Click next >> finish
● Go to tools >> platform designer ( qsys designer)
● Select the ip which we are required
●
● The above thing is my design
● Generate HDL after successfully generate hdl click the finish
Note :- If you are facing any error in the address related things (address overlapping) .
We are going to change the address map of the section present in the view / beside of
the system content
The above thing is related to address map . we can edit the address of the components
Next step is project navigator >> FIles >> Right click in the FIles >> add files
We are generating the qsys design that will be generate some files in that we are using only
(.qip file)
Note: This qip file is present in the project directory in that qsys’s named folder is
there in that go to synthesis we will find that file
Example path:-
/home/user/Documents/projects/FPGA_DMA_custom_ram/soc_system/synthesis
Note :- my qsys file name is soc_system
● Write a verilog file to instantiate the hps module for that we have to write the code
● After completion of writing the code analysis and synthesis
● After successfully running that we have to give the .qsf file( related to pin
configuration)
For that we have to download the file from github . Use the GitHub download the pin planner
file(.qsf) for de1 soc board otherwise use the previous projects file
Github link:- https://github.com/norxander/DE1-SoC-HPSFPGA/blob/master/DE1_SoC.qsf
● Apply pin assignments in Quartus:
● For assigning the pins we have to go to
Assignments -> import assignments ->add the file path and click OK
● Run the tcl scripts ➖
● Go to Tools >> tcl scripts >> run parameters.tcl and pin_assignments.tcl
● Compile the Design
● Run full compilation in Quartus (Click on Complie Design).
● On success, locate the hps_isw_handoff directory inside the handoff/ folder.
This will be needed for U-Boot setup.
U-boot settings:-
● Go to the project directory open terminal
● mkdir software && cd software
● mkdir bootloader && cd bootloader
● git clone https://github.com/altera-opensource/u-boot-socfpga
● cd u-boot-socfpga
Now you are there in the u-boot-socfpga location your project
● cd arch/arm/mach-socfpga/cv_bsp_generator
● Run the below command
python3 cv_bsp_generator.py \ -i
/home/user/Downloads/sdram_project/hps_isw_handoff/soc_system_hps_0 \ -
o ../../../../board/altera/cyclone5-socdk/qts
● After this, it will create a .h files
cd ../../../..
● Now you are there in the u-boot-socfpga location your project
● Downloading the packages we have to execute this commands
export CROSS_COMPILE=arm-none-linux-gnueabihf-
make socfpga_cyclone5_defconfig
make -j 48
To check if it is successfully executed or not by checking the below files are
generated successfully or not :-(if generated it is running successfully otherwise it
won’t)
● spl/u-boot-spl – SPL ELF
● u-boot – U-Boot ELF
● u-boot-with-spl.sfp – Final bootable image
● Previously we are also having the sd card folder (sd_card) we can download it from
teams or from previous project
Teams link :- sd_card.zip
● Copy the sfp file which is generated previously in the u-boot step
Location of the project :-
/home/user/Documents/projects/FPGA_DMA_custom_ram/software/bootloader/u-boot-
socfpga
After this go to sd_card folder :-
Run this command:-
sudo python3 ./make_sdimage_p3.py -f \
-P u-boot-with-spl.sfp,num=3,format=raw,size=10M,type=A2 \
-P sdfs/*,num=1,format=fat,size=100M \
-P rootfs/*,num=2,format=ext3,size=300M \
-s 512M \
-n sdcard_cv.img
Note :- The above command creates the image which we are use it for burning the sd
card
● Burn Image to SD Card
sudo dd if=sdcard_cv.img of=/dev/sdX bs=4M status=progress
sync
In this dev/sdX replace X with respective value after running the command lsblk in that
119GB sd card is the memory we are used .
