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Paging Memory Management

Paging is a memory management technique that allows noncontiguous physical address spaces by dividing memory into fixed-size blocks called frames and logical memory into pages. Each process has a page table that maps page numbers to frame numbers, facilitating the translation of logical addresses to physical addresses. Although paging improves memory utilization and reduces fragmentation, it introduces overhead due to the management of page tables and address translation time.

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36 views3 pages

Paging Memory Management

Paging is a memory management technique that allows noncontiguous physical address spaces by dividing memory into fixed-size blocks called frames and logical memory into pages. Each process has a page table that maps page numbers to frame numbers, facilitating the translation of logical addresses to physical addresses. Although paging improves memory utilization and reduces fragmentation, it introduces overhead due to the management of page tables and address translation time.

Uploaded by

pujarinidhi3
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Paging Memory Management – Explanation with Example

What is Paging?

Paging is a memory management scheme that allows the physical address space of a process to
be noncontiguous (not in a single block). This solves the problem of finding continuous blocks of
memory and avoids external fragmentation.

How Paging Works:

• Physical Memory (RAM) is divided into fixed-size blocks called frames.

• Logical Memory (the memory space of a program or process) is also divided into blocks
of the same size called pages.

• The size of a page = size of a frame (e.g., 1 KB or 4 KB).

Backing Store:

• The backing store (like a hard disk) also stores data in blocks of the same size.

• If some pages in memory need to be swapped out (removed), they are stored in the
backing store.

Page Table:

Each process has a page table that:

• Maps page numbers to frame numbers.

• Helps the CPU translate logical addresses to physical addresses.

When a Process is Loaded:

1. Process arrives in the system.

2. Its size (e.g., 4 pages) is calculated.

3. The operating system checks if at least 4 frames are available.


4. Pages are loaded into available frames.

5. The page table is updated with the corresponding frame numbers.

Example of Paging

Let’s assume:

• A process has 4 pages: Page 0, Page 1, Page 2, Page 3.

• Physical memory has 8 frames: Frame 0 to Frame 7.

Let’s say the page table for this process looks like:

Page Number Frame Number

0 3

1 1

2 5

3 2

What this means:

• Page 0 is stored in Frame 3

• Page 1 is stored in Frame 1

• Page 2 is stored in Frame 5

• Page 3 is stored in Frame 2

So, even though the pages are numbered in order, their corresponding frames in RAM can be
anywhere. This shows the non-contiguous nature of memory in paging.

Example – Address Translation

Assume:

• Each page = 1 KB = 1024 bytes


If CPU generates a logical address = 2049:

1. Page Number = 2049 ÷ 1024 = 2 (Integer part)

2. Offset = 2049 % 1024 = 1

From the page table:


Page 2 is in Frame 5

So, Frame 5’s base address = 5 × 1024 = 5120


Now, add the offset (1):

Physical Address = 5120 + 1 = 5121

Summary of Paging:

Feature Description

Divides Memory Into Fixed-sized blocks: Pages (Logical) & Frames (Physical)

Removes Fragmentation No external fragmentation

Needs Extra Structure Page Table (one per process)

Address Translation Done using page number and offset

Advantage Efficient memory use, easy allocation

Disadvantage Overhead due to page table and time to translate address

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