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ELEC Lecture 4

The document outlines the seven addressing modes of the 80x86 CPU, including Register, Immediate, Direct, Register Indirect, Based Relative, Indexed Relative, and Based Indexed Relative. Each mode is described with its characteristics, examples, and how physical addresses are calculated. Additionally, it discusses segment overrides and provides examples of translating assembly language instructions into machine code.

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0% found this document useful (0 votes)
10 views20 pages

ELEC Lecture 4

The document outlines the seven addressing modes of the 80x86 CPU, including Register, Immediate, Direct, Register Indirect, Based Relative, Indexed Relative, and Based Indexed Relative. Each mode is described with its characteristics, examples, and how physical addresses are calculated. Additionally, it discusses segment overrides and provides examples of translating assembly language instructions into machine code.

Uploaded by

emadf5227
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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80x86 ADDRESSING MODES

 The CPU can access operands (data) in various ways, called addressing
modes.

 The 80x86 provides a total of seven distinct addressing modes:


1. Register
2. Immediate
3. Direct
4. register indirect
5. Based relative
6. Indexed relative
7. Based indexed relative

15 SVU ACADEET Dr. M Ibrahim Assembly Language


Register addressing mode
 The operands are inside the microprocessor.
 The register addressing mode involves the use of registers to hold the
data to be manipulated.
 Memory is not accessed when this addressing mode is executed;
 It is relatively fast
 Examples:
MOV BX,DX ; copy the contents of DX into BX
MOV ES,AX ; copy the contents of AX into ES
ADD AL,BH ; add the contents of BH to contents of AL

 The source and destination registers must match in size.


MOV CL,AX ; this instruction will give an error

16 SVU ACADEET Dr. M Ibrahim Assembly Language


Immediate addressing mode
 In the immediate addressing mode, the source operand is a constant.
 In immediate addressing mode, as the name implies, when the instruction
is assembled, the operand comes immediately after the opcode.
 For this reason, this addressing mode executes quickly.
 However, in programming it has limited use.
 Immediate addressing mode can be used to load information into any of
the registers except the segment registers and flag registers.
 Examples:
MOV AX,2550H ; move 2550H into AX
MOV CX,625 ; load the decimal value 625 into CX
MOV BL,40H ; load 40H into BL
MOV DS,0123H ; illegal

17 SVU ACADEET Dr. M Ibrahim Assembly Language


Direct addressing mode
 In the direct addressing mode the data is in some memory location(s) and
the address of the data in memory comes immediately after the
instruction.
 Note that in immediate addressing, the operand itself is provided with the
instruction, whereas in direct addressing mode, the address of the
operand is provided with the instruction.
 This address is the offset address and one can calculate the physical
address by shifting left the DS register and adding it to the offset as
follows:
MOV DL,[2400] ;move contents of DS:2400H into DL
 Notice the bracket [ ] around the address.
 In the absence of this bracket it will give an error since it is interpreted to
move the value 2400 (16-bit data) into register DL, an 8-bit register.
MOV DL,2400 ; move 2400 into DL illegal

18 SVU ACADEET Dr. M Ibrahim Assembly Language


Example
 Find the physical address of the memory location and its contents after
the execution of the following instructions
assuming that DS = 1512H.
MOV AL,99H ; AL is initialized to 99H
MOV [3518],AL

 Solution:
 The contents of AL are moved to logical address DS:3518 which is
1512:3518.
 The physical address: 18638H (151210H + 3518H = 18638H).
 That means after the execution of the second instruction, the memory
location with address 18638H will contain the value 99H.

19 SVU ACADEET Dr. M Ibrahim Assembly Language


Register indirect addressing mode
 In the register indirect addressing mode, the address of the memory location
where the operand resides is held by a register.
 The registers used for this purpose are SI, DI, and BX.
 If these three registers are used as pointers, they must be combined with DS
in order to generate the 20-bit physical address.
Example:
MOV AL,[BX] ; AL contents of the memory location pointed to by DS:BX
 Notice that BX is in brackets.
 In the absence of brackets: MOV AL,BX  illegal
 Physical address: DS10H+ BX
 The same rules apply when using register SI or DI.
MOV CL,[SI] ; move contents of DS:SI into CL (move a byte)
MOV [DI],AH ; move contents of AH into DS:DI (move a byte)

20 SVU ACADEET Dr. M Ibrahim Assembly Language


Example
 Assume that DS = 1120, SI = 2498, and AX = 17FE. Show the contents of
memory locations after the execution of
MOV [SI],AX

 Solution:
 The contents of AX are moved into memory locations with logical
address DS:SI and DS:SI + 1
 The physical address: DS10H + SI = 13698.
 According to the little endian convention
 low address 13698H contains FE, the low byte, and
 high address 13699H will contain 17, the high byte.

21 SVU ACADEET Dr. M Ibrahim Assembly Language


Based relative addressing mode
 In the based relative addressing mode, base registers BX and BP, as well
as a displacement value, are used to calculate what is called the physical
address.
Physical address = segment register10H + offset register + displacement
 The default segments are DS for BX and SS for BP.
 For example:
MOV CX,[BX]+10 ; move DS:BX+10 and DS:BX+10+1 into CX
MOV CX,[BX+10] ; BX+10 is called the effective address
MOV CX,10[BX] ; BX is called the offset address
 Physical address: DS10H + BX + 10
 The low address contents will go into CL and the high address contents into
CH. In the case of the BP register,
MOV AL,[BP]+5 ; PA = SS 10H + BP + 5
MOV AL,[BP+5] ; BP+5 is called the effective address
MOV AL,5[BP] ; BP is called the offset address

22 SVU ACADEET Dr. M Ibrahim Assembly Language


Indexed relative addressing mode
 The indexed relative addressing mode works the same as the based
relative addressing mode, except that registers DI and SI hold the offset
address.
MOV DX,[SI]+5 ; PA=DS10H + SI + 5
MOV CL,[DI]+20 ; PA=DS10H + DI + 20

Example
 Assume that DS = 4500, SS = 2000, BX = 2100, SI = 1486, DI = 8500, BP
= 7814, and AX = 2512. Show the exact physical memory location where
AX is stored in each of the following. All values are in hex.
MOV [BX]+20,AX MOV [SI]+10,AX MOV [DI]+4,AX MOV [BP]+12,AX
 Solution:
DS:BX+20 location 47120 = (12) and 47121 = (25)
DS:SI+10 location 46496 = (12) and 46497 = (25)
DS:DI+4 location 4D504 = (12) and 4D505 = (25)
SS:BP+12 location 27826 = (12) and 27827 = (25)

23 SVU ACADEET Dr. M Ibrahim Assembly Language


Based indexed addressing mode
 By combining based and indexed addressing modes, a new addressing
mode is derived called the based indexed addressing mode.
 In this mode, one base register and one index register are used.

Examples:
 MOV CL,[BX][DI]+8 ; PA = DS10H + BX + Dl + 8

 MOV CH,[BX][SI]+20 ; PA = DS 10H + BX + SI + 20

 MOV AH,[BP][DI]+12 ; PA = SS 10H + BP + DI + 12


 MOV AH,[BP][SI]+29 ;PA = SS 10H + BP + SI + 29

 MOV AH,[BP+SI+29]

 MOV AH,[SI+BP+29] ;the register order does not matter.

 MOV AX,[SI][DI]+10 ;illegal.

24 SVU ACADEET Dr. M Ibrahim Assembly Language


Summary of 80x86 Addressing Modes
Addressing Mode Operand Default Segment
Register register none
Immediate data none
Direct [offset] DS
Register indirect [BX] DS
[SI] DS
[DI] DS
Based relative [BX]+disp DS
[BP]+disp SS
Indexed relative [DI]+disp DS
[SI]+disp DS
Based indexed relative [BX][SI]+disp DS
[BX][DI]+disp DS
[BP][SI]+ disp SS
[BP] [DI]+ disp SS
25 SVU ACADEET Dr. M Ibrahim Assembly Language
Offset Registers for Various Segments
Segment register: Offset register (s):
CS IP
DS SI, DI, BX
ES SI, DI, BX
SS SP, BP

 The 80x86 CPU allows the program to override the default segment and
use any segment register.
 MOV AL,[BX]
; the physical address of the operand to be moved into AL is DS:BX
 MOV AL,ES:[BX]
; the address of the operand being moved to AL is ES:BX instead of
DS:BX.

26 SVU ACADEET Dr. M Ibrahim Assembly Language


Segment overrides

Default Segment
Instruction Instruction
Segment Used

MOV AX,[BP] SS:BP MOV AX,CS:[BP] CS:BP

MOV DX,[SI] DS:SI MOV DX,SS:[SI] SS:SI

MOV AX,[BP] SS:BP MOV AX,DS:[BP] DS:BP

MOV CX,[BX]+12 DS:BX+12 MOV CX,ES:[BX1+12 ES:BX+12

MOV [BX][DI]+32,AX DS:BX+DI+32 MOV SS:[BX][DI]+32,AX SS:BX+DI+32

27 SVU ACADEET Dr. M Ibrahim Assembly Language


Translating to Machine Code
Translate the following Assembly language instructions into machine code

MOV AL,57H

MOV DH,86H

MOV DL,72H

MOV CX,DX

MOV BH,AL

MOV BL,9FH

MOV AH,20H

ADD AX,DX

ADD CX,BX

ADD AX,1F35H

28 SVU ACADEET Dr. M Ibrahim Assembly Language


Assembly Language / Machine Code
Assembly Machine Logical address Physical
language language (CS:IP) address
MOV AL,57H B057 1132:0100 11420
MOV DH,86H B686 1132:0102 11422
MOV DL,72H B272 1132:0104 11424
MOV CX,DX 89D1 1132:0106 11426
MOV BH,AL 88C7 1132:0108 11428
MOV BL,9FH B39F 1132:010A 1142A
MOV AH,20H B420 1132:010C 1142C
ADD AX,DX 01D0 1132:010E 1142E
ADD CX,BX 01D9 1132:0110 11430
ADD AX,1F35H 05351F 1132:0112 11432
29 SVU ACADEET Dr. M Ibrahim Assembly Language
Machine Code
Logical address Physical address Machine code contents
1132:0100 11420 B0
1132:0101 11421 57
1132:0102 11422 B6
1132:0103 11423 86
1132:0104 11424 B2
1132:0105 11425 72
1132:0106 11426 89
1132:0107 11427 D1
1132:0108 11428 88
1132:0109 11429 C7
1132:010A 1142A B3
1132:010B 1142B 9F
1132:010C 1142C B4
1132:010D 1142D 20
1132:010E 1142E 01
1132:010F 1142F D0
1132:0110 11430 01
1132:0111 11431 D9
1132:0112 11432 05
1132:0113 11433 35
1132:0114 11434 1F
30 SVU ACADEET Dr. M Ibrahim Assembly Language
Data Segment
Write a program that adds 5 bytes of data, such as 25H, 12H, 15H, 1FH,
and 2BH, where each byte represents a person's daily overtime pay.
 Answer
MOV AL,0 ; initialize AL
ADD AL,25H ; add 25H to AL
ADD AL,12H ; add 12H to AL
ADD AL,15H ; add 15H to AL
ADD AL,1FH ; add 1FH to AL
ADD AL,2BH ; add2BHtoAL

 -ve
 The data and code are mixed together in the instructions.
 Changing in data  the code must be searched for every place the
data is included, and the data retyped.
 In 80x86 microprocessors, the area of memory set aside for data is called
the data segment.
 the data segment uses register DS and an offset value.

31 SVU ACADEET Dr. M Ibrahim Assembly Language


Data Segment (Cont.)
 Assume that the offset for the data segment begins at 200H.
The data is placed in memory locations:
DS:0200 = 25
DS:0201 = 12
DS:0202 = 15
DS:0203 = 1F
DS:0204 = 2B
 The program can be rewritten as follows:
MOV AL, 0 ; clear AL
ADD AL,[0200] ; add the contents of DS:200 to AL
ADD AL,[0201] ; add the contents of DS:201 to AL
ADD AL,[0202] ; add the contents of DS:202 to AL
ADD AL,[0203] ; add the contents of DS:203 to AL
ADD AL,[0204] ; add the contents of DS:204 to AL
 The brackets [ ] indicate that the operand represents the address of the
data and not the data itself.

32 SVU ACADEET Dr. M Ibrahim Assembly Language


Data Segment (Cont.)
 CS uses only the IP register as an offset
 The 8086/88 allows only the use of registers BX, SI, and DI as
offset registers for the data segment.
 DS uses only BX, DI, and SI to hold the offset address of the data.

 DS:0200 = 25 DS:0201 = 12 DS:0202 = 15


DS:0203 = 1F DS:0204 = 2B
MOV AL,0 ; initialize AL
MOV BX,0200H ; BX points to the offset address of first byte
ADD AL,[BX] ; add the first byte to AL
INC BX ; increment BX to point to the next byte
ADD AL,[BX] ; add the next byte to AL
INC BX ; increment the pointer
ADD AL,[BX] ; add the next byte to AL
INC BX ; increment the pointer
ADD AL,[BX] ; add the last byte to AL

33 SVU ACADEET Dr. M Ibrahim Assembly Language


Logical and Physical address in Data Segment

Example: If DS = 7FA2H and the offset is 438EH,


(a) Calculate the physical address.
(b) Calculate the lower range of the data segment.
(c) Calculate the upper range of the data segment.
(d) Show the logical address.

Solution:
(a) The physical address  83DAE (7FA20 + 438E)
(b) The lower range of the data segment  7FA20 (7FA20 + 0000)
(c) The upper range of the data segment  8FAlF (7FA20 + FFFF)
(d) The logical address  7FA2:438E

34 SVU ACADEET Dr. M Ibrahim Assembly Language

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