P-Channel Power MOSFETs Data Sheet
P-Channel Power MOSFETs Data Sheet
Packaging
JEDEC TO-220AB JEDEC TO-251AA
SOURCE SOURCE
DRAIN DRAIN
GATE GATE
DRAIN (FLANGE)
DRAIN (FLANGE)
JEDEC TO-252AA
DRAIN (FLANGE)
GATE
SOURCE
4-117 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
[Link] or 407-727-9207 | Copyright © Intersil Corporation 1999.
RFD8P06E, RFD8P06ESM, RFP8P06E
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
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RFD8P06E, RFD8P06ESM, RFP8P06E
1.2 -10
POWER DISSIPATION MULTIPLIER
1.0
-8
-4
0.4
0.2 -2
0 0
0 25 50 75 100 125 150 175 25 50 75 100 125 150 175
TC , CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE
0.5
THERMAL IMPEDANCE
ZθJC , NORMALIZED
0.2
PDM
0.1
0.1
0.05
t1
0.02 t2
0.01
NOTES:
SINGLE PULSE DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
0.01
10-5 10-4 10-3 10-2 10-1 100 101
t 1, RECTANGULAR PULSE DURATION (s)
-100 -102
TC = 25oC, TJ = MAX RATED
FOR TEMPERATURES ABOVE 25oC
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
IDM , PEAK CURRENT (A)
ID , DRAIN CURRENT (A)
100µs
-10
175 – T C
VGS = -20V I = I 25 ----------------------
150
1ms
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY
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RFD8P06E, RFD8P06ESM, RFP8P06E
-30 -20
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
IAS , AVALANCHE CURRENT (A)
STARTING TJ = 150oC
VGS = -6V
If R = 0 -5
tAV = (L) (IAS) / (1.3RATED BVDSS - VDD) VGS = -4.5V VGS = -5V
If R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
-1 0
0.01 0.1 1 10 0 -1.5 -3.0 -4.5 -6.0 -7.5
tAV, TIME IN AVALANCHE (ms) VDS, DRAIN TO SOURCE VOLTAGE (V)
-20 2.5
VDD = -15V -55oC PULSE DURATION = 80µs
1.5
-10
175oC 1.0
-5
0.5
0 0
0 -2 -4 -6 -8 -10 -80 -40 0 40 80 120 160 200
VGS, GATE TO SOURCE VOLTAGE (V) TJ , JUNCTION TEMPERATURE (oC)
2.0 2.0
VGS = VDS, ID = 250µA ID = 250µA
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1.5
THRESHOLD VOLTAGE
1.5
NORMALIZED GATE
1.0 1.0
0.5 0.5
0 0
-80 -40 0 40 80 120 160 200 -80 -40 0 40 80 120 160 200
TJ , JUNCTION TEMPERATURE (oC) TJ , JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
TEMPERATURE VOLTAGE vs TEMPERATURE
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RFD8P06E, RFD8P06ESM, RFP8P06E
CISS
RL = 1.2Ω
600
IG(REF) = 1.45mA
-30 -5.0
0.75 BVDSS 0.75 BVDSS
400 0.50 BVDSS 0.50 BVDSS
COSS 0.25 BVDSS 0.25 BVDSS
-15 -2.5
200 VGS = -10V
CRSS
0 0 0.0
IG(REF) IG(REF)
0 -5 -10 -15 -20 -25 t, TIME (µs)
20 80
VDS , DRAIN TO SOURCE VOLTAGE (V) IG(ACT) IG(ACT)
VDS
tAV
L 0
VARY tP TO OBTAIN
-
REQUIRED PEAK IAS RG
VDD
+
0V DUT VDD
IAS
tP VDS
IAS tP
-VGS 0.01Ω
BVDSS
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
tON tOFF
td(ON) td(OFF)
tr tf
RL 0
10% 10%
VDS -
VGS +
VDS
90% 90%
0V 0
10%
RGS DUT
50% 50%
-VGS PULSE WIDTH
VGS
90%
FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
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RFD8P06E, RFD8P06ESM, RFP8P06E
VDS
Qg(TH)
VDS
0
RL
VGS = -2V
0
Ig(REF)
FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORMS
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RFD8P06E, RFD8P06ESM, RFP8P06E
+
EGS 13 8 6 8 1 EVTO MOS2
GATE RGATE 21
-
+
ESG 5 10 6 8 1 9 18 11
EVTO 20 6 8 18 1 1 20 8 MOS1
LGATE 6
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 -0.804
ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/22,9))}
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options;
written by William J. Hepp and C. Frank Wheatley.
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RFD8P06E, RFD8P06ESM, RFP8P06E
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