EE 121B:

Principles of
Semiconductor Device Design
Lecture 6:
Metal-Semiconductor Contacts (continued)
pn Junction Diodes
Sam Emaminejad
 Course Overview
1. Semiconductor Properties
2. Metal-Semiconductor Contacts
3. P-N Junction
4. MOS Devices
5. Bipolar Junction Transistor
Metal-Oxide-Semiconductor (MOS)
Field-Effect Transistor (FET)

http://qph.is.quoracdn.net/main-qimg-38a99b4f215e161bf31964795cfce7d2?convert_to_webp=true
 Lecture 6
OUTLINE
• Metal-Semiconductor Contacts (cont’d)
• pn Junction Diodes
– Electrostatics (step junction)
Reading: Pierret 14.2-14.3, 5; Hu 4.17-4.21, 4.1-4.2
 Recall: FM > FS, n-type

The Depletion Approximation

The semiconductor is depleted of mobile carriers to a depth W
n and p each is much less than the net dopant
concentration (ND-NA) within the depleted region

 In the depleted region (0  x  W ):

r = q (ND – NA)

Beyond the depleted region (x > W ):

r=0

R.F. Pierret, Semiconductor Fundamentals, Fig. 14.4

 Poisson’s equation
Electrostatics 𝜌 𝑥 →E 𝑥 →𝑉 𝑥

• Poisson’s equation:  r qN D E
= 
x s s
𝑞𝑁𝐷 𝑞𝑁𝐷 +++
E 𝑥 =න 𝑑𝑥 = 𝐴𝑥 + 𝐵 = 𝑥+𝐵
𝜀𝑠 𝜀𝑠 𝑑E 𝑞𝑁𝐷
slope = 𝐴 = =
𝑑𝑥 𝜀𝑠
Boundary condition:
𝑞𝑁𝐷 𝑞𝑁𝐷
E 𝑊 =0→E 𝑊 = 𝑊+𝐵 =0→𝐵 =− 𝑊
𝜀𝑠 𝜀𝑠
• The solution is:  (x ) = − qN (W − x )
D

𝑑𝑉 𝑑E 𝑞𝑁𝐷
E=− slope = =
𝑑𝑥 𝜀𝑠
𝑑𝑥

V ( x ) = −   ( x)dx
𝑞𝑁𝐷 Choose
=න 𝑊 − 𝑥 𝑑𝑥 𝑉 𝑥=𝑊 =0
𝜀𝑠
𝑞𝑁𝐷 2
=− 𝑊−𝑥
2𝜀𝑠

R.F. Pierret, Semiconductor Fundamentals, Fig. 14.4

 Depletion Width, W
Higher 𝑁𝐷

− qN D
V (x ) = (W − x )2
2K S 0

11.7 for Si (𝜀𝑆𝑖 = 10−12 F/cm)

Area = Voltage
At x = 0, V = -Vbi dropped across Si

2 sVbi 𝑑E
 W= Slope =
𝑑𝑥
qN D =𝜀 =
𝜌 𝑞𝑁𝐷
𝑠 𝜀𝑠

• W decreases with increasing ND

R.F. Pierret, Semiconductor Fundamentals, Fig. 14.4

 Depletion Width, W, for VA  0
𝑉𝐴 > 0 Forward bias

− qN D
V (x ) = (W − x )2
2K S 0

At x = 0, V = - (Vbi - VA)

2 s (Vbi − VA )
 W= Slope ∝ 𝑁𝐷
qN D

• W increases with increasing –VA

• W decreases with increasing ND

R.F. Pierret, Semiconductor Fundamentals, Fig. 14.4

 W for p-type Semiconductor
I V
Reverse 𝑉𝑏𝑖
V (x ) = (W − x )2
bias qN A
2 K S 0 x
Forward VA
bias
p-type
At x = 0, V = Vbi + VA semiconductor
ρ
2 s (VA + Vbi ) W
 W= - x
qN A −𝑞𝑁𝐴

• W increases with increasing VA E

• W decreases with increasing NA
x
Charge Storage in a Schottky Diode
• Charge is “stored” on both sides of the M-S contact.
– The applied bias VA modulates this charge.
A change in VA requires charge to be
added/subtracted on each side of the contact

+ VA - Amount by which the

𝜌 𝑥 when 𝑉𝐴 depleted region charge
e + is increased is reduced when 𝑉𝐴 is
e
M ++ Si increased, by adding
++ electrons to “cover up”
I 𝑥=0 𝑥=𝑊 ionized donors at the
edge of the depleted
region
Charge stored in
metal is reduced by
removing electrons
R.F. Pierret, Semiconductor Fundamentals, Fig. 14.4
 Small-Signal Capacitance
• If an a.c. voltage va is applied in series with the d.c. bias VA,
the charge stored in the Schottky contact will be modulated at
𝑑𝑄 𝑑𝑣𝑎
the frequency of the a.c. voltage ∆𝑄 = 𝐶∆𝑉 → =𝐶
dva 𝑑𝑡 𝑑𝑡
→ displacement current will flow: i=C
dt
Parallel-plate small-signed capacitance
VA + va -
Metal
Semiconductor + - ~
W depleted of s
mobile change C=A M
+ +
+ Si
Conductive W I
+ +
semiconductor
Junction area 0 W x
region
 Using C-V Data to Determine FB
s s qN D s
C=A =A =A
W 2 s 2(Vbi − VA )
(Vbi − VA )
qN D
1/C2
Forward
1 2(Vbi − VA ) Slope
bias
= → ND

C 2
qN D s A2 Reverse Vbi VA
bias

Once Vbi and ND are known, FBn can be determined:

Nc
qVbi = F Bn − ( Ec − EF ) FB = F Bn − kT ln
ND
 pn Junctions
• A pn junction is typically fabricated by implanting or diffusing
donor atoms into a p-type substrate to form an n-type layer:
As+ or P+

Wafer surface is neutralized

by an electron gun as ions
are implemented

C. C. Hu, Modern Semiconductor Devices for ICs, Figure 4-1

• A pn junction has a rectifying current-vs.-voltage characteristic:

C. C. Hu, Modern Semiconductor Devices for ICs, Figure 4-2

Terminology
Net Doping Profile:

Junction

R.F. Pierret, Semiconductor Fundamentals, Figure 5.1

 Idealized pn Junctions
R.F. Pierret, Semiconductor Fundamentals, Figure 5.2

• In the analysis going forward, we will consider only the net

dopant concentration on each side of the pn junction:
NA  net acceptor doping on the p side: (NA-ND)p-side
ND  net donor doping on the n side: (ND-NA)n-side
Electrostatics (Step Junction)
Band diagram:

P-side N-side
1
𝑉 = (𝐸𝑟𝑒𝑓 − 𝐸𝑐 )
𝑞
Electrostatic potential:

𝑑𝑉
Electric field: E=−
𝑑𝑥 𝑠𝑙𝑜𝑝𝑒 ∝ 𝜌 < 0 𝑠𝑙𝑜𝑝𝑒 ∝ 𝜌 > 0

𝑑E 𝜌
=
𝑑𝑥 𝜀𝑠 𝑞𝑁𝐷

−𝑥𝑝 𝑥𝑛 Depletion width

Charge density: 𝑊 = 𝑥𝑛 + 𝑥𝑝

−𝑞𝑁𝐴

R.F. Pierret, Semiconductor Fundamentals, Figure 5.4

“Game Plan” to obtain r(x), E(x), V(x)
1. Find the built-in potential Vbi
2. Use the depletion approximation → r (x)
(depletion widths xp, xn unknown)

3. Integrate r (x) to find E(x)

Apply boundary conditions E(-xp)=0, E(xn)=0

4. Integrate E(x) to obtain V(x)

Apply boundary conditions V(-xp)=0, V(xn)=Vbi

5. For E(x) to be continuous at x=0, NAxp = NDxn

Solve for xp, xn
 Built-In Potential Vbi
qVbi = F S p −side − F S n −side = ( Ei − EF ) p −side + ( EF − Ei ) n −side
Difference between work functions on p-side vs. n-side

𝐸𝑖 − 𝐸𝐹 p-side
𝐸𝐹 − 𝐸𝑖 n-side

R.F. Pierret, Semiconductor Fundamentals, Figure 5.4a

For non-degenerately doped material:

p = ni e ( Ei − E F ) / kT n = ni e ( EF − Ei ) / kT
 p n
( Ei − EF ) p − side = kT ln   ( E F − Ei ) n − side = kT ln  
 ni   ni 
 NA   ND 
= kT ln   = kT ln  
 i 
n  i 
n
𝑁𝐴 𝑁𝐷 𝑁𝐴 𝑁𝐷
𝑞𝑉𝑏𝑖 = 𝑘𝑇𝑙𝑛 + 𝑘𝑇𝑙𝑛 = 𝑘𝑇𝑙𝑛( 2 )
𝑛𝑖 𝑛𝑖 𝑛𝑖
What if one side is degenerately doped?
qVbi = ( Ei − EF ) p − side + ( EF − Ei )n − side

p+n junction n+p junction

E𝐺 E𝐺
For p+-Si, 𝐸𝑖 − 𝐸𝐹 = For n+-Si, 𝐸𝐹 − 𝐸𝑖 =
2 2
Ec
Ec = EF
𝐸𝑖 − 𝐸𝐹
Ei Ei
𝐸𝑖 − 𝐸𝐹
Ev = EF Ev

E𝐺 𝑁𝐷 E𝐺 𝑁A
𝑞𝑉𝑏𝑖 = + 𝑘𝑇𝑙𝑛 𝑞𝑉𝑏𝑖 = + 𝑘𝑇𝑙𝑛
2 𝑛𝑖 2 𝑛𝑖
 The Depletion Approximation
R.F. Pierret, Semiconductor Fundamentals, Figure 5.6

In the depletion region

on the p side, r = –qNA
𝑑E −𝑞𝑁𝐴
Poisson’s Eq’n: =
𝑑𝑥 𝜀𝑠

 ( x) = − qN

A
x + C1 = −
qN A
s
(x + x )
p
s
@𝑥 = −𝑥𝑝 , E = 0
In the depletion region
on the n side, r = qND
𝑑E 𝑞𝑁𝐷
Poisson’s Eq’n: =
𝑑𝑥 𝜀𝑠

 ( x) = qN D
x + C1 =
qN D
s
( x − xn )
s
@𝑥 = 𝑥𝑛 , E = 0
 Electric Field Distribution
E(x)
-xp xn
x

𝑑E −𝑞𝑁𝐴 𝑑E 𝑞𝑁𝐷
𝑠𝑙𝑜𝑝𝑒 = = <0 𝑠𝑙𝑜𝑝𝑒 = = >0
𝑑𝑥 𝜀𝑠 𝑑𝑥 𝜀𝑠
𝑞𝑁𝐴 𝑞𝑁𝐷
E(𝑥) = − 𝑥 + 𝑥𝑝 E(𝑥) = 𝑥 − 𝑥𝑛
𝜀𝑠 𝜀𝑠

E(𝑥 = 0−) 𝑞𝑁𝐷

E(𝑥 = 0+) = − 𝑥
𝑞𝑁𝐴 𝜀𝑠 𝑛
=− 𝑥
𝜀𝑠 𝑝
The electric field is continuous at x = 0
→ NAxp = NDxn
Electrostatic Potential Distribution
𝑞𝑁𝐴 𝑑𝑉
On the p side: E(𝑥) = −
𝜀𝑠
𝑥 + 𝑥𝑝 E=−
𝑑𝑥

0 𝑉
qN A
V ( x) = ( x + x p ) 2 + D1
2 s 𝑉𝑏𝑖
If 𝑉 = 0, @ 𝑥 = −𝑥𝑝

Choose V(-xp) to be 0 0
−𝑥𝑝 𝑥𝑛 𝑥
 V(xn) = Vbi

𝑞𝑁𝐷 𝑑𝑉
On the n side: E(𝑥) =
𝜀𝑠
𝑥 − 𝑥𝑛 E=−
𝑑𝑥
𝑉𝑏𝑖
qN D qN D
V ( x) = − ( xn − x ) + D2 = Vbi −
2
( xn − x )2
2 s 2 s
𝑉 = 𝑉𝑏𝑖 , @ 𝑥 = 𝑥𝑛
 Derivation of Depletion Width
• At x = 0, expressions for p side and n side must be equal:
− 𝑞𝑁𝐴 + 𝑞𝑁𝐷
𝑉(𝑥 = 0 ) = (0 + 𝑥𝑝 )2 𝑉(𝑥 = 0 ) = 𝑉𝑏𝑖 − (𝑥𝑛 − 0)2
2𝜀𝑠 2𝜀𝑠

𝑞𝑁𝐴 2 𝑞𝑁𝐷 2
𝑥 = 𝑉𝑏𝑖 − 𝑥
2𝜀𝑠 𝑝 2𝜀𝑠 𝑛

• We also know that NAxp = NDxn

𝑁𝐷 𝑁𝐴
→𝑥𝑝 = 𝑥 𝑜𝑟 𝑥𝑛 = 𝑥
𝑁𝐴 𝑛 𝑁𝐷 𝑝
 Depletion Width
• Eliminating xp, we have:
2 sVbi  NA 
xn =  
q  ND (N A + ND ) 

• Eliminating xn, we have:

2 sVbi  ND 
xp =  
q  N A(N A + ND ) 

• Summing, we have:
2 sVbi  1 1 
xn + x p = W =  + 
q  N A ND 
Depletion Width in a One-Sided Junction
2 sVbi  1 1 
xn + x p = W =  + 
q  N A ND 
1 1 1
If NA >> ND as in a p+n junction: + ≅
𝑁𝐴 𝑁𝐷 𝑁𝐷
2 sVbi
W=  xn
qN D
x p = xn N D N A  0
1 1 1 2𝜀𝑠 𝑉𝑏𝑖
What about a n+p junction? + ≅ 𝑊= ≅ 𝑥𝑝
𝑁𝐴 𝑁𝐷 𝑁𝐴 𝑞𝑁𝐴
𝑁𝐷 ≫ 𝑁𝐴

1 1 1 1
W = 2 s Vbi qN where = + 
N N D N A lighter dopant density
Peak E-Field in a One-Sided Junction

 dx =  (0) W = Vbi
1 Example: p+n junction
𝜀
2 𝑥𝑛
𝑥𝑝 ≅ 0
𝑥
2 s
W Vbi 𝑎𝑟𝑒𝑎 = 𝑉𝑏𝑖
E(0)
qN

 (0) =
2Vbi
W

2qNVbi
s
 V(x) in a One-Sided Junction
p side n side
qN A qN D
V ( x) = ( x + x p )2 V ( x) = Vbi − ( xn − x ) 2
2 s 2 s
ND
V (0) = Vbi Most of voltage is dropped across
N A + ND the more lightly doped side

P+ 𝑉(𝑥) N P 𝑉(𝑥) N+

𝑉𝑏𝑖 𝑉𝑏𝑖

𝑉(0) ≅ 0

𝑥 𝑥
𝑥𝑛 −𝑥𝑝
 𝜀𝑠 ≅ 10−12 𝐹/𝑐𝑚
Example: One-Sided pn Junction
A p+n junction has NA=1020 cm-3 and ND =1017cm-3.
Find (a) Vbi (b) W (c) xn and (d) xp .

EG kT N D
Vbi = + ln ≅ 0.56 + 0.42 = 0.98 𝑉 ~ 1 𝑉
2q q ni

2 sVbi 2 × 10−12
W =[ ]1/2 ≅ 10−5 𝑐𝑚 = 0.1𝜇𝑚
qN D 1.6 × 10−19 × 1017

xn  W ≅ 0.1𝜇𝑚

x p = xn N D N A ≅ 1Å ≅ 0
 Voltage Drop across a pn Junction
R.F. Pierret, Semiconductor Fundamentals, Figure 5.10

Note that VA should be significantly smaller than Vbi in order for

low-level injection conditions to prevail in the quasi-neutral regions.
Effect of Applied Voltage
𝑁𝑜𝑡𝑒: 𝑞𝑉𝑏𝑖 < 𝐸𝐺

𝑞(𝑉𝑏𝑖 - 𝑉𝐴 )

𝑞𝑉𝐴

𝑞(𝑉𝑏𝑖 - 𝑉𝐴 ) 2 s  1 1 
W= (Vbi − VA ) + 
q  N A ND 
|𝑞𝑉𝐴 |

R.F. Pierret, Semiconductor Fundamentals, Figure 5.11

 Summary
• For a non-degenerately-doped pn junction:
kT N D N A
Built-in potential Vbi = ln
q ni2
2 s (Vbi − VA )  1 1 
Depletion width W = xn + x p =  + 
q  N A ND 
NA ND
xn = W xp = W
N A + ND N A + ND

• For a one-sided junction:

EG kT N
Built-in potential Vbi = + ln
2 q ni
2 s (Vbi − VA )
Depletion width W=
qN
Linearly Graded pn Junction
 Acknowledgement
• Modern Semiconductor Devices for Integrated Circuits
by C. Hu (Prentice Hall, 2009)
• Semiconductor Device Fundamentals by R. F. Pierret
(Addison Wesley, 1996)
• Professor Tsu-Jae King Liu EE130/230A notes