MAT-VET-F-24004

Kandidatarbete 15 hp
Sep 2024

Study of a 140GHz balun in a 22

nm CMOS process
In collaboration with NXP Semiconductors
Anton Björk

Civilingenjörsprogrammet i teknisk fysik

 Study of a 140GHz balun in a 22 nm CMOS process
Anton Björk

Abstract
Baluns serve functions crucial in most communication circuitry. In order to keep improving commu-
nication technology it is therefore important that these circuit elements can perform at higher fre-
quencies and in smaller form factors. Hence, this study aimed at designing a balun that would op-
erate at 140GHz in a 22nm CMOS technology. It was desired that the balun perform an impedance
transformation of 75Ω to 50Ω while having a 0.5dB pass band between 135-145 GHz. In order to
do this the general concepts of double tuned transformers were explored and some equations for
the transfer function poles were derived. This then motivated two different design procedures.
The layout designs were constructed and simulated using Cadance. To extract the characteristics
of the simulated designs two different extraction methods were employed. The power transfer of
the model using these extracted values was then compared to that of the design. In the end it was
found that one of the design philosophies lead to a balun with a power transfer of S21 = −0.645dB .
This however came at the expense of an undesirably large bandwidth. The other design philoso-
phy was deemed non useful under these conditions.

Teknisk-naturvetenskapliga fakulteten

Uppsala universitet, Utgivningsort Uppsala

Handledare: Rahul Nadgouda Ämnesgranskare: Chao Xu

Examinator: Martin Sjödin

Course: Independent Project in Engineering Physics Anton Björk

Table of Contents
1 Introduction 3
1.1 The SOI CMOS process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Design Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 Theory 5
2.1 Maxwell’s equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Induction and Inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2.1 Coupled Inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2.2 Inductor models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2.3 Inductors in a 22nm CMOS process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Resonant circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.5 S- and Z-parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.6 Model analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.6.1 Weakly coupled case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.6.2 Strongly coupled case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.7 Loading effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3 Design Procedure 14
3.1 Extraction methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1.1 Inductance and coupling extraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1.2 Capacitance extraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2 Balun design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2.1 Weakly coupled design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2.2 Strongly coupled design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4 Results and Discussion 17

4.1 Model fit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5 Conclusion 20

References 21

Popular scientific summary 22

Reflections on the sustainability of the project 23

A Appendix 24

B Appendix 25
B.1 Quality of a parallel RLC-circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
B.2 Relating inductor quality to equivalent parallel resistance . . . . . . . . . . . . . . . . . . . . . . . 26
Course: Independent Project in Engineering Physics Anton Björk

1 Introduction
The continued development of faster wireless communications standards such as the recently rolled out 5G
networks requires that circuits can perform at higher frequencies. Not only is the demand for speed always
increasing, but the constant miniaturization of integrated circuits. For reference, the design in this study will
operate at 140GHz while the frequency for commercial mid-band 5G operates at around 4GHz [1] . The fre-
quency band between 30 to 300 Gigahertz is often referred to as the millimeter wave band, in reference to the
wavelength of the signals in this band. Millimeter wave circuits suffer from a high degree of unwanted charac-
teristics, often called parasitic elements. These are the result of the increased unwanted field interactions which
get more prominent at higher frequencies. Because of the short wavelength circuits display optical phenomena
such as internal reflection. Complications also arise when trying to implement these designs in smaller form
factors. However, higher frequencies has allowed inductors and transformers to be implemented directly on
chip. This is because the higher frequency enables the designer to achieve sufficiently high inductive reactants
with smaller inductance values. Therefore the balun in this paper is designed as a double tuned transformer
and it is built on a 22 nanometer CMOS process.
Differential signaling on balanced circuits is employed to improve signal integrity and common mode rejection.
Differential signals are composed of two signals that are 180 degrees out of phase with respect to each other.
This means that any noise that is common to both signals is invisible when measuring the voltage between
them. To keep these signals perfectly phase shifted and otherwise equal it is important that both signals see
the same impedance to ground. When this is achieved the circuit is said to be balanced. This means that all
the circuits impedance’s are symmetric around ground. However, as off-chip signals often are unbalanced it is
important to have some way of properly interfacing these topologies. A balun serves the function of interfacing
a balanced line with an unbalanced line or vice versa. The name ”balun” is just an abbreviation of the words
balanced and unbalanced. As mentioned a balun is just the idea of interfacing a balanced signal with an
unbalanced signal and this can be implemented in a variety of ways. The study performed here is focused on
designing a balun by utilizing a double tuned transformer. A simple transformer balun may consist only of two
inductors sharing a magnetic field. By tuning both sides of the balun to a certain frequency its performance
at and close to that frequency can be improved. While also providing attenuation of high frequency noise as
well as other undesired frequencies. The tuning in this case is performed by adding shunt capacitors to both
the primary and secondary sides of the transformer. The capacitance used for tuning the inductance’s will be
assumed to be ideal and therefore the focus of the integrated circuit design will lie in the design of the coupled
inductors. The bulk of the study is therefore focused on designing a pair of coupled inductors that can operate
efficiently at 140GHz in the 22nm CMOS process.
The entire construction, designing and testing process will be performed using computer solutions. No physical
construction will be manufactured in the 22nm technology. All the construction will be digital and the simulation
and testing software’s will utilize knowledge about the CMOS process to construct accurate model of the digital
constructions. Using these computer assisted electromagnetic simulations the parasitic features and effects
can be captured to a certain degree of accuracy.

1.1 The SOI CMOS process

In modern times almost every electronic product will contain a silicon based integrated circuit. Usually, these
will be complementary metal oxide semiconductor (CMOS) integrated circuits. Which gets its name from the
complementary pairs of p-type and n-type semiconductors that make it up. Traditionally this technology would
be constructed directly on top of a silicon substrate, called bulk-silicon. Approaching the nanometer scale this
has led to high parasitic capacitance’s and parasitic coupling between the active as well as the passive compo-
nents and the technology substrate. Silicon on insulator technologies implement a buried silicon oxide (BOX)
layer that separates the silicon substrate from the active components. This means that there is a single layer of
device quality silicon followed by a BOX layer and at the bottom the silicon substrate [2] and an example of the
metal stack can be seen in figure 1. SOI technology has been crucial in promoting the continued downsizing of
ICs because it does not suffer from the problems that the more traditional bulk-silicon technologies experience
at the nanometer scale [3] . Although the current and potential advantages of SOI are vast only some of them
are relevant for this study. SOI technology allows for the use of higher resistivity substrates that decrease the
induction of eddy-currents in the substrate. Therefore the models used in this study neglect the effect that the
substrate may have on the inductor performance, but it may still be used to describe some of the losses seen
in the inductors. The biggest current disadvantage of SOI technology is the added manufacturing cost.

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Course: Independent Project in Engineering Physics Anton Björk

Second metal
Dielectric
First metal
Device quality silicon
Buried silicon oxide layer

Silicon substrate

Figure 1: General material stack of a silicon on insulator CMOS process. Beware that the layer dimensions
are not true to scale.

1.2 Design Requirements

This study is aimed at designing and studying a balun that will operate at 140GHz. This balun will be constructed
in a 22nm CMOS technology that utilizes the silicon on insulator (SOI) technology. It is desired that the balun
have a maximum in band gain flatness of 0.5dB in the frequency band 135GHz − 145GHz. Meaning that that
the signal magnitude may only differ with 0.5dB from the peak signal magnitude within that pass band. It is
desirable but not directly specified that the signal attenuation is as large as possible outside the pass band.
The balun is also supposed to perform an impedance matching, where the input impedance is 75Ω and the
output impedance is 50Ω. When the balun can achieves these specifications it is desired to optimize for lower
losses.

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Course: Independent Project in Engineering Physics Anton Björk

2 Theory
In order to model the balun properties it is possible to encode its behavior using discrete circuit components,
so called lumped element models. The behavior of these elements are ideal and it is possible to derive transfer
functions and equations that describe their behavior. However, It is hard to construct an analytical model that
captures all the features of a real transformer while at the same time not being so complicated it cant be
analytically understood. It is therefore necessary to make simplifying assumptions as to make the end result
insightful. In the end it is desired to be able to quantify the performance of the final product without having
to build it as well as understanding how the circuit parameters may affect said performance. The bulk of the
analytical analysis is done on unbalanced circuit topologies as it is easier to carry out and has no bearing in
the ideal case. Another complication of using lumped element models is their increasing inaccuracy at higher
frequencies when transmission line effects become important. However, because the designs in this study
were still smaller than the wavelength associated with the operating frequency and the fact that transmission
line theory was considered mostly outside the scope of this study, this was ignored. By leveraging numerical
simulations the exact performance may still be extracted.

2.1 Maxwell’s equations

Although the study can be fully comprehended without an understanding of Maxwell’s equations they are funda-
mental in the computer simulations . They are also useful in understanding some of the derivations of equations
used in this study. 
∇ · E

⃗ = ρ Gauss’ electric law

∇ · B
ϵ0
⃗ =0 Gauss’ magnetic law
(1)

 ∇ × E = − ∂t
⃗ ∂B
Faraday’s law


∇×B ⃗ = µ0⃗j + 12 ∂E Ampere’s law
c ∂t

where this is the equations in differential form, but they may also be expressed in integral form.
H

 ⃗ · dA
E ⃗ = Qenc Gauss’ electric law

 H ϵ0
 B ⃗ · dA ⃗=0 Gauss’ magnetic law
H R ∂ B⃗ (2)

 ⃗ ⃗
E · dl = − ∂t · dA ⃗ Faraday’s law

H B
 R
⃗ · d⃗l = µ0 ( ⃗j + ϵ0 ∂ E⃗ dA)
⃗ Ampere’s law
∂t

2.2 Induction and Inductors

Induction is the central concept governing the workings of transformers. The definition of inductance is

ΦB = LI (3)

where L is the inductance and ΦB is the magnetic flux induced by the current I in the conductor. Inductance is
therefore a measure of how well a component induces a magnetic field from the charges moving in it. Equation
3 can be used to derive the voltage drop over a pure inductor by differentiating it with respect to time and
applying Faraday’s law of induction
dI
VL = L (4)
dt
where VL is the voltage drop over an ideal inductor which has no internal resistance. Equation 4 is used to
model the ideal discrete inductor and is referred to as the inductors self inductance. Ideal inductors do not
dissipate energy in the way a resistance would, an inductor only stores energy in its induced magnetic field.
This is best understood in the DC scenario. When there is a steady DC current trough the inductor it behaves
as a superconductor. When the current is switched off, the inductors magnetic field starts to collapse and by
Faraday’s law the collapsing field induces an electromotive force that tries to maintain the current trough the
inductor. Therefore inductors behave analogous to masses in mechanics and the current through them can be
conceptualized as their velocity. This is not only an intuitive way of understanding the inductors behavior but
also leads to the expression for the energy that is stored in the inductor. Without any derivation, the energy
stored in an inductor is given by
1
WL = LI 2 (5)
2
were L is the inductance and I the max current trough the inductor. Using the previous analogy this expression
is identical to the that of the kinetic energy of a mass.

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Course: Independent Project in Engineering Physics Anton Björk

i1 M, κ i2

L1 L2

Figure 2: Two coupled inductors with mutual inductance M and a current flowing in the primary and secondary
sides.

L R

Figure 3: Model of wire inductor in a circuit

2.2.1 Coupled Inductors

An inductor can share a mutual inductance with another inductor when their fields interact. The magnitude
of the mutual inductance is dependent on the geometry, medium and material of the two inductors. Mutual
inductance is a measure of how well current in one inductor generates a flux affecting the other. Interestingly,
the mutual inductance will be the same both ways according to the reciprocity theorem of mutual inductance.
This gives us the definition of mutual inductance as
(
Φ12 = M I1
(6)
Φ21 = M I2

here M is the mutual inductance and Φ12 represents the flux induced by the first inductor that affects the second
inductor. It is common to talk about the coupling strength using the coupling factor. It is defined as the ratio of
the mutual inductance to the geometric mean of the two inductance’s.
M
κ≜ √ (7)
L1 L2
where κ is the coupling factor and can take on values between zero and one. In ideal transformers κ is one
and that suggests that no flux is lost to the environment. Equation 3 and 6 can be used to arrive at
(
V1 = sL1 i1 + sM i2
(8)
V2 = sL2 i2 + sM i1

which is the transformer action equations and they refer to the scenario presented in figure 2. Where V1 and
V2 are the voltages over L1 and L2 respectively. The equations are presented in their Laplace form and hence
s is the complex Laplace variable.

2.2.2 Inductor models

A real world inductor will also have capacitive and resistive attributes. Solenoid inductors with multiple winding’s
will have a parasitic capacitance between the wires. This can be modeled by a parallel capacitor. In cases where
the inductor wire isn’t wound on itself its associated capacitance is much smaller. One of the biggest losses
in an inductor are the ohmic losses in the wire. These resistive losses in the wire can be modeled by a series
resistance. This leads to the model seen in figure 3. As it is desired to have an inductor with a high inductance
relative to its series resistance, the ratio of inductance to resistance of an inductor is a commonly used metric
called the quality factor. The quality factor or Q-factor of the model it is hence commonly defined as the ratio
of reactance to effective resistance.
Im(ZL ) ωL
QL = = (9)
Re(ZL ) R
where QL is the quality factor of the inductor model, L is the inductance, R the series resistance and ω is
the operating frequency. A problem with this definition of the quality factor is that it implicitly assumes that

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Course: Independent Project in Engineering Physics Anton Björk

(a) (b)

Figure 4: (a) Visual representation of the current density inside a conductor for alternating current. (b) The
current I is flowing upwards in the picture and is also increasing in that direction inducing a changing magnetic
field. The changing magnetic field then induces the eddy current Iw .

the parasitic capacitance is small. An ideal inductor has zero resistance and therefore a Q-factor approaching
infinity. This definition of the Q-factor is only useful when the inductor is operating at frequencies far from its self
resonance frequency. That is when the parasitic capacitance is equal to the inductance and they effectively
cancel causing the reactance to go to zero. This usually happens at frequencies way higher than that of
the intended operating frequency, but if the parasitic capacitance is large enough it can cause unexpected
behavior.

2.2.3 Inductors in a 22nm CMOS process

When implementing an inductor in a process it will naturally behave differently from an ideal inductor or wire
inductor. As inductors are magnetic components eddy-currents can become an issue. An eddy current is when
a loop current is induced by the magnetic fields inside a conductor. Eddy currents affect the performance of a
printed inductor in two ways [4] . The first one is called the skin effect. It describes the tendency of the current
density J⃗ to flow along the perimeter of the wire and it is due to the eddy currents in the wire. Figure 4b shows
how the eddy currents will oppose the main current in the center of the wire and magnify it at the surface. An
example of a current density distribution can be seen in figure 4a. This increases the resistance to current of
the wire since it is reducing the effective cross section in which the current can flow. The effect is quantified by
the skin depth δ and it is defined as the depth from the conductor surface at which the current density is 1/e
(≈ 36.8%) of the value at the surface. The skin depth is then calculated by
r
2ρ
δ= (10)
2πf µr µ0

where ρ and µr is the resistivity and relative permeability respectively of the conductor. µ0 is the permeability
of free space and f is the frequency of the alternating current. Equation 10 shows that the skin effect gets
more pronounced at higher frequencies and is therefore highly relevant for this study. Eddy currents can also
become a problem in the process substrate. This happens when the magnetic field from the inductor are
significant enough to induce currents in the substrate. The substrate in CMOS processes usually have low
resistivity and hence will carry currents opposing that of the inductor inducing losses. These magnetic losses
may be reduced by increasing the resistivity of the substrate [4] . The process used in this study however uses a
silicon on insulator (SOI) that can employ high resistance substrates. This means that the substrate losses may
be relatively low therefore its affect is not modeled in this study. When implementing an inductor in a process it
is usually drawn in one of the top metals. This is because this metal will usually be the thickest which reduces
the series resistance in the inductor and therefore increases its Q-value. Drawing inductors in the top layer
also has the added benefit of being far from the substrate. Hence, minimizing induced eddy-currents in the
substrate. To increase inductance, the area of the trace loop has to increase as inductance scales with area.
With to goal of having a large inductance compared to the resistance within the coil inductors loops are usually
octagonal. This is because a circular geometry has the most area per circumference and processes usually
don’t allow for fully circular structure to be manufactured.

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Course: Independent Project in Engineering Physics Anton Björk

in
i
iR iL
iC
C L R C L

(a) (b)

Figure 5: (a) Single ended and unloaded LC-circuit. (b) Single ended and loaded LC circuit.

2.3 Capacitance
A capacitor is able to store charges by maintaining an electric field across it. It is defined as
Q
C= (11)
V
where C is the capacitance, Q is the charge stored and V is the voltage across it. Therefore the capacitance is
measure of how well the capacitor is able to hold charges per volt. As previously stated, inductors store energy
in kinetic form and using the same analogy capacitors store energy in potential form. The energy stored in the
electric field of a capacitor is given as
1
WC = CV 2 (12)
2
where V is the voltage over the capacitor. Ideal capacitors act as open circuits when a DC voltage is applied
and a short circuit towards signals of infinite frequency. In the complex s-plane the capacitor impedance is
given by
1
Zc = (13)
sC
Capacitance arises anytime two conductive surfaces at different potentials share an electric field.

2.4 Resonant circuits

Electromagnetic resonant circuits store and energy in the electric and magnetic fields. The exact qualities of
such a circuit is highly dependent on their exact topology. Most relevant for this study is the parallel LC-circuit
as seen in figure 5a. It is possible to find the differential equation for the current using Faraday’s law
I 2
⃗ · d⃗l + dΦB = Q + L di(t) = 0 −→ d i(t) + 1 i(t) = 0
E (14)
dt C dt dt2 LC
this describes a simple harmonic oscillator. The energy in the circuit will oscillate between magnetic and electric
energy. The solutions are pure sinusoids and the circuit current will naturally oscillate with the frequency
1
ωN = √ (15)
LC
where ωN is the natural resonant frequency of a LC-circuit with lossless reactive components, i.e infinite quality
factors. The difference when using finite quality components is often small as long as the inductor quality
is much greater than unity. Therefore it will be henceforth assumed that the natural resonant frequency and
the resonant frequency are the same, ωN = ω0 . A longer discussion about how the inductor quality affects
the circuit is provided in appendix B.2. From an electronics perspective the resonant frequency for an LC-
oscillator is defined as a frequency where the reactance of a circuit cancel. Finding resonance in electric circuit
is therefore about finding frequencies where the impedance of the circuit is purely real. Since there are no
losses in the circuit in figure 5a the energy will oscillate between the inductor and capacitor forever. This is
because no power is extracted from the circuit via some load. By adding a resistive load R in parallel with the
inductor and capacitor, as shown in figure 5b, damping is introduced to the system. In addition to the load a
current can be added at the input. This gives the complex input impedance of the circuit as
s
vin C
Zin = = 2 1 1 (16)
iin s + RC s + LC

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Course: Independent Project in Engineering Physics Anton Björk

where s is the complex Laplace variable. This shows that an parallel LC-circuit will is a second order circuit
and will therefore produce two poles. The pole positions may also be expressed in terms of the systems quality
factor and the resonant frequency.
s
C
Zin = ω0 (17)
s2 + Qs + ω02
where Q is the quality factor of the resonator system. This should not be confused with the quality factor of the
components like the one mentioned for inductors. The quality factor of the resonator is a measure of how ideal
the resonance is and it can in the context of second order LC-resonators be defined as
ω0
Q= (18)
BW
where BW is the 3dB-bandwidth of the resonator. For electrical circuits there is two types of resonator quality
factors, unloaded Q and loaded Q. Unloaded Q refers to the quality factor of a circuit that is not connected to a
load or source impedance. Connecting any extra impedance to a circuit will in some degree alter the workings
of that circuit. In the case of connecting purely resistive sources and loads this will increase the losses in the
resonator and thereby decreasing the quality factor in that circuit.

2.5 S- and Z-parameters

Scattering parameters are a common measurement quantity in radio- and microwave-frequency applications.
This is partly because it is preferred to talk about performance in terms of power instead of current and voltage
alone. They also give a more intuitive way of measuring and understanding how much power is transmitted
trough or reflected off a circuit element. Broadly speaking, scattering theory quantifies how much power is
scattered or transmitted trough each port of a network. Where a network is just a circuit or electrical system
with with N number of ports. An useful application of s-parameters is to perform impedance matching within

S21
a1 Port-1 Port-2 a
2
S11 S22
b1 b2
S12

Figure 6: Black box representation of a two-port network with the meaning of each scattering parameter rep-
resented as an arrow.

an electrical system. When source and load impedance’s are mismatched reflections occur within the circuit,
meaning that some of the input power wave is reflected back to the input. This results in losses since a portion
of the input power doesn’t make it to the output. Mathematically this is achieved by defining incoming and
outgoing power waves [5] .
Vi + Z i I i Vi − Zi∗ Ii
ai = p bi = p (19)
2 |Re(Z0 )| 2 |Re(Z0 )|
where ai and bi are the incoming and outgoing power waves respectively. Z0 is the characteristic impedance
of the line. The s-parameters can be expressed using the definitions for ai and bi .
b1 b1 b2 b2
S11 = , S12 = , S21 = , S22 = , (20)
a1 a2 a1 a2
where S11 is called the input return loss and S22 is called the output return loss. These two s-parameters
reflect how much of the power waves are reflected at the two ports. S12 and S21 are called transmission
coefficients because they quantify how much signal is transmitted trough a network port. These are the resulting
s-parameters for a 2-port network, but they can be defined for any number of ports. S-parameters also relate to
a different set of quantities often used in network theory, impedance- or z-parameters. As their name suggests
they are related to the impedance at every port of the network. Unlike s-parameters the impedance parameters
are more easily calculated from lumped element models, since the impedance of every element is very well
defined. Conversions between s- and z-parameters are available [6] . From figure 7 the definitions of the z-
parameters for a two port network is

v1 v1 v2 v2
z11 = , z12 = , z21 = , z22 = . (21)
i1 i2 =0 i2 i1 =0 i1 i2 =0 i2 i1 =0

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Course: Independent Project in Engineering Physics Anton Björk

i1 i2
+ +
v1 2-port network v2
− −

Figure 7: Position of the currents and voltages relative to an arbitrary two port network.

Matching network

r1 r2
M, k

iin iout

RS C1 C2 RL

L1 L2

Figure 8: Transformer model circuit used for analytical calculations

These parameters are often represented in matrix form where the impedance matrix relates the current vector
to the voltage vector.     
v1 z11 z12 i1
= (22)
v2 z21 z22 i2
The drawback of impedance parameters however is that they are don’t intuitively reflect the circuit performance
and require open port measurements to be defined when they are not obtained from the s-parameters.

2.6 Model analysis

The RLC circuit is a second order circuit and by magnetically coupling two of them a fourth order circuit is
obtained. Where an ideal model circuit can be seen in figure 8. This can be advantageous to achieve higher
order stop band roll offs and wider bandwidths and low loss impedance matching [7] . The extra degrees of
freedom also make the design process more complicated and the system behavior becomes harder to analyze.
When the two circuits are uncoupled it is common to at least initially assume that they are tuned to resonate at
the same center frequency ω0 . Using this assumption, when a coupling between the primary and secondary is
introduced the center frequency peak ω0 splits into two peaks according to
w0
ω1,2 = √ . (23)
1±k

where ω0 is the center frequency. The lower and upper frequency peaks are denoted ω1 and ω2 respectively [8] .
There therefore exists a frequency were the two peak produce a maximally flat frequency response. This
coupling value is called the critical coupling. When the system is critically coupled the gain is at a maximum
at the tuned frequency. If κ is decreased below the critical coupling value the band pass gain decreases and
the frequency response is referred to as under coupled. On the flip side, increasing the coupling beyond
that of the critical coupling splits the resonance peaks more, creating a valley between them. The impedance
transformation over the coupled resonators is simply given by the ratio of the primary and secondary inductance
values according to
L1
n2 = (24)
L2
where n2 is the impedance transformation. This however assumes that both the primary and the secondary
are tuned to the same frequency. Even when the resonance peaks have been moved by the coupling between
them this still hold at the resonance peaks [7] . Using the model presented in figure 8 it is productive to relate its
parameters to some figure of merit. Generally double tuned transformers or baluns are placed on the output
stage of the transistors therefore it is convenient to model the input to the circuit as a current source. In power

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Course: Independent Project in Engineering Physics Anton Björk

amplifier applications the output of the balun may then be viewed as a voltage source for the next transistor.
Hence, a reasonable figure of merit is the transfer impedance, V2 /I1 . As the goal is the generate as much
voltage on the secondary with respect to the input current. In order to simplify the analysis only the matching
network is initially analyzed. Equation 8 can be put into impedance matrix form.
 
r + sL1 sM
Zm = 1 (25)
sM r2 + sL2

This matrix describes the two port network consisting only of the coupled inductors and their associated resis-
tance. In order to expand the matrix to describe the entire matching network the definitions of the z-parameters
seen in equation 21 are applied and the result is
 n h io 1 1

sC1 sC2 Zm12
 sC1
1
|| Z − Z + Z || Z + 1
) { }
)
m11 m12 m12 m22 sC2 1
)(Zm22 −Zm12 +Zm12 || Zm11 −Zm12 + sC
1 1
Z= io 2 
(Zm11 + sC + sC
 1 1
Z
n1 h 1

sC2 || Zm22 − Zm12 + Zm12 || Zm11 + sC1 )
m12 1 1
sC1 sC2
{ }
(Zm22 + sC )(Zm11 −Zm12 +Zm12 || Zm22 −Zm12 + sC
1 1 1
+ sC )
2 2 1
(26)
¨where x||y represents the total impedance of x in parallel with y. This then simplifies out to
 
1 Zm11 + sC2 det(Zm ) Zm12
Z= · , (27)
1 + s2 C1 C2 det(Zm ) + s(C1 Zm11 + C2 Zm22 ) Zm12 Zm11 + sC1 det(Zm )

where the fact that Zm12 = Zm21 have been used and det(Zm ) represents the determinant of Zm . Identi-
cal results have already been reached [9] . Using the derived impedance matrix an expression for the transfer
impedance can be reached. If only the matching network is considered the transfer impedance simply be-
comes
v2
zt = ≈ Z21 , (28)
i1
where the need for an approximation sign stems from the fact that in any real case the matching network is
connected to a load and hence the output is no longer open as is assumed in Z21 . However, this approximation
is still valid if the load resistance is sufficiently large. Hence, it is assumed that RL → ∞ because then the
secondary can still be considered open. Writing out Z21 and simplifying yields
v2 sM
= (29)
i1 i2 =0 (1 + sr1 C1 + s2 L1 C1 )(1 + sr2 C2 + s2 L2 C2 ) − s4 M 2 C1 C2

Now tuning both the primary and secondary to the same resonant frequency (L1 C1 = L2 C2 ) according to
equation 15, substituting the inductance for the resonator quality (Q1,2 ) and rewriting the mutual inductance in
the manner of equation 7 yields
√
sk L1 L2 ω04 Q1
zt = 2 (30)
(s Q1 (1 − k) + sω0 + ω02 Q1 )(s2 Q2 (1 + k) + sω0 + ω02 Q2 )
Finding the pole equations is now trivial since the denominator has been factorized. The poles become
p
ω0 ω0 4Q21 (1 − k) − 1
s1 = − ±j (31)
2Q1 (1 − k) 2Q1 (1 − k)
and p
ω0 ω0 4Q22 (1 + k) − 1
s2 = − ±j (32)
2Q2 (1 + k) Q2 (1 + k)
In the context of this study it is reasonable to assume that 4Q21 (1 − k) >> 1 even for quite large values of k.
The same holds even more true for the second pole pair. This results in the simplification
ω0 ω0
s1 = − ±j√ (33)
2Q1 (1 − k) 1−k
and
ω0 ω0
s2 = − ±j√ (34)
2Q2 (1 + k) 1+k
Notice that the pole splitting along the frequency axis is the same expression as equation 23. From this point
two different design philosophies are usually applied. The first one assumes weak coupling where to goal is
to achieve a flat pass band with steep roll offs on both sides. The second one aims to maximize the transfer
impedance by utilizing the network with very strong coupling.

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Course: Independent Project in Engineering Physics Anton Björk

Im

s1

ω0 k2
π
4
Re
ω0 ω0 k2
2Qres
s2

Figure 9: Butterworth pole positions for a two pole circuit. The circle is centered at ω0
.

2.6.1 Weakly coupled case

It is first assumed that k << 1, this allows the poles to be rewritten as
ω0 k
s1 = − ± jω0 (1 + ) (35)
2Q1 2

and
ω0 k
s2 = − ± jω0 (1 − ) (36)
2Q2 2
In order to achieve the desired flat pass band the poles should be equally spaced along a semi circle in the
complex plane in a Butterworth fashion, as can be seen in figure 9. For two pole pairs this means that their real
parts have to be equal. This gives the condition Q1 = Q2 = Q. From figure 9 it can also be seen that the real
and imaginary parts should be equal which yields

ω0 k 1
= ω0 ⇒ kc = (37)
2Q 2 Q

where kc is commonly referred to as the critical coupling of the balun. Circuits with coupling values below
kc are referred to as under coupled and results in loss of transmission from primary to secondary. Coupling
values above kc are called over coupled and result in a bigger splitting of the resonance frequencies such that
a dip in introduced in the response. The coupling parameter therefore gives the designer good control of the
overall bandwidth of the circuit. In the critically coupled case resulting increase in bandwidth can be computed
to [10] √ ω0 √
BWnew = 2| 2 | = 2BW (38)
2Q
√
The resulting new bandwidth is hence 2 times bigger then the resonators separately. This factor can be made
bigger by allowing a ripple to form in the middle of the pass band. From the design specifications the design
parameters are now completely determined, a design procedure has been obtained. First the desired center
frequency and bandwidth determine the Q-value.
√ ω0
Q= 2 (39)
BW
√
were the bandwidth increase is taken into account by the factor 2. In turn the Q-value relates to the inductance
and losses by
ω0 L1,2 R1,2
Q1,2 = or Q1,2 = (40)
r1,2 series ω0 L1,2 parallel
were the choice of equation for the Q-value is dependent on if the inductor resistance is represented in series or
in parallel with the inductor. When taking into account the terminal resistances on the primary and secondary the
parallel choice may be more suitable to more easily combine the inductor and terminal resistances when using
a Norton source, as shown in the appendix B. Choosing the parallel representation R1,2 may be approximated
as simply the input and output resistances respectively and hence determining the inductance values and

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Course: Independent Project in Engineering Physics Anton Björk

guaranteeing a correct impedance transformation. The capacitors (C1,2 ) are simply chosen to resonate both
the primary and secondary at the desired center frequency.
1 1
ω0 = √ =√ (41)
L1 C1 L2 C2

The model presented in figure 8 is now completely determined and an initial design has been obtained.

2.6.2 Strongly coupled case

Here it is desired to maximize the transfer impedance. Once again the poles are given as
ω0 ω0
s1 = − ±j√ (42)
2Q1 (1 − k) 1−k
and
ω0 ω0
s2 = − ±j√ (43)
2Q2 (1 + k) 1+k
were it should be noted that the damping of s2 decreases with strong coupling were as the opposite is true for s1 .
Therefore it is desired to operate the circuit entirely around s2 , this idea has been suggested previously [9] [7] . The
coupling factor k is simply determined as the highest possible coupling that can be achieved. The inductance’s
are to be made as large as possible with the correct ratio between them to achieve the desired impedance
transformation. Making the inductors large makes it easier to achieve good quality factors in the inductors
and therefore lowering losses also improving efficiency [7] . However, when the load resistances are taken into
account their impedance will be comparable to the impedance of the inductor resulting in less current trough
the inductors. This leads to very low resonance quality and therefore very wide bandwidths. This approach is
therefore suited for applications that prioritize low loss impedance matching over good stop band attenuation.
Are now chosen to resonate both the primary and secondary well above the desired operating frequency. The
pole splitting caused by the coupling then moves on of the poles to the correct frequency.
1
C1,2 = (44)
L1,2 ω12 (1 ± k)

were ω1 is the desired operating frequency. This design procedure is much less precise as the goal is only
maximize certain parameters while maintaining low losses in the inductors.

2.7 Loading effects

Loading the circuit, meaning, drawing power from it via some output load will change the behavior of the circuit.
In this study the case of loading the circuit with a purely real resistance load of 50 Ohms is considered. It can
be shown that for cases with inductor quality factors significantly bigger than unity the total resistive losses are
dominated by the loading effect. Under this assumption the effect of the internal resistance in the inductors can
be omitted. This results in a model containing two coupled purely parallel RLC-resonators. The quality factor
for each resonator may now be expressed as
Ri
Qi = (45)
ω0 Li
where Ri and Li are the total parallel resistance and inductance respectively. Under these loading conditions
the quality factor of both resonators now depend inversely on the inductance. It can be seen that the goal of
designing the balun with large inductance’s will inevitably lead to very low resonance quality and therefore very
large bandwidths.

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Course: Independent Project in Engineering Physics Anton Björk

Cm
r1 /2 r2 /2
k

RS RL
L1 L2
2 2
k
port 1 C1 C2 port 2

L1 L2
2 2
r2 /2

r1 /2

Cm

Figure 10: Transformer model for circuit simulations and extraction method verification.

3 Design Procedure
Transformer design does not lend itself to a simple design procedure since it is dependent on so many vari-
ables. It is therefore productive to leverage the speed of designing and testing that computer simulations offer.
Analytically derived equations may however serve as a helpful guide in the design process and an understand-
ing of the model helps to make informed decisions. In this study the conductor trace layouts was drawn in the
process technology with the help of Virtuoso Layout Suite EXL. When the layouts were complete Cadence EMX
Planar 3D Solver was used to produce the electromagnetic models. Selecting an approtiate mesh on which
the numerical calculations can be performed is crucial. As the skin depth at these frequencies is very low it is
desired to have a high resolution mesh at the conductor walls. Using equation 10, the skin depth at 140GHz
was calculated to 0.1742µm for copper. It is common practice to have an edge mesh of at least one skin depth.
Therefore the edge mesh was chosen to be 0.1µm for all the EM simulations. That is the distance between
mesh points at the conductor perimeter. Other than that the rest of the mesh and 3D-model was generated by
Cadence with a much lower mesh resolution at the conductor center. All designs in this study were constructed
in the copper layers of the process and were simulated up to 600GHz.

3.1 Extraction methods

In order to test the balun layouts it was important that the extraction methods used provided accurate information
about the layouts. Therefore, the extraction methods themselves had to be verified. To do this a schematic
model of the balun was created were all the circuit elements in the schematic could be defined. The schematic
model can be seen in figure 10 and unlike the model used for the analytical analysis also includes the parasitic
capacitance between the primary and secondary winding’s as well as a center tap on the secondary coil. The
extraction methods could be performed on the schematic model balun and the results could be verified with
the actual model parameters. All tests could only use information available at the ports as this would be the
case when testing the balun layouts. The two methods tested in this study were direct extraction via the use of
z-parameters and the other utilized the resonant frequencies of the balun to extract the values of the reactive
components.

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Course: Independent Project in Engineering Physics Anton Björk

3.1.1 Inductance and coupling extraction

The primary and secondary inductance are two important parameters to understand the workings of the balun.
Knowledge about the inductance’s and their ratio ensures a correct impedance transformation. In order to be
able to extract the inductance values of the primary and secondary the side that is not being tested is kept
open. The expressions then become

Im(Z11 ) Im(Z22 ) Im(Z12 )

L1 = , L2 = , k=p (46)
ω ω Im(Z11 )Im(Z22 )

where ω is the frequency at which the inductance is to be evaluated. It was important to evaluate these ex-
pressions at a sufficiently low frequency so that the capacitance is not seen by Z11 or Z22 . Another method of
extracting the inductance that was implemented was to look at the self resonant frequency of the primary and
secondary. By adding an extra known capacitance value to either the primary or secondary and keeping the
other side open another expression for extracting the indcutance was obtained.
r
1 1 Lshort
L1,2 = 2 − 2 , k = 1− (47)
ω1,2 Cextra ω0 Cextra L1

where ω1 is the resonant frequency with the added capacitance Cextra and ω0 is the resonant frequency without
any added capacitance. Lshort is the measured primary inductance of the primary when the secondary winding
is shorted. Both of these extraction methods were implemented on the ideal schematic model and their accu-
racies compared. The model used is the same as seen in figure 10 and the parameters chosen were similar
to those achieved in the designs. In table 1, it can be seen that the z-parameter based extraction method was

Table 1: Comparison of extraction methods for acquiring the inductance values and coupling

Parameters L1 [pH] L2 [pH] k

True values 30 20 0.5
Z-parameter based extraction 29.95 19.97 0.5
Using resonance measurement 31.02 21.4 0.44

able to more accurately extract the true values of the circuit however both methods were deemed accurate
enough to be tested on the final designs.

3.1.2 Capacitance extraction

An attempt was made at extracting the primary and secondary parasitic capacitance’s by once again analyzing
the resonance frequencies. An extra shunt capacitance was added to either the primary or secondary while
the other side was kept open the intra-winding and then the capacitance can be expressed as
Cextra
C1,2 =  2 (48)
ω0
ω1,2 −1

The values of the capacitors were C1,2 = 10fF and the method used extracted C1 = 14.26fF and C2 = 8.35fF.
The deviation from the true capacitance value is here much larger then for the inductance extraction and this
is entirely explained by the capacitance between the primary and secondary winding’s. For this test the inter-
winding capacitance was set at 3fF. When this inter-winding capacitance is ignored the extraction method
correctly extracts the intra-winding capacitance. It was found that the best way to extract the parasitic capaci-
tance was to use the extracted values for the inductance and coupling and manually fit the capacitance values
so that the frequency responses match.

3.2 Balun design

In general the most important metric to maximize in the design process of a transformer balun is the quality
factors of the primary and secondary winding’s. This is achieved by minimizing proximity of traces and choosing
a sufficiently large trace width. When the trace width is to small the resistance in the trace is large and when the
trace is to wide the parasitic capacitance is large. It is also important to consider how much area the inductors
are taking up. There were however no explicit area restrictions in this study.

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Course: Independent Project in Engineering Physics Anton Björk

Figure 11: Flattened layout of the balun employing low coupling. The purple trace is drawn in the second metal
layer and the green trace is drawn in the third layer.

(a) (b)

Figure 12: Structure of the strongly coupled balun. (a) Flat layout of the metal traces. (b) 3D mesh of the
balun.

3.2.1 Weakly coupled design

Using the design procedure derived earlier in this study the desired balun parameters were obtained. First the
balun the 0.5dB pass band should be 135 − 145GHz. Therefore the center resonance frequency, ω√0 , was set
to 140GHz. The desired 3dB-bandwidth was further be assumed to be about 20GHz. Using, Q ≈ 2ω0 /BW
gave a desired Q-value for the primary and secondary resonators which came out to about Q = 10. Initially
the resistive losses in the inductor traces were ignored and the desired inductance values were calculated to
L1 ≈ 9pH and L2 ≈ 6pH. The tuning capacitors on both the primary and secondary were chosen to resonate
both sides at 140GHz. The design of the individual inductor traces employed an octagonal structure and they
were then stacked on top of each other in the second and third metal layers. The top metal was not used
since it is aluminum, causing higher resistivity in the traces. All of the three top metals were however the same
thickness. The final design can be seen in figure 11. The design used 3µm wide metal traces.

3.2.2 Strongly coupled design

The strongly coupled design enabled the inductor areas to be made large as there is no explicit desired induc-
tance value. This also allowed the traces to be made much wider then in the weakly coupled balun. Again, a
stacked octagonal structure was chosen. The primary was designed to only optimize for the inductor qual-
ity while maintaining a reasonable area. There after the secondary was designed to achieve the desired
impedance transformation of 75 to 50 Ohms. The tuning capacitors are chosen so that the lower resonance
peak is centered at 140 GHz. The final trace layout can be seen in figure 12. This design used 8µm wide
traces.

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Course: Independent Project in Engineering Physics Anton Björk

4 Results and Discussion

The precise results of the performance parameters of the two designs can be seen in table 2. It can immediately

Table 2: The performance of every iteration of the transformer balun at 140GHz

Design S11 [dB] S12 [dB] S21 [dB] S22 [dB] 0.5dB-bandwidth [GHz] Area[µm] QL1 QL2
Weak coupling -6.4 -7.95 -7.95 -6.4 11.4 106 12.3 12
Strong coupling -38.44 -0.645 -0.645 -26.34 41.5 2048 38 30

be noted that the weakly coupled balun did not perform well over most of the metrics. From the S-parameters
it is apparent that the circuit is very lossy. As the desired inductance value for this design was quite low the
inductors had to be made physically small. This forces the use smaller traces and and a larger impact from
proximity effects. However, it did achieve a very desirable bandwidth meaning that the analytical analysis
was able to be implemented to somewhat predict the resulting bandwidth before any designs had been made.
Overall however, this balun is much to lossy to have a place in a fabricated circuit. The strongly coupled
design achieved much lower transmission losses and much lower values of S11 and S22 indicating good low
loss impedance matching. The design successfully operated around the less damped resonance pole. This
design clearly takes up a lot more area. The design technically meets the design goal on the 0.5dB bandwidth
since there were no specification on filtering performance outside the pass band. Usually however, it is desired
that the balun to a larger extent filter out frequencies/noise in the signals. The pole equations derived in this
study also successfully predict the difference in damping between the two resonance frequencies.

4.1 Model fit

Using the tested extraction methods on the designs and implementing the results in an ideal model gave indi-
cations of the validity of the model. The two extraction methods produced differing results when implemented
on the designs, as can be seen i table 3. The resonance measurements did not work for the weakly coupled

Table 3: Extracted lumped element values of the two baluns using the two different extraction methods.

Parameters
Design Extraction method
L1 [pH] L2 [pH] k
Z-parameter based extraction 47 31.56 0.49
Strongly coupled balun
Resonance measurement 31.02 21.4 0.44
Z-parameter based extraction 9.34 6.22 0.2
Weakly coupled balun
Resonance measurement — — —

balun since its self resonance frequency was beyond the frequency range used in the simulations. Increasing
the frequency range was deemed inappropriate as accuracy deteriorates at higher frequencies. The extracted
values for the strongly coupled balun were implemented in the model in figure 10 and the S21 curves were
plotted and compared the the S21 of the EM-simulations. The parasitic capacitance was initially ignored but
the EM-model and schematic model used the same tuning capacitance. It can be seen in the plot, see figure
14, that the z-based extraction wont be able to fit the EM-curve even if extra capacitors are added. This is
because any extra capacitance introduced will move the response to lower frequencies and the curve is al-
ready at to low frequencies. However, the resonance based measurement matches both the bandwidth of the
EM-curve and has room to be shifted to lower frequencies. The shunt capacitors on both the primary and side
were chosen so that the curve is placed at the right frequencies. The inter-winding capacitors were chosen to
create a transmission zero at the same frequency as the EM-model. This transmission zero is most visible in
figure 14. Because this transmission zero occurs when the parasitic inter-winding capacitance resonates with
the inductance in the circuit. After this manual tuning the match was acceptable and the results can be seen i
figure 15. The final values of the parasitic capacitors were C1 = 2fF, C2 = 2.5fF and Cm = 5.8fF.

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Course: Independent Project in Engineering Physics Anton Björk

Frequency Response of the strongly coupled balun

0

S21
S11
-5

-10

-15
Magnitude (dB)

-20

-25

-30

-35

-40

1010 1011
Frequency (Hz)

(a)
Frequency Response of the weakly coupled balun
0

S21

S11
-5

-10

-15
Magnitude (dB)

-20

-25

-30

-35

-40

1010 1011
Frequency (Hz)

(b)

Figure 13: Semi-log plot of S11 and S21 over frequency for (a) the strongly coupled balun (b) the weakly coupled
balun.

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Course: Independent Project in Engineering Physics Anton Björk

Comparisson between the two extraction methods and EM-simulations of S21

0

EM
Resonace mearument
-5 Z-based extraction

-10

-15

-20
Magnitude (dB)

-25

-30

-35

-40

-45

-50
0 1 2 3 4 5 6
Frequency (Hz) 1011

Figure 14: S21 curve from the EM-simulation compared with the curves from the schematic simulations using
the extracted values of inductance and coupling. Notice that the frequency axis is linear in this plot.

Comparisson between schematic and EM S21

0

EM
Schematic
-5

-10

-15

-20
Magnitude (dB)

-25

-30

-35

-40

-45

-50
109 1010 1011 1012
Frequency (Hz)

Figure 15: Comparison of S21 from the EM-simulations and the manually tuned schematic model.

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Course: Independent Project in Engineering Physics Anton Björk

5 Conclusion
A balun that met the design criteria was successfully designed. The balun showed very good impedance match-
ing capabilities and reasonably low loss transmission. However, the final design had a very large bandwidth
which can be undesired when the balun is to be employed in filtering applications. A second design showed
that trying to obtain the desired bandwidth with good response quality and attenuation outside the pass band
resulted in very high losses. It was concluded that the lower inductance values required to obtain high quality
factors under the presented loading conditions inevitably leads to very lossy inductors. This is because to ob-
tain the low inductance values the designer is forced to design very small inductors thereby increasing losses
from proximity effects and also making the use of very wide traces impossible. It is possible to find trade offs
between the two designs. Meaning that if the designer desires better stop band attenuation and filter capabili-
ties and is okay with a less power efficient balun. The schematic model of the balun did successfully reproduce
the behavior of the EM-simulations when used together with the presented extraction methods. This implies
that the choice to not model the substrate interactions was not detrimental to the accuracy of the model in this
application. Since the schematic model presented predicted the losses of the design very well, a designer could
easily employ the model to investigate what parameters must be achieved in the design to obtain a desired
result. The analytical work on the balun model also proved to give good insight into how the circuit parameters
would affect the workings of the balun.
In order to expand upon the work the tuning capacitors should be implemented explicitly in the EM design. This
will give a more accurate performance reading of the double tuned structure. Also, implementing the balun
in a power amplifier structure would show its performance under its intended use case. It is also common to
implement some shielding in the EM design to both to shield the active components in the lower metals but
also to shield the balun from other structures present on the chip. Therefore it would be productive to see how
such shields affect the performance of the balun.

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Course: Independent Project in Engineering Physics Anton Björk

References
[1] Jesse Hollington. What frequency is 5g? all the different 5g ranges, ex-
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[2] Rahul Kr Singh, Amit Saxena, and Mayur Rastogi. Silicon on insulator technology review. International
Journal of Engineering Sciences & Emerging Technologies, 1(1):1–16, 2011.
[3] TE Rudenko, AN Nazarov, and VS Lysenko. The advancement of silicon-on-insulator (soi) devices and
their basic properties. Semiconductor Physics, Quantum Electronics & Optoelectronics, 23(3), 2020.
[4] Inder J Bahl. Lumped elements for RF and microwave circuits. Artech house, 2022.
[5] Kaneyuki Kurokawa. Power waves and the scattering matrix. IEEE transactions on microwave theory and
techniques, 13(2):194–202, 1965.
[6] Dean A Frickey. Conversions between s, z, y, h, abcd, and t parameters which are valid for complex
source and load impedances. IEEE Transactions on microwave theory and techniques, 42(2):205–211,
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[7] Andrea Bevilacqua and Andrea Mazzanti. Doubly-tuned transformer networks: A tutorial. IEEE Transac-
tions on Circuits and Systems II: Express Briefs, 68(2):550–555, 2021. doi: 10.1109/TCSII.2020.3046021.
[8] Andrea Mazzanti and Andrea Bevilacqua. Second-order equivalent circuits for the design of doubly-tuned
transformer matching networks. IEEE Transactions on Circuits and Systems I: Regular Papers, 65(12):
4157–4168, 2018. doi: 10.1109/TCSI.2018.2846029.
[9] Andrea Bevilacqua, Federico P. Pavan, Christoph Sandner, Andrea Gerosa, and Andrea Neviani.
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[10] Duran Leblebici and Yusuf Leblebici. Fundamentals of high-frequency CMOS analog integrated circuits,
volume 16. Springer, 2009.

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Course: Independent Project in Engineering Physics Anton Björk

Popular scientific summary

In order to keep improving the workings and speed of our mobile phones and telecommunication devices it is
pivotal that we can keep our circuits performing efficiently even at higher frequencies. This study was aimed at
designing and studying an important circuit element called a balun that is used in many of today’s electronics.
A balun typically helps connect two parts of a circuit in such a way that no mismatch occurs. It does this in two
different ways. First, a signal may travel trough a chip via different configurations of wires. A balun may take
a signal of one configuration and transform it in such a way that it can travel in some different configuration.
Commonly these types of signal architectures are single ended and differential. Were a single ended signal
travels trough a unbalanced circuit configuration and a differential signal travels trough a balanced configuration.
The name balun is only a concatenation of the words balanced and unbalanced. Secondly, a balun may assist
in whats called impedance matching. This is the process of altering a signals voltage to current ratio in order
to match it to a circuit element. A signal that is not matched to a circuit element will reflect of that element
and therefore less signal gets trough the circuit element resulting in more energy losses. However, there are
also more sources of losses. The biggest one being thermal losses that occur when the signals energy is
converted to heat as it travels trough the circuit. Unfortunately, operating a balun at higher frequencies, like in
this study, leads to an even bigger thermal losses due to an electromagnetic effect called the skin effect. The
purpose of this study was therefore to try to design a balun with as little losses as possible that could match two
different impedance’s and the balun was designed in a 22 nanometer CMOS process. A 22 nanometer CMOS
process is simply a chip were electrical structures can be drawn. In order to efficiently design this balun relations
between the balun design parameters and performance was derived. These relationships and equations helped
motivate why certain design choices were better than others. The balun was designed in a computer program
called Cadence were the structure of the balun could be drawn. Thereafter, the electromagnetic simulation tool
simulated the performance of the designed balun structure with the dimensions and characteristics of the 22
nanometer process in mind. Two different design philosophies were implemented. One of them focused on
keeping the balun small and fast responding and the other used a larger balun with lower losses. From the
results it was concluded that the losses in the small balun were to large for it to be put into practice in any
efficient circuit while the larger balun successfully kept the losses to a minimum but it could only be used in
cases were filtering of undesired signals was of less importance.

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Course: Independent Project in Engineering Physics Anton Björk

Reflections on the sustainability of the project

The semiconductor industry is one of the cornerstones upon which the modern society is built. Its continued de-
velopment is critical for innovation in almost every sector from healthcare, wireless communication and currently
at the forefront, artificial intelligence. The already big market of semiconductors seems only to be accelerating
in its importance. However, as the world becomes increasingly dependent on semiconductor technology, con-
cerns about its sustainability are growing. Further, this raises questions about energy consumption, resources,
waste management as well as geopolitical uncertainties. However, much of this is outside of the scope of the
work performed in this study as no physical chip was ever fabricated and all of the testing was done via circuit
and electromagnetic simulations. Although, a shift towards simulation-based design becomes even more rel-
evant in light of the surge in the demand for AI optimized chips, minimizing the need for physical prototypes,
simulation-focused studies, like the one conducted here, can contribute to the economic and environmental
sustainability of chip design and manufacturing. They also lower the cost barriers for smaller corporations and
researchers in developing countries, that may lack the resources to fabricate and test designs in the newest
processes. Also, lowering the barrier of entry may facilitate fairer and more efficient markets with healthy com-
petition. Unfortunately, large scale computer simulations does not come without energy needs and is also an
issue but it is one that seems necessary to continue developing new technology to improve life and infra struc-
ture for the future. This study also showed that high frequency electronics are far from its limits in terms of
frequency and form factor. This will enable further speed increases in our tele-communication infrastructure.
This will further fuel development in fields such as autonomous driving, augmented reality and their integration
into our everyday lives.

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Course: Independent Project in Engineering Physics Anton Björk

A Appendix
Some of the designs that were made that ultimately got omitted from the study are placed here to showcase
the other directions that a designer could take when designing a balun. However, these designs showed little
promise in their overall performance at this frequency and in this process.

Figure 16: A larger structure that tries to improve overall symmetry in the balun

Figure 17: Structure that employs a floating shield as well as a grounded guard ring.

Figure 18: Structure that tries to minimize proximity within the traces while keeping the structure small.

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Course: Independent Project in Engineering Physics Anton Björk

B Appendix
This secondary appendix aims to provide background to the equations found in the study. Derivations deemed
to long or not relevant to the results of the study may be placed here.

B.1 Quality of a parallel RLC-circuit

As the quality factor is an important quantity in classifying the performance of a resonator circuit it important
to understand how it may relate to the circuit component values. By defining the quality factor for a resonator
system as the reciprocal of the fractional bandwidth the relations to the circuit components of a parallel RLC
network can be found. The magnitude of the input impedance is at a maximum at resonance or equivalently

i iR iL
iC
R C L

Figure 19: RLC-network connected to an ideal current source.

when the admittance is at a minimum. The magnitude of the admitance is given as

r
1 1 1 2
| | = |Yin | = + (ωC − ) . (49)
Zin R2 ωL
Where it is trivial that (ωC − ωL
1 2
) = 0 minimizes the expression. This produces the same resonant frequency
found in earlier chapters, namely
1
w0 = √ . (50)
LC
In order to fully express the resonator quality factor in terms
√ of circuit component values the half power points
also needs to be found. This occurs when the voltage is 2 · V = Vmax and it is known that

Vmax = IR. (51)

Using this the admittance at the 3dB points is given by

√
2
|Yin | = (52)
R
It is now possible to solve for the upper and lower 3dB points to find the bandwidth. The resulting equation
becomes
1 1 2
2
= (ωC − ) . (53)
R ωL
Simplifying further gives
1 1
0 = ω2 ± ω − . (54)
RC LC
The two 3dB frequencies are then given by
r
1 1 2 1
ω1,2 = ± ± ( ) + . (55)
2RC 2RC LC
The term under the square root is always bigger than the first term and hence the two positive solutions can be
used to find the bandwidth as
1
BW = ω2 − ω1 = (56)
RC
Now the quality factor can be given in terms of the component values according to
r
ω0 C R
Q= =R = . (57)
BW L ω0 L
Note that the quality factor is under this definition not explicitly frequency dependent but still depend on fre-
quency via the resistance and inductance. It is also productive to realize how the circuit parameters increase/de-
crease the quality of the response.

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Course: Independent Project in Engineering Physics Anton Björk

B.2 Relating inductor quality to equivalent parallel resistance

In order to simplify the circuit analysis of a finite quality resonator circuit it is productive to move the series
resistance of the inductor into the input resistance. Considering the circuit seen in figure 20 the equivalent

r
iL
i iR i iR iL
iC iC
R C L Req C L

Figure 20: Circuit with inductor series resistance converted to its parallel RLC equivalent.

impedance of series resistor and inductor pair is given by

ZRLs = r + jωL. (58)

Where RL and L is the series resistance and inductance values respectively. The parallel network version is
expressed as
(r · jωLp )
ZRLp = . (59)
(r + jωLp )
Equating these expressions these and solving for the parallel resistance and inductance results in
1
Rp = r(1 + Q2L ) ≈ rQ2L and Lp = L(1 + ) ≈ Lp . (60)
Q2L

Where QL is the inductor quality factor. For high quality factors where QL >> 1 the parallel and series in-
ductance can be assumed to be the same. This means that the resonant frequency can be assumed to be
unchanged for lossy indicators. Using the relation between the series and parallel resistances it is possible to
construct a single equivalent resistance Req . This results in

R · Rp R · rQ2L
Req = = . (61)
R + Rp R + rQ2L

Hence, the equivalent resistance approaches its maximum value of R as QL − → ∞. Since the quality of the
resonator circuit as a whole increases monotonically with the value of Req , it is almost always valuable optimize
for high Q inductors.

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