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MPMC Ese

This document is an end-semester examination paper for the Microprocessor and Microcontroller course at Veermata Jijabai Technological Institute. It consists of various questions covering topics such as the 8085 microprocessor, memory-mapped I/O, assembly language development tools, interrupt handling, and programming tasks. The exam is structured into five questions with sub-questions that require explanations, diagrams, and programming solutions.
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0% found this document useful (0 votes)
24 views2 pages

MPMC Ese

This document is an end-semester examination paper for the Microprocessor and Microcontroller course at Veermata Jijabai Technological Institute. It consists of various questions covering topics such as the 8085 microprocessor, memory-mapped I/O, assembly language development tools, interrupt handling, and programming tasks. The exam is structured into five questions with sub-questions that require explanations, diagrams, and programming solutions.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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VEERMATA JIJABAI TECHNOLOGICAL INSTITUTE, MATUNGA,

MUMBAI – 400019.
Microprocessor and Microcontroller (R4ET2014T)
S.Y. B.Tech. EXTC
End-semester Examination
Date: 30/04/2021 Time: 11:05 AM- 1:05 PM Duration: 2 Hours
--------------------------------------------------------------------------------------------------------------------------
Note:
1) Please write your name, roll number, course name and date on top of the answer sheet.
-------------------------------------------------------------------------------------------------------------------------
Q.1 (i) Explain the role of HOLD, HLDA, SID and SOD pins in 8085, with the (3)
activation signal and their applications.
(ii) State the difference between memory-mapped I/O and peripheral I/O (3)
in terms of device address, control signals, instructions available, data
transfer, maximum number of I/O possible, Execution speed and
hardware requirements in terms of decoder.
(iii) List and explain different tools used for developing assembly language (3)
programs.
(iv) Explain with example the nesting subroutine technique. (3)

Q.2 (i) After the execution of the following instructions, what are the contents (6)
of various registers, accumulator, SP and memory location and the flag
status?

(a) SUB A (b) MVI B, 91H


ADI 45 H MVI C, 87H
SUI E2H MOV A, B
ANI 01H
MOV B, A
ANI 01 H
ANA B
STA 3500H
(c) LXI SP, 4500H
LXI H, 2500H
LXI D, 3500H
PUSH H
XCHG
POP D
(ii) Answer the following: (6)
(a) Explain using diagram the RLC, RRC, RAL and RAR instructions.
(b) Explain any four different types of addressing modes of 8051 instruction
sets with an example.
(c) Draw and explain the memory addressing for the total of 4K bytes
memory interfacing to 8085 microprocessor. The available memory chip
consists of 1024 register bank (1K Byte memory).

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VEERMATA JIJABAI TECHNOLOGICAL INSTITUTE, MATUNGA,
MUMBAI – 400019.
Q.3 (i) Explain single-level interrupt of 8085 using circuit diagram to implement (4)
RST 3.
(ii) Explain the role of SIM and RIM instructions with the role of each bits. (4)
(iii) Explain the main features of 8259A interrupt controller using the block (4)
diagram.
Q.4 (i)Write a subroutine of 350 ms time delay using the system clock frequency (4)
of 3 Mhz.
(ii) Write a program to find the largest number in the array stored in memory (8)
location starting at 2500H. Save the largest number in memory location
3500H. Also perform the double addition of the largest number and save the
result in 3501 H and Carry (if generated) in 3502 H.

2500 2501 2502 2503 2504 2505 2506 2507 2508 2509
25 E1 67 A2 88 92 11 76 54 37

3500 3501 3502


Largest number Result of double addition Carry

Q.5 (i) State the difference between microprocessor and microcontroller with (6)
general block diagrams.
(ii) Draw and explain the timer/ counter logic diagram of 8051. Explain the (6)
SRF registers used for the Timer/counter purpose. Provide the respective bit
status of the SRF registers to select Mode 2 for the externally initiated timer
1. The external interrupt are used to initiate the timer 1 which is to be
triggered by falling edge signal.

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