Unit-7

Processor and Logic Design

(6-LH)

Compiled by: Madan Nath

BMC BIT-TU

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Contents:
q Processor Organization
q Arithmetic Logic Unit,
q Design of Arithmetic Circuit,
q Design of Logic Circuit.
q Design of Arithmetic Logic Unit.
q Status Register,
q Design of Shifter

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Processor Organization
q A processor must have 3 functional units to be what we call
a computer:
q a unit that performs arithmetic and logical operations on data
(ALU);
q a unit that remembers data while it isn’t being worked on
(Memory); and
q a unit which sequences the operations performed by the ALU
and on which data (Sequencer).
q “Processor organization” is a term describing how those
three elements are implemented and how they interconnect
to accomplish their tasks.

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Processor Organization
q In simple computer, the Sequencer consists of a Program Counter
register (PC), an incrementor for the PC, and a read/write port used for
branches and subroutine calls. It also contains the Instruction Register
which decodes instructions and drives the operation of the other two
units.
q The ALU consists of a literal ALU and an Accumulator register which is
usually one operand and the destination for arithmetic and logical
instructions. Control signals from the Sequencer indicate which
operation is to be performed.
q Memory is an array of storage slots indexed by an integer Placed in the
Memory Address Register. The Memory Read/Write control signal
indicates whether the value in the Memory Data Register should replace
the contents of the addressed slot, or whether the contents of the slot
should replace the contents of the Memory Data Register.
q The DEC PDP-8 is a great example of a pretty minimal computer..
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Classification of Processor
q Categorized by memory Organization
q Von Neuman Architecture
q Harvard architecture
q Categorized by Instruction type
q CISC
q RISC
q VLIW

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What is an arithmetic-logic unit (ALU)?
q An arithmetic-logic unit is the part of a central processing
unit that carries out arithmetic and logic operations on
the operands in computer instruction words.
q In some processors, the ALU is divided into two units: an
arithmetic unit (AU) and a logic unit (LU). Some
processors contain more than one AU -- for example, one
for fixed-point operations and another for floating-point
operations.
q In computer systems, floating-point computations are
sometimes done by a floating-point unit (FPU) on a
separate chip called a numeric coprocessor.

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How does an arithmetic-logic unit work?
q Typically, the ALU has direct input and output access to the processor
controller, main memory (random access memory or RAM in a
personal computer) and input/output devices. Inputs and outputs flow
along an electronic path that is called a bus.
q The input consists of an instruction word, sometimes called a
machine instruction word, that contains an operation code or
"opcode," one or more operands and sometimes a format code. The
operation code tells the ALU what operation to perform and the
operands are used in the operation.
q For example, two operands might be added together or compared
logically. The format may be combined with the opcode and tells, for
example, whether this is a fixed-point or a floating-point instruction.
q The output consists of a result that is placed in a storage register and
settings that indicate whether the operation was performed
successfully. If it isn't, some sort of status will be stored in a
permanent place that is sometimes called the machine status word. 7
How does an arithmetic-logic unit work?
q In general, the ALU includes storage places for input operands,
operands that are being added, the accumulated result (stored in
an accumulator) and shifted results. The flow of bits and the
operations performed on them in the subunits of the ALU are
controlled by gated circuits.
q The gates in these circuits are controlled by a sequence logic unit
that uses a particular algorithm or sequence for each operation code.
In the arithmetic unit, multiplication and division are done by a
series of adding or subtracting and shifting operations.
q There are several ways to represent negative numbers. In the logic
unit, one of 16 possible logic operations can be performed -- such as
comparing two operands and identifying where bits don't match.
q The design of the ALU is a critical part of the processor and new
approaches to speeding up instruction handling are continually
being developed.
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How does an arithmetic-logic unit work?
q In general, the ALU includes storage places for input operands,
operands that are being added, the accumulated result (stored in
an accumulator) and shifted results. The flow of bits and the
operations performed on them in the subunits of the ALU are
controlled by gated circuits.
q The gates in these circuits are controlled by a sequence logic unit
that uses a particular algorithm or sequence for each operation code.
In the arithmetic unit, multiplication and division are done by a
series of adding or subtracting and shifting operations.
q There are several ways to represent negative numbers. In the logic
unit, one of 16 possible logic operations can be performed -- such as
comparing two operands and identifying where bits don't match.
q The design of the ALU is a critical part of the processor and new
approaches to speeding up instruction handling are continually
being developed.
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Design of Arithmetic Circuit
q Arithmetic circuits can perform seven different arithmetic
operations using a single composite circuit.
It uses a full adder (FA) to perform these operations. A
multiplexer (MUX) is used to provide different inputs to the
circuit in order to obtain different arithmetic operations as
outputs.
q 4-bit Arithmetic Circuit :
Consider the following 4-bit Arithmetic circuit with inputs A
and B. It can perform seven different arithmetic operations by
varying the inputs of the multiplexer and the carry (C0).

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Design of Arithmetic Circuit

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Design of Arithmetic Circuit
q Truth Table for the above Arithmetic Circuit :

S0 S1 C0 MUX Output Full Adder Output

0 0 0 B A+B
0 0 1 B A+B+1
0 1 0 B’ A + B’
0 1 1 B’ A + B’ + 1 = A – B
1 0 0 0 A
1 0 1 0 A+1
1 1 0 1 A–1

1 1 1 1 A–1+1=A
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Design of Arithmetic Circuit
Hence, the different operations for the inputs A and B are –
1. A + B (adder)
2. A + B + 1
3. A + B’
4. A – B (subtracter)
5. A
6. A + 1 (incrementer)
7. A – 1 (decrementer)

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Design of Logic Circuit.
In Boolean Algebra, there are three basic operations, disjunction,
conjunction, and negation in propositional logic. Each of these
operations has a corresponding logic gate. Apart from these there
are a few other logic gates as well.
AND gate(.) – The AND gate gives an output of 1 if both the two
inputs are 1, it gives 0 otherwise.
OR gate(+) – The OR gate gives an output of 1 if either of the
two inputs are 1, it gives 0 otherwise.
NOT gate(‘) – The NOT gate gives an output of 1 input is 0 and
vice-versa.

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Design of Logic Circuit.
Implemented Using NAND gate

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Design of Logic Circuit.
Implemented Using NOR gate

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Design of Arithmetic Logic Unit.
• An ALU performs basic arithmetic and logic operations.
Examples of arithmetic operations are addition, subtraction,
multiplication, and division.
• Examples of logic operations are comparisons of values such
as NOT, AND, and OR.
• All information in a computer is stored and manipulated in the
form of binary numbers, i.e. 0 and 1.
• Transistor switches are used to manipulate binary numbers
since there are only two possible states of a switch: open or
closed. An open transistor, through which there is no current,
represents a 0. A closed transistor, through which there is a
current, represents a 1. 17
Design of Arithmetic Logic Unit.
• Operations can be accomplished by connecting multiple
transistors. One transistor can be used to control a second one -
in effect, turning the transistor switch on or off depending on
the state of the second transistor.
• This is referred to as a gate because the arrangement can be
used to allow or stop a current.
• The simplest type of operation is a NOT gate. This uses only a
single transistor.
• It uses a single input and produces a single output, which is
always the opposite of the input. This figure shows the logic of
the NOT gate:
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Design of Arithmetic Logic Unit.

Fig: CPU

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 Status Register
• A status register, flag register, or condition code register (CCR)
is a collection of status flag bits for a processor.
• Examples of such registers include FLAGS register in the x86
architecture, flags in the program status word (PSW) register
in the IBM System/360 architecture through z/Architecture,
and the application program status register (APSR) in
the ARM Cortex-A architecture.
• The status register is a hardware register that contains
information about the state of the processor.
• Individual bits are implicitly or explicitly read and/or written
by the machine code instructions executing on the processor.
• The status register lets an instruction take action contingent on
the outcome of a previous instruction.
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 Status Register
• Typically, flags in the status register are modified as effects of
arithmetic and bit manipulation operations.
• For example, a Z bit may be set if the result of the operation is
zero and cleared if it is nonzero. Other classes of instructions
may also modify the flags to indicate status.
• For example, a string instruction may do so to indicate whether
the instruction terminated because it found a match/mismatch
or because it found the end of the string.
• The flags are read by a subsequent conditional instruction so
that the specified action (depending on the processor, a jump,
call, return, or so on) occurs only if the flags indicate a
specified result of the earlier instruction.
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 Status Register
• Some CPU architectures, such as the MIPS and Alpha, do not
use a dedicated flag register. Others do not implicitly set and/or
read flags. Such machines either do not pass implicit status
information between instructions at all, or they pass it in an
explicitly selected general purpose register.
• A status register may often have other fields as well, such as
more specialized flags, interrupt enable bits, and similar types
of information.
• During an interrupt, the status of the thread currently executing
can be preserved (and later recalled) by storing the current
value of the status register along with the program counter and
other active registers into the machine stack or some other
reserved area of memory.
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 Design of Shifter
• A shifter is a combinational circuit with one or more inputs and
an equal number of outputs. The outputs are shifted with
respect to the inputs.
• If only a shift left or a shift right is required, no gates are
needed; such a shift can be accomplished with wires. Figure a)
shows a shift left. The data inputs are D0 through D3 and the
shifted outputs are S0 through S3.
• A zero is supplied to S0, S1 is connected to D0, S2 to D1, and
so on.
• The leftmost bit, in this example D3, is discarded. * Similarly,
a right shift can be wired as shown in Figure b). A zero is
supplied to S3 on the left, each of the remaining data bits is
shifted right one place. The rightmost data bit, D0, is discarded
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 Design of Shifter

Fig: a) Shifting left, and b) shifting right

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 Design of Shifter
• If a constant shift left or right is needed, a circuit such as the one
above will serve. Usually, more flexibility is needed. Let us examine
a four-bit shifter that can shift either left or right, depending on one
of two control lines. Examine the AND gates at the extreme left.
• If the LEFT control line is active, the leftmost AND gate sends its
output to the “bit bucket.” If the RIGHT control line is active, the
other AND gate of the pair sends signal D3 to output S2 via the OR
gate.
• Each of the remaining pairs of AND gates can send their outputs
either left or right, depending on which control line is active. The
leftmost and rightmost AND gates are not actually needed, but are
shown for emphasis and because we will use them in the next
circuit.
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 Design of Shifter

Fig: This circuit can shift the input bits left or right, depending on
which control line is active.
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~ The End ~

Thank u !!