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Interrupts in 8085

The document explains interrupts in the 8085 microprocessor, defining them as signals from external devices that request the processor to execute a higher priority task. Interrupts are categorized into vector and non-vector, maskable and non-maskable, and software and hardware types, with TRAP having the highest priority. It also describes the Interrupt Service Routine (ISR) as a program that services the interrupting source and allows the microprocessor to temporarily halt its current execution to address the interrupt.

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19 views3 pages

Interrupts in 8085

The document explains interrupts in the 8085 microprocessor, defining them as signals from external devices that request the processor to execute a higher priority task. Interrupts are categorized into vector and non-vector, maskable and non-maskable, and software and hardware types, with TRAP having the highest priority. It also describes the Interrupt Service Routine (ISR) as a program that services the interrupting source and allows the microprocessor to temporarily halt its current execution to address the interrupt.

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ashutoshprajapat70
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5.

Interrupts in 8085
5.1. Interrupt
Definition:
1. Interrupt is the mechanism by which the processor is made to transfer control from its current program
execution to another program having higher priority. The interrupt signal may be given to the processor
by any external peripheral device

2. Interrupts are the signals generated by the external devices to request the microprocessor to perform a
task. There are 5 interrupt signals, i.e. TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR.

5.2. Types of interrupt

Interrupt are classified into following groups based on their parameter.

Vector and Non-Vector interrupt

 Vector interrupt − In this type of interrupt, the interrupt address is known to the processor .For
example: RST7.5, RST6.5, RST5.5, TRAP.

 The address to which program control is transferred are

 Name Vectored address

 TRAP 0024 (4.5 X0008)

 RST 5.5 002C (5.5 X 0008)

 RST 6.5 0034 (6.5 X 0008)

 RST 7.5 003C (7.5 X 0008)

 Non-Vector interrupt − In this type of interrupt, the interrupt address is not known to the processor so,
the interrupt address needs to be sent externally by the device to perform interrupts. For
example: INTR.

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Maskable and Non-Maskable interrupt

 Maskable interrupt − In this type of interrupt, we can disable the interrupt by writing some
instructions into the program. For example: RST7.5, RST6.5, RST5.5.

 Non-Maskable interrupt − In this type of interrupt, we cannot disable the interrupt by writing some
instructions into the program. For example: TRAP.

The ‘EI’ instruction is a one byte instruction and is used to Enable the maskable interrupts.
The ‘DI’ instruction is a one byte instruction and is used to Disable the maskable interrupts

Software and Hardware Interrupt

 Software interrupt − In this type of interrupt, the programmer has to add the instructions into the
program to execute the interrupt. There are 8 software interrupts in 8085, i.e. RST0, RST1, RST2,
RST3, RST4, RST5, RST6, and RST7.

 Hardware interrupt − There are 5 interrupt pins in 8085 used as hardware interrupts, i.e. TRAP,
RST7.5, RST6.5, RST5.5, INTA.

Note − NTA is not an interrupt, it is used by the microprocessor for sending acknowledgement. TRAP has the
highest priority, then RST7.5 and so on.

5.3. Priority of interrupt

Interrupt Priority

TRAP 1

RST 7.5 2

RST 6.5 3

RST 5.5 4

INTR 5

5.4. Interrupt Service Routine (ISR)


A small program or a routine that when executed, services the corresponding interrupting source is called an
ISR.

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Figure:Interrupt service routine procedure

1. It allows the external devices to interrupt the normal program execution of the microprocessor.

2. When microprocessor receives interrupt signal, it temporarily stops current program and starts executing
new program indicated by the interrupt signal.
3. Interrupt signals are generated by external peripheral devices like keyboard, sensors, printers etc.
4. After execution of the new program, microprocessor returns back to the previous program.

5.5. Interrupt structure of 8085

Figure: Interrupt structure of 8085

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