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5_STM32 Clock and Configuration

The document outlines the STM32 clock system based on ARM technology, detailing its various clock sources, including HSI, HSE, LSI, LSE, and PLL. It emphasizes the importance of clock configuration for low-power operation and proper peripheral usage in embedded systems. Additionally, it lists the registers involved in the reset and clock setup process for the STM32F103 microcontroller.

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Nhat Hoang
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79 views14 pages

5_STM32 Clock and Configuration

The document outlines the STM32 clock system based on ARM technology, detailing its various clock sources, including HSI, HSE, LSI, LSE, and PLL. It emphasizes the importance of clock configuration for low-power operation and proper peripheral usage in embedded systems. Additionally, it lists the registers involved in the reset and clock setup process for the STM32F103 microcontroller.

Uploaded by

Nhat Hoang
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Principle of Microcomputer

Based on ARM Technology

STM32 Clock and Configuration


CONTENTS
• Objectives

• Clock System of STM32F103

• Clock Configuration of STM32

• STM32 functions related to clock

2
★Objectives:

 Know the STM32 Clock System

 All STM32 peripherals are driven by the


clock, and every module uses independent
clock to meet the low-power requirement. So
STM32 clock system must be studied in
detail to use peripherals properly.

3
STM32 Clock System
There are 5 clock sources in STM32F103：
HSI (High Speed Internal)
HSE (High Speed External)
LSI (Low Speed Internal)
LSE (Low Speed External)
PLL(Phase Locked Loop)

Where, HSI, HSE, and PLL can be used as System Clock.


LSI and LSE are second level clock.

The clock tree of STM32F103 is shown in Fig.11


on page 115 of the STM32 Reference Manual (RM)

4
The clock tree of STM32F103 is shown in Fig.5-1
on page 115 of the STM32 Reference Manual (RM)

5
Fig.5-1 Clock tree
The clock tree of STM32F103 is shown in Fig.5-1
on page 115 of the STM32 Reference Manual (RM)

6
Fig.5-1 Clock tree
The clock tree of STM32F103 is shown in Fig.5-1
on page 115 of the STM32 Reference Manual (RM)

7
Fig.5-1 Clock tree
PLL is from HSI or
HSE
HSI, HSE or PLL can be used as System Clock
8
There are several clocks for MCU core and
different peripherals. Why?

9
First reason
High speed clock is used for high speed
devices, like CPU, and low speed clock is used
for low speed devices like peripherals.

Second reason
This mode of clock is helpful to realize low
power consumption.

10
Enable clock out

Due to the requirement of low power, every module of


STM32 microcontroller uses the clocks independently.

So, when we use a peripheral, we must enable its clock


firstly. Otherwise, it will not work.

11
Clock configuration of STM32
In general, an embedded system should be initialized
before it works.

In embedded system initialization, the system should be set


up.

The clock source should be considered in clock setup, and


PLL should also be considered.

Then the internal bus, external bus and peripherals clock


should be set up.

12
Clock configuration of STM32
The flow chart of clock setup is shown in Fig.5-2.
Enable HSE clock

Set up AHB clock according to the


system clock RCC_HCLKConfig

Set up APB2 clock according to


AHB clock RCC_HCLK2Config

Set up APB1 clock according to


AHB clock
RCC_HCLK1Config

Select HSI, HSE or PLL as the system


Set up system clock
clock

Enable peripherals RCC_AHBPeriphClockCmd

Fig. 5-2 Flow chart of clock setup 13


The reset and clock setup of STM32F103 include 10 registers:
①Clock control register (RCC_CR)
②Clock configuration register (RCC_CFGR)
③Clock interrupt register (RCC_CIR)
④APB2 peripheral reset register (RCC_APB2RSTR)
⑤APB1 peripheral reset register (RCC_APB1RSTR)
⑥AHB Peripheral Clock enable register (RCC_AHBENR)
⑦APB2 peripheral clock enable register(RCC_APB2ENR)
⑧APB1 peripheral clock enable register(RCC_APB1ENR)
⑨Backup domain control register (RCC_BDCR)
⑩Control/status register (RCC_CSR)

They can be viewed in STM32 Reference Manual (RM) from page 121
14
‘7.3 RCC registers’

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