COMPUTER ORGANISATION

CHAPTER – 1
BASIC STRUCTURE OF COMPUTERS

Computer types: -

A computer can be defined as a fast electronic calculating machine that accepts

the (data) digitized input information process it as per the list of internally stored
instructions and produces the resulting information.

List of instructions are called programs & internal storage is called computer
memory.

The different types of computers are

1. Personal computers: - This is the most common type found in homes, schools,
Business offices etc., It is the most common type of desk top computers with
processing and storage units along with various input and output devices.
2. Note book computers: - These are compact and portable versions of PC
3. Work stations: - These have high resolution input/output (I/O) graphics
capability, but with same dimensions as that of desktop computer. These are used
in engineering applications of interactive design work.
4. Enterprise systems: - These are used for business data processing in medium to
large corporations that require much more computing power and storage capacity
than work stations. Internet associated with servers have become a dominant
worldwide source of all types of information.
5. Super computers: - These are used for large scale numerical calculations
required in the applications like weather forecasting etc.,

Functional unit: -
A computer consists of five functionally independent main parts input, memory,
arithmetic logic unit (ALU), output and control unit.

Input ALU

I/O Memory Processor

Output Control Unit

Fig a : Functional units of computer

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 Input device accepts the coded information as source program i.e. high level
language. This is either stored in the memory or immediately used by the processor to
perform the desired operations. The program stored in the memory determines the
processing steps. Basically the computer converts one source program to an object
program. i.e. into machine language.

Finally the results are sent to the outside world through output device. All of
these actions are coordinated by the control unit.

Input unit: -
The source program/high level language program/coded information/simply data
is fed to a computer through input devices keyboard is a most common type. Whenever a
key is pressed, one corresponding word or number is translated into its equivalent binary
code over a cable & fed either to memory or processor.

Joysticks, trackballs, mouse, scanners etc are other input devices.

Memory unit: -
Its function into store programs and data. It is basically to two types

1. Primary memory
2. Secondary memory

1. Primary memory: - Is the one exclusively associated with the processor and operates
at the electronics speeds programs must be stored in this memory while they are being
executed. The memory contains a large number of semiconductors storage cells. Each
capable of storing one bit of information. These are processed in a group of fixed site
called word.

To provide easy access to a word in memory, a distinct address is associated with

each word location. Addresses are numbers that identify memory location.

Number of bits in each word is called word length of the computer. Programs
must reside in the memory during execution. Instructions and data can be written into the
memory or read out under the control of processor.

Memory in which any location can be reached in a short and fixed amount of
time after specifying its address is called random-access memory (RAM).

The time required to access one word in called memory access time. Memory
which is only readable by the user and contents of which can’t be altered is called read
only memory (ROM) it contains operating system.

Caches are the small fast RAM units, which are coupled with the processor and
are aften contained on the same IC chip to achieve high performance. Although primary
storage is essential it tends to be expensive.

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2 Secondary memory: - Is used where large amounts of data & programs have to be
stored, particularly information that is accessed infrequently.

Examples: - Magnetic disks & tapes, optical disks (ie CD-ROM’s), floppies etc.,

Arithmetic logic unit (ALU):-

Most of the computer operators are executed in ALU of the processor like
addition, subtraction, division, multiplication, etc. the operands are brought into the ALU
from memory and stored in high speed storage elements called register. Then according
to the instructions the operation is performed in the required sequence.

The control and the ALU are may times faster than other devices connected to a
computer system. This enables a single processor to control a number of external devices
such as key boards, displays, magnetic and optical disks, sensors and other mechanical
controllers.

Output unit:-
These actually are the counterparts of input unit. Its basic function is to send the
processed results to the outside world.

Examples:- Printer, speakers, monitor etc.

Control unit:-
It effectively is the nerve center that sends signals to other units and senses their
states. The actual timing signals that govern the transfer of data between input unit,
processor, memory and output unit are generated by the control unit.

Basic operational concepts: -

To perform a given task an appropriate program consisting of a list of
instructions is stored in the memory. Individual instructions are brought from the memory
into the processor, which executes the specified operations. Data to be stored are also
stored in the memory.

Examples: - Add LOCA, R0

This instruction adds the operand at memory location LOCA, to operand in

register R0 & places the sum into register. This instruction requires the performance of
several steps,

1. First the instruction is fetched from the memory into the processor.
2. The operand at LOCA is fetched and added to the contents of R0
3. Finally the resulting sum is stored in the register R0

The preceding add instruction combines a memory access operation with an ALU
Operations. In some other type of computers, these two types of operations are performed
by separate instructions for performance reasons.

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 Load LOCA, R1
Add R1, R0
Transfers between the memory and the processor are started by sending the
address of the memory location to be accessed to the memory unit and issuing the
appropriate control signals. The data are then transferred to or from the memory.

MEMORY

MAR MDR
CONTROL

PC R0
R1
…
… ALU
IR …
…

Rn-1
n- GPRs

Fig b : Connections between the processor and the memory

The fig shows how memory & the processor can be connected. In addition to the
ALU & the control circuitry, the processor contains a number of registers used for several
different purposes.

The instruction register (IR):- Holds the instructions that is currently being executed.
Its output is available for the control circuits which generates the timing signals that
control the various processing elements in one execution of instruction.

The program counter PC:-

This is another specialized register that keeps track of execution of a program. It
contains the memory address of the next instruction to be fetched and executed.

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 Besides IR and PC, there are n-general purpose registers R0 through Rn-
1. The other two registers which facilitate communication with memory are: -
1. MAR – (Memory Address Register):- It holds the address of the location to be
accessed.
2. MDR – (Memory Data Register):- It contains the data to be written into or read
out of the address location.

Operating steps are

1. Programs reside in the memory & usually get these through the I/P unit.
2. Execution of the program starts when the PC is set to point at the first instruction
of the program.
3. Contents of PC are transferred to MAR and a Read Control Signal is sent to the
memory.
4. After the time required to access the memory elapses, the address word is read out
of the memory and loaded into the MDR.
5. Now contents of MDR are transferred to the IR & now the instruction is ready to
be decoded and executed.
6. If the instruction involves an operation by the ALU, it is necessary to obtain the
required operands.
7. An operand in the memory is fetched by sending its address to MAR & Initiating
a read cycle.
8. When the operand has been read from the memory to the MDR, it is transferred
from MDR to the ALU.
9. After one or two such repeated cycles, the ALU can perform the desired
operation.
10. If the result of this operation is to be stored in the memory, the result is sent to
MDR.
11. Address of location where the result is stored is sent to MAR & a write cycle is
initiated.
12. The contents of PC are incremented so that PC points to the next instruction that
is to be executed.

Normal execution of a program may be preempted (temporarily interrupted) if

some devices require urgent servicing, to do this one device raises an Interrupt signal.

An interrupt is a request signal from an I/O device for service by the processor.
The processor provides the requested service by executing an appropriate interrupt
service routine.

The Diversion may change the internal stage of the processor its state must be
saved in the memory location before interruption. When the interrupt-routine service is
completed the state of the processor is restored so that the interrupted program may
continue.

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Bus structure: -
The simplest and most common way of interconnecting various parts of the
computer.
To achieve a reasonable speed of operation, a computer must be organized so that
all its units can handle one full word of data at a given time.

A group of lines that serve as a connecting port for several devices is called a
bus.

In addition to the lines that carry the data, the bus must have lines for address and
control purpose.

Simplest way to interconnect is to use the single bus as shown

INPUT MEMORY PROCESSOR OUTPUT

Fig c: Single bus structure

Since the bus can be used for only one transfer at a time, only two units can
actively use the bus at any given time. Bus control lines are used to arbitrate multiple
requests for use of one bus.

Single bus structure is

 Low cost
 Very flexible for attaching peripheral devices

Multiple bus structure certainly increases, the performance but also increases the
cost significantly.

All the interconnected devices are not of same speed & time, leads to a bit of a
problem. This is solved by using cache registers (ie buffer registers). These buffers are
electronic registers of small capacity when compared to the main memory but of
comparable speed.

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 The instructions from the processor at once are loaded into these buffers and then
the complete transfer of data at a fast rate will take place.

Performance: -
The most important measure of the performance of a computer is how quickly it
can execute programs. The speed with which a computer executes program is affected by
the design of its hardware. For best performance, it is necessary to design the compiles,
the machine instruction set, and the hardware in a coordinated way.

The total time required to execute the program is elapsed time is a measure of the
performance of the entire computer system. It is affected by the speed of the processor,
the disk and the printer. The time needed to execute a instruction is called the processor
time.

Just as the elapsed time for the execution of a program depends on all units in a
computer system, the processor time depends on the hardware involved in the execution
of individual machine instructions. This hardware comprises the processor and the
memory which are usually connected by the bus as shown in the fig c.

Main Cache Processor

Memory Memory

Bus

Fig d :The processor cache

The pertinent parts of the fig. c is repeated in fig. d which includes the cache
memory as part of the processor unit.

Let us examine the flow of program instructions and data between the memory
and the processor. At the start of execution, all program instructions and the required data
are stored in the main memory. As the execution proceeds, instructions are fetched one
by one over the bus into the processor, and a copy is placed in the cache later if the same
instruction or data item is needed a second time, it is read directly from the cache.

The processor and relatively small cache memory can be fabricated on a single
IC chip. The internal speed of performing the basic steps of instruction processing on
chip is very high and is considerably faster than the speed at which the instruction and

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 data can be fetched from the main memory. A program will be executed faster if the
movement of instructions and data between the main memory and the processor is
minimized, which is achieved by using the cache.

For example:- Suppose a number of instructions are executed repeatedly over a short
period of time as happens in a program loop. If these instructions are available in the
cache, they can be fetched quickly during the period of repeated use. The same applies to
the data that are used repeatedly.

Processor clock: -
Processor circuits are controlled by a timing signal called clock. The clock
designer the regular time intervals called clock cycles. To execute a machine instruction
the processor divides the action to be performed into a sequence of basic steps that each
step can be completed in one clock cycle. The length P of one clock cycle is an important
parameter that affects the processor performance.

Processor used in today’s personal computer and work station have a clock rates
that range from a few hundred million to over a billion cycles per second.

RTL interpretation of instructions

Register Transfer Language

A digital computer system exhibits an interconnection of digital modules

such as registers, decoders, arithmetic elements, and Control logic.

These digital modules are interconnected with some common data and
control paths to form a complete digital system.

Moreover, digital modules are best defined by the registers and the
operations that are performed on the data stored in them.

The operations performed on the data stored in registers are

called Micro-operations.

The internal hardware organization of a digital system is best defined by

specifying:

o The set of registers and the flow of data between them.

o The sequence of micro-operations performed on the data which are
stored in the registers.
o The control paths that initiates the sequence of micro-operation

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The Register Transfer Language is the symbolic representation of
notations used to specify the sequence of micro-operations.

In a computer system, data transfer takes place between processor

registers and memory and between processor registers and input-output
systems. These data transfer can be represented by standard notations
given below:

o Notations R0, R1, R2..., and so on represent processor registers.

o The addresses of memory locations are represented by names such
as LOC, PLACE, MEM, etc.
o Input-output registers are represented by names such as DATA IN,
DATA OUT and so on.
o The content of register or memory location is denoted by placing
square brackets around the name of the register or memory
location.

Register Transfer:
The term Register Transfer refers to the availability of hardware logic circuits that can perform a
given micro-operation and transfer the result of the operation to the same or another register.

Most of the standard notations used for specifying operations on various registers are stated below.
The memory address register is designated by MAR.
Program Counter PC holds the next instruction's address.
Instruction Register IR holds the instruction being executed.
R1 (Processor Register).
We can also indicate individual bits by placing them in parenthesis. For instance, PC (8-15), R2 (5),
etc.
Data Transfer from one register to another register is represented in symbolic form by means of
replacement operator. For instance, the following statement denotes a transfer of the data of register
R1 into register R2.
R2 ← R1
Typically, most of the users want the transfer to occur only in a predetermined control condition.
This can be shown by following if-then statement:
If (P=1) then (R2 ← R1); Here P is a control signal generated in the control section.
It is more convenient to specify a control function (P) by separating the control variables from the
register transfer operation. For instance, the following statement defines the data transfer operation
under a specific control function (P).
P: R2 ← R1

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 Addressing Modes
The term addressing modes refers to the way in which the operand
of an instruction is specified. The addressing mode specifies a rule
for interpreting or modifying the address field of the instruction
before the operand is actually executed.
Addressing modes for 8086 instructions are divided into two
categories:
1) Addressing modes for data
2) Addressing modes for branch
The 8086 memory addressing modes provide flexible access to
memory, allowing you to easily access variables, arrays, records,
pointers, and other complex data types. The key to good assembly
language programming is the proper use of memory addressing
modes.
An assembly language program instruction consists of two parts

IMPORTANT TERMS
 Starting address of memory segment.
 Effective address or Offset: An offset is determined by adding
any combination of three address elements: displacement,
base and index.
 Displacement: It is an 8 bit or 16 bit immediate value
given in the instruction.
 Base: Contents of base register, BX or BP.
 Index: Content of index register SI or DI.
According to different ways of specifying an operand by 8086
microprocessor, different addressing modes are used by 8086.
Addressing modes used by 8086 microprocessor are discussed
below:

1. Implied mode:
In implied addressing the operand is specified in the instruction
itself. In this mode the data is 8 bits or 16 bits long and data is
the part of instruction. Zero address instruction are designed

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 with implied addressing mode.

Example: CLC (used to reset Carry flag to 0)

2. Immediate addressing mode (symbol #):
In this mode data is present in address field of
instruction .Designed like one address instruction format.
Note:Limitation in the immediate mode is that the range of
constants are restricted by size of address field.

Example: MOV AL, 35H (move the data 35H into AL register)

3. Register mode:
In register addressing the operand is placed in one of 8 bit or 16
bit general purpose registers. The data is in the register that is
specified by the instruction.
Here one register reference is required to access the data.

Example: MOV AX,CX (move the contents of CX register to AX

register)

4. Register Indirect mode:

In this addressing the operand’s offset is placed in any one of the
registers BX,BP,SI,DI as specified in the instruction. The effective
address of the data is in the base register or an index register
that is specified by the instruction.
Here two register reference is required to access the data.

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 The 8086 CPUs let you access memory indirectly through a
register using the register indirect addressing modes.
MOV AX, [BX](move the contents of memory location s
addressed by the register BX to the register AX)

5. Auto Indexed (increment mode):

Effective address of the operand is the contents of a register
specified in the instruction. After accessing the operand, the
contents of this register are automatically incremented to point
to the next consecutive memory location.(R1)+.
Here one register reference, one memory reference and one ALU
operation is required to access the data.
Example:
Add R1, (R2)+ // OR
R1 = R1 +M[R2]
R2 = R2 + d
Useful for stepping through arrays in a loop. R2 – start of
array d – size of an element

6.Auto indexed ( decrement mode):

Effective address of the operand is the contents of a register
specified in the instruction. Before accessing the operand, the
contents of this register are automatically decremented to point
to the previous consecutive memory location. –(R1)
Here one register reference,one memory reference and one ALU
operation is required to access the data.
Example:
Add R1,-(R2) //OR
R2 = R2-d
R1 = R1 + M[R2]
Auto decrement mode is same as auto increment mode. Both can
also be used to implement a stack as push and pop . Auto
increment and Auto decrement modes are useful for implementing
“Last-In-First-Out” data structures.

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7. Direct addressing/ Absolute addressing Mode (symbol
[ ]):
The operand’s offset is given in the instruction as an 8 bit or 16
bit displacement element. In this addressing mode the 16 bit
effective address of the data is the part of the instruction.
Here only one memory reference operation is required to access
the data.

Example:ADD AL,[0301] //add the contents of offset

address 0301 to AL
8. Indirect addressing Mode (symbol @ or () ):

In this mode address field of instruction contains the address of

effective address. Here two references are required.
1st reference to get effective address.
2nd reference to access the data.
Based on the availability of Effective address, Indirect mode is of
two kind:
1. Register Indirect: In this mode effective address is in the
register, and corresponding register name will be maintained
in the address field of an instruction.
Here one register reference,one memory reference is required
to access the data.
2. Memory Indirect:In this mode effective address is in the
memory, and corresponding memory address will be
maintained in the address field of an instruction.
Here two memory reference is required to access the data.

9. Indexed addressing mode:

The operand’s offset is the sum of the content of an index
register SI or DI and an 8 bit or 16 bit displacement.
Example: MOV AX, [SI +05]
10. Based Indexed Addressing:
The operand’s offset is sum of the content of a base register BX
or BP and an index register SI or DI.
Example: ADD AX, [BX+SI]
Advantages of Addressing Modes

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1. To give programmers to facilities such as Pointers, counters for
loop controls, indexing of data and program relocation.
2. To reduce the number bits in the addressing field of the
Instruction.

Computer Organization | RISC and CISC

Reduced Instruction Set Architecture (RISC) –
The main idea behind this is to make hardware simpler by using an
instruction set composed of a few basic steps for loading,
evaluating, and storing operations just like a load command will
load data, a store command will store the data.
Complex Instruction Set Architecture (CISC) –
The main idea is that a single instruction will do all loading,
evaluating, and storing operations just like a multiplication
command will do stuff like loading data, evaluating, and storing it,
hence it’s complex.
Both approaches try to increase the CPU performance
 RISC: Reduce the cycles per instruction at the cost of the
number of instructions per program.

 CISC: The CISC approach attempts to minimize the number of

instructions per program but at the cost of an increase in the
number of cycles per instruction.

Earlier when programming was done using assembly language, a

need was felt to make instruction do more tasks because
programming in assembly was tedious and error-prone due to
which CISC architecture evolved but with the uprise of high-level
language dependency on assembly reduced RISC architecture
prevailed.
Characteristic of RISC –
1. Simpler instruction, hence simple instruction decoding.
2. Instruction comes undersize of one word.
3. Instruction takes a single clock cycle to get executed.
4. More general-purpose registers.
5. Simple Addressing Modes.
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6. Fewer Data types.
7. A pipeline can be achieved.
Characteristic of CISC –
1. Complex instruction, hence complex instruction decoding.
2. Instructions are larger than one-word size.
3. Instruction may take more than a single clock cycle to get
executed.
4. Less number of general-purpose registers as operations get
performed in memory itself.
5. Complex Addressing Modes.
6. More Data types.
Example – Suppose we have to add two 8-bit numbers:
 CISC approach: There will be a single command or instruction
for this like ADD which will perform the task.
 RISC approach: Here programmer will write the first load
command to load data in registers then it will use a suitable
operator and then it will store the result in the desired location.
So, add operation is divided into parts i.e. load, operate, store due
to which RISC programs are longer and require more memory to get
stored but require fewer transistors due to less complex command.
Difference –
RISC CISC

Focus on software Focus on hardware

Uses both hardwired and microprogrammed

Uses only Hardwired control unit
control unit

Transistors are used for storing complex

Transistors are used for more registers
Instructions

Fixed sized instructions Variable sized instructions

Can perform only Register to Register Can perform REG to REG or REG to MEM
Arithmetic operations or MEM to MEM

Requires more number of registers Requires less number of registers

Code size is large Code size is small

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 RISC CISC

An instruction executed in a single clock

Instruction takes more than one clock cycle
cycle

Instructions are larger than the size of one

An instruction fit in one word.
word

Simple and limited addressing modes. Complex and more addressing modes.

RISC is Reduced Instruction Cycle. CISC is Complex Instruction Cycle.

The number of instructions are less as The number of instructions are more as
compared to CISC. compared to RISC.

It consumes the low power. It consumes more/high power.

RISC is highly pipelined. CISC is less pipelined.

RISC required more RAM. CISC required less RAM.

Here, Addressing modes are less. Here, Addressing modes are more.

Advantages of RISC:

Simpler instructions: RISC processors use a smaller set of simple

instructions, which makes them easier to decode and execute
quickly. This results in faster processing times.
Faster execution: Because RISC processors have a simpler
instruction set, they can execute instructions faster than CISC
processors.
Lower power consumption: RISC processors consume less power
than CISC processors, making them ideal for portable devices.

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Disadvantages of RISC:

More instructions required: RISC processors require more

instructions to perform complex tasks than CISC processors.
Increased memory usage: RISC processors require more
memory to store the additional instructions needed to perform
complex tasks.
Higher cost: Developing and manufacturing RISC processors can
be more expensive than CISC processors.

Advantages of CISC:

Reduced code size: CISC processors use complex instructions

that can perform multiple operations, reducing the amount of code
needed to perform a task.
More memory efficient: Because CISC instructions are more
complex, they require fewer instructions to perform complex tasks,
which can result in more memory-efficient code.
Widely used: CISC processors have been in use for a longer time
than RISC processors, so they have a larger user base and more
available software.

Disadvantages of CISC:

Slower execution: CISC processors take longer to execute

instructions because they have more complex instructions and
need more time to decode them.
More complex design: CISC processors have more complex
instruction sets, which makes them more difficult to design and
manufacture.
Higher power consumption: CISC processors consume more
power than RISC processors because of their more complex
instruction sets.

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