20 Most Important Questions

1. For the silicon diode the reverse saturation current is 𝟐𝟎𝝁𝑨 at 27 degree centigrade. What will be the
value of reverse saturation current at 87 degree centigrade?

Solution:
Given,
Reverse saturation current at 27 degree centigrade (𝐼𝑆 ) = 20𝜇𝐴
Reverse saturation current at 87 degree centigrade = ?

We know that reverse saturation current doubles at every 10 degree change in temperature.

Total change in temperature = 87 − 27 = 60

Therefore, reverse saturation current doubles 60/10=6 times

Now, Reverse saturation current at 87 degree centigrade = 26 × 20𝜇𝐴 = 64 × 20 = 1280𝜇𝐴

2. Determine the range of values of Vin that will maintain the Zener diode in the ON state. Also find the
maximum power that can be dissipated to the diode.

Solution:

Given,
Series resistance (Rs) = 220Ω
Load resistance (RL) = 1.2KΩ
Zener Voltage (VZ) = 50V
Maximum Zener current (IZM) = 60mA

Range of input voltage (Vin) = ?

50
Current in load resistance (IL) = 1.2𝐾 = 41.66 𝑚𝐴

For maximum input voltage that can switch on the diode,

Current through series resistance (IS) = 60 + 41.66 = 101.66mA

Therefore, voltage in series resistance (Vs) = 101.66 × 220 = 22.365𝑉
 So, maximum voltage that can be applied (Vin) = 50 + 22.365 = 72.365𝑉

For, minimum input voltage that can switch on the diode,

Current through series resistance (IS) = 41.66 mA [Almost zero current flows through diode]
Therefore, voltage in series resistance (Vs) = 41.66 × 220 = 9.1652𝑉
So, minimum voltage that can be applied (Vin) = 50 + 9.1652 = 59.1652𝑉

3. What are VI characteristic of diode? What happens when a forward biased diode is suddenly reverse
biased? Explain with necessary diagrams.

Solution:

The VI characteristics of a diode refer to the relationship between the voltage applied to the diode and
the current that flows through it. It is a graph that tells you how the diode behaves under different
voltage conditions.

Here is a breakdown of the key points:

Regions of operation:

Zero bias: When no voltage is applied, the diode does not conduct any current.

Forward bias: When the positive voltage is applied to the p-type side and the negative voltage to the n-
type side, the current starts flowing through the diode. Initially, the current increases slowly, then rises
sharply as the voltage increases further. This is because the applied voltage overcomes the internal
barrier in the diode.
Reverse bias: When the positive voltage is applied to the n-type side and the negative voltage to the p-
type side, the diode ideally blocks any current flow. However, a small leakage current might still exist.

Key features of the VI curve:

Knee voltage: The minimum voltage required to forward bias the diode and initiate significant current
flow. For silicon diodes, it is around 0.7 V, while for germanium diodes, it is around 0.3 V.
Reverse leakage current: A small current that flows in the reverse bias region, typically exceedingly
insignificant compared to the forward current.
Breakdown voltage: The maximum reverse voltage that the diode can withstand without damage.
Exceeding this voltage can cause the diode to break down and conduct a large current.

When forward bias diode suddenly reverse biased

In the forward-bias state, there are many electrons from the n -type material progressing through the p
-type material and many holes in the n -type material—a requirement for conduction. The electrons in
the p-type material and holes progressing through the n-type material establish a large number of
minority carriers in each material. If the applied voltage is suddenly reversed to establish a reverse-bias
situation, we would ideally like to see the diode change instantaneously from the conduction state to
the non-conduction state. However, because of the considerable number of minority carriers in each
material, the diode current will simply reverse and stay at this measurable level for the period ts (storage
time) required for the minority carriers to return to their majority-carrier state in the opposite material.
The diode will remain in the short-circuit state with a current Ireverse determined by the network
parameters. Eventually, when this storage phase has passed, the current will be reduced in level to that
associated with the non-conduction state. This second period is denoted by tt (transition interval). The
reverse recovery time is the sum of these two intervals: 𝑡𝑟𝑟𝑡 = 𝑡𝑠 + 𝑡𝑡
 4. Distinguish between Zener breakdown and avalanche breakdown. The circuit shown uses two Zener
diodes, each rated at 10V, 180mA. If the circuit is connected to a 24V unregulated power supply.
Determine:
i. The value of series resistance(R)
ii. Maximum power dissipation across each Zener diode.

Solution:

Let us delve into the differences between Zener breakdown and avalanche breakdown in the context of
semiconductor diodes:
Zener Breakdown
Mechanism: Zener breakdown occurs due to the high electric field across the PN junction.
Process: When a diode is reverse biased, the kinetic energy of electrons increases, causing them to move
at high velocities. These high-velocity electrons collide with other atoms, leading to the creation of free
electrons. These newly generated free electrons contribute to a high reverse saturation current.
Voltage Range: Typically observed in Zener diodes with a Zener breakdown voltage of 5 to 8 volts.
Characteristics: Zener breakdown is reversible and does not damage the diode.
Application: Zener diodes are designed to operate in the breakdown region without harm.
Avalanche Breakdown:
Mechanism: Avalanche breakdown occurs due to the collision of free electrons with atoms in the
semiconductor material.
Process: When a high reverse voltage is applied across the diode, the electric field across the junction
intensifies. This electric field exerts a force on electrons, freeing them from covalent bonds. The liberated
electrons gain high velocities and collide with other atoms, creating even more free electrons. This rapid
increase in net current characterizes avalanche breakdown.
Voltage Range: Observed in Zener diodes with a Zener breakdown voltage greater than 8 volts.
Characteristics: Avalanche breakdown is irreversible and may permanently damage the diode.
Application: Commonly seen in high-voltage power devices.

Given,
Zener diodes are rated at 10V, 180mA
Supply voltage (V) = 24V
Assume that Zener diode is on with 0 current.
𝑉 20
Therefore, 𝐼𝐿 = 𝐼𝑆 = 𝐿 = = 10𝑚𝐴
𝑅𝐿 2
𝑉𝑆 𝑉−𝑉𝐿 4
So, 𝑅𝑆 = 𝐼𝑆
= 2
= 10 = 0.4𝐾Ω
Now, assume that Zener diode is on with 180mA.
𝑉 20
Therefore, 𝐼𝑆 = 180 + 𝐼𝐿 = 180 + 𝑅𝐿 = 180 + 2 = 190𝑚𝐴
𝐿
𝑉𝑆 𝑉−𝑉𝐿 4
So, 𝑅𝑆 = 𝐼𝑆
= 2
= 190 = 21.05Ω
 Maximum power dissipated in each Zener diode

𝑃𝑜𝑤𝑒𝑟 = 𝑉𝑍 ⋅ 𝐼𝑍 = 10 ⋅ 180 = 1.8𝑊

5. What is a bipolar junction transistor? Why is it so called? Explain the working principle of NPN
transistor with necessary diagram.
Solution:
A Bipolar Junction Transistor (BJT) is a three-terminal semiconductor device made up of three layers of
doped semiconductor material. The three layers have alternating p-type and n-type doping, creating two
p-n junctions. The three terminals are called:
Base: The thin middle layer.
Emitter: One of the outer layers, heavily doped.
Collector: The other outer layer, moderately doped.
Why is it called "bipolar"
BJTs (Bipolar Junction Transistors) are called bipolar because the conduction of current through them
relies on the movement of two types of charge carriers:
Electrons: Negatively charged carriers that primarily flow from the emitter to the collector.
Holes: Positively charged vacancies in the semiconductor lattice that move in the opposite direction of
electron flow.
An NPN transistor consists of a thin layer of P-type semiconductor sandwiched between two N-type
semiconductor regions. The three sections are named:
Emitter (N): Heavily doped with moderate size.
Base (P): Thin and lightly doped.
Collector (N): Moderately doped with huge size.
Working Principle
The NPN transistor operates on the principle of controlling the flow of electrons (majority carriers) from
the emitter to the collector, using a small current flowing into the base.
Here's a breakdown of the steps in a common emitter configuration:
Forward Bias at the Emitter-Base Junction
The emitter-base junction is forward biased, meaning the positive terminal of the battery (VBE) is
connected to the N-type emitter, and the negative terminal is connected to the P-type base. This
forward bias lowers the potential barrier at the junction, allowing most electrons from the heavily
doped emitter to flow into the thin base region.
Diffusion of Electrons Across the Base
The base is very thin and lightly doped, so only a small percentage of the electrons from the emitter
combine with holes in the base region. Most of the electrons diffuse across the base to the collector-
base junction.
Reverse Bias at the Collector-Base Junction
The collector-base junction is reverse biased, meaning the positive terminal of the battery (VCE) is
connected to the N-type collector and the negative terminal to the P-type base. Despite the reverse
bias, the strong electric field created attracts most of the electrons that have diffused to the edge of the
depletion region. These electrons are swept into the collector region.
Collector Current
The considerable number of electrons entering the collector gives rise to the collector current (IC). Since
only a few electrons are lost in the base, the collector current is almost equal to the emitter current (IE).
Key Points
Base current controls collector current: A small current flowing into the base (IB) can control a much
larger current flowing from the emitter to the collector (IC). This provides the amplification property of
the transistor.
The transistor acts like a current-controlled current source.
6. For the circuit shown below, draw the dc load line and find the operating point. Also find the stability
of the circuit. (Assume silicon transistor with β = 100)

Solution:
Given,
𝑅1 = 100𝐾Ω
𝑅2 = 10𝐾Ω
𝑅𝐶 = 2𝐾Ω
𝑅𝐸 = 1𝐾Ω
For dc analysis,
For DC analysis

1. All capacitors are open circuited.

2. All AC sources are grounded.

Now, to find Thevenin equivalent circuit

𝑅 ∗𝑅 100⋅10
𝑅𝑡ℎ = 𝑅 1+𝑅2 = 100+10 = 9.0909𝐾Ω
1 2
𝑅2 ⋅𝑉𝑐𝑐 10⋅20
𝑉𝑡ℎ = = 100+10 = 1.818𝑉
𝑅1 ⋅𝑅2
 Now, using KVL in base to emitter junction,

𝑉𝑡ℎ − 𝑅𝑡ℎ 𝐼𝐵 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0

1.818 − 9.0909𝐼𝐵 − 0.7 − 𝛽𝐼𝐵 = 0
1.818−0.7
𝐼𝐵 = 9.0909+100 = 10.24𝜇𝐴

𝐼𝐶 = 𝛽𝐼𝐵 = 100 ⋅ 10.24 = 1.024𝑚𝐴

Now, using KVL in collector to emitter junction,

𝑉𝑐𝑐 − 𝐼𝐶 𝑅𝐶 − 𝑉𝐶𝐸 − 𝐼𝐸 𝑅𝐸 = 0
20 − 1.024 ⋅ 2 − 𝑉𝐶𝐸 − 1.024 = 0
𝑉𝐶𝐸 = 20 − 1.024 ⋅ 2 − 1.024 = 16.928𝑉

7. An NPN silicon transistor having a nominal β of 100 is to be used in a CE configuration with 𝑽𝑪𝑪 =
𝟏𝟓𝑽. The Q point is to be 𝑰𝑪 = 𝟒𝒎𝑨 and 𝑽𝑪𝑬 = 𝟏𝟐𝑽. Now design the circuit diagram.
Solution:
Given,
𝑉𝐶𝐶 = 15𝑉
𝐼𝐶 = 4𝑚𝐴
𝑉𝐶𝐸 = 12𝑉
𝛽 = 100
𝐶𝐼
𝐼𝐵 = 100 = 40𝜇𝐴
𝑉𝐶𝐶 15
While designing voltage divider bias, generally, 𝑉𝐸 = 10
= 10 = 1.5𝑉 is set.
Therefore,
𝑉𝐸 1.5
𝑅𝐸 = 𝐼𝐸
= 4
= 0.375𝐾Ω
𝑉𝐶𝐶 −𝑉𝐶𝐸 15−12
𝑅𝐶 = 𝐼𝐶
= 4
= 0.75𝐾Ω

𝑉𝐵 = 𝑉𝐵𝐸 + 𝑉𝐸 = 0.7 + 1.5 = 2.1𝑉

For the circuit to operate efficiently, it is assumed that the current through R1 and R2 should be
approximately equal to and much larger than the base current (at least 10:1). This fact and the voltage-
divider equation for the base voltage provide the two relationships necessary to determine the base
resistors. That is,
1
𝑅2 ≤ 10 𝛽𝑅𝐸
𝑅2
𝑉𝐵 = 𝑉
𝑅1 +𝑅2 𝐶𝐶
1 1
𝑅2 = 10 𝛽𝑅𝐸 = 10 ⋅ 100 ⋅ 0.375 = 3.75𝐾Ω
 3.75
2.1 = 15
𝑅1 +3.75
15
𝑅1 + 3.75 = 3.75 ⋅
2.1

𝑅1 = 26.785 − 3.75 = 23.035𝐾Ω

8. Draw the output waveform (assume silicon diode).

Solution:

Input signal is square wave voltage signal with +10V maximum and –10V minimum voltage.

In given circuit,
Diode is on for negative half cycle.
Using KVL in input and battery loop,
−𝑉𝑖𝑛 + 𝑉𝑐 − 𝑉𝐷 + 2 = 0
𝑉𝑐 = 𝑉𝑖𝑛 − 2 = 8𝑉

𝑉𝑜 = −2𝑉

When diode is on
 Now, for positive half cycle,

𝑉𝑜 − 𝑉𝑐 − 𝑉𝑖𝑛 = 0
𝑉𝑜 = 8 + 10 = 18𝑉

9. An L section filter with L = 2H and C = 40µF is used in the output of full wave single phase rectifier that
is fed from a 40-0-40V peak transformer. The load current is 0.2A. Calculate the ripple factor. Assume
that the rectifier diodes are ideal. Show the circuit diagram.
Solution:
Given,
L-section filter with 𝐿 = 2𝐻 and 𝐶 = 40𝜇𝐹
Output of transformer is 40-0-40V peak
Load current, 𝐼 = 0.2𝐴
For LC filter, ripple factor,
1 1 1
𝑟= = = = 0.01493
6√2𝜔 2 𝐿𝐶 6√2(2𝜋𝑓)2 𝐿𝐶 6√2(2 ⋅ 3.1415 ⋅ 50)2 ⋅ 2 ⋅ 40 ⋅ 10−6
10. Calculate output voltage and PIV rating of each diode for the circuit shown, with input signal Vin =
100Sinωt V.

Solution:
Given,
Vin is sinusoidal signal 𝑉𝑖𝑛 = 100𝑠𝑖𝑛𝜔𝑡𝑉
Let’s assume that D2 and D1 are in on state for positive and negative half-cycles respectively.
For positive half cycle,
𝑉𝑖𝑛 = 2𝑖 + (2 ∥ 4)𝑖 , Where i be the current following through the circuit
For negative half cycle,
𝑉𝑖𝑛 = 2𝑖 + (2 ∥ 4)𝑖 , Where i be the current following through the circuit

Since, total resistance in both cases are same i.e (𝑟𝑒𝑞 = 2 + (2 ∥ 4)𝐾Ω ) current will be same.
2∥4 1.333
Output voltage 𝑉𝑜 = 𝑉𝑖𝑛 = ⋅ 100𝑠𝑖𝑛𝜔𝑡 = 39.99𝑠𝑖𝑛𝜔𝑡
2+2∥4 2+1.333
11. Explain construction and working principle of JFET. Also draw drain and transfer characteristics of a
JFET.
Solution:
Construction
N-type Channel: The core of an nJFET is a narrow bar of N-type semiconductor material, usually silicon.
This forms the conductive channel between the source and drain terminals.
P-type Gates: Two regions of P-type semiconductor are diffused into the sides of the N-type channel.
These regions are called the gates and form P-N junctions with the channel.
Terminals:
Source: The terminal where charge carriers (electrons in this case) enter the channel.
Drain: The terminal where charge carriers leave the channel.
Gate: The terminal that controls the flow of current through the channel.

Working Principle
𝑉𝐺𝑆 = 0 𝑉 (Zero Gate Voltage):
When the gate voltage (𝑉𝐺𝑆 ) is set to 0 V, the depletion regions around the P-N junctions are still present
but have a minimal width.
These depletion regions offer some resistance to the flow of current, but the channel remains wide. This
allows a significant amount of current (drain current, 𝐼𝐷 ) to flow from the source to the drain, limited by
the inherent resistance of the channel and the applied drain-source voltage (𝑉𝐷𝑆 ). In this state, the nJFET
operates in the linear region. The drain current increases proportionally with the drain-source voltage.
𝑉𝐺𝑆 < 0 𝑉 (Negative Gate Voltage):
Applying a negative voltage (reverse bias) to the gate with respect to the source widens the depletion
regions around the P-N junctions. This widening constriction occurs because the negative voltage
attracts the majority charge carriers (electrons) in the N-type channel towards the gate, depleting them
from the region closest to the gate.
As the negative gate voltage increases:
The depletion regions become wider, further constricting the channel, and increasing the resistance
between source and drain. This results in a decrease in drain current (𝐼𝐷 ). Eventually, at a specific
negative voltage called the pinch-off voltage (𝑉𝑝 ), the depletion regions completely pinch off the
channel, leaving no room for current to flow.
Beyond this point, increasing the drain-source voltage (𝑉𝐷𝑆 ) has minimal effect on the drain current as
the channel is already completely pinched off. This region is called the saturation region.
When𝑉𝐺𝑆 = 0 𝑉 , the nJFET operates in the linear region with a high drain current. As 𝑉𝐺𝑆 becomes
increasingly negative, the drain current progressively decreases due to channel constriction until it
reaches zero at the pinch-off voltage, entering the saturation region.
12. Determine IDQ and VDSQ for the circuit given below. Given IDSS = 8mA, Vp = -8V.

Solution:
Given,
𝑉𝐷𝐷 = 16𝑉
𝑅𝐷 = 2𝐾Ω
𝑅𝑆 = 1𝐾Ω
𝑅𝐺 = 1𝑀Ω
𝑉𝑃 = −8𝑉
𝐼𝐷𝑆𝑆 = 8𝑚𝐴

Using KVL in gate to source loop,

𝐼𝐺 𝑅𝐺 − 𝑉𝐺𝑆 − 𝐼𝑆 𝑅𝑠 = 0

Since, 𝐼𝐺 = 0

𝑉𝐺𝑆 = −𝐼𝑆 𝑅𝑠

Since, 𝐼𝑆 = 𝐼𝐷

𝑉𝐺𝑆 = −𝐼𝐷 𝑅𝑠

𝑉𝐺𝑆 2
𝐼𝐷 = 𝐼𝐷𝑆𝑆 (1 − )
𝑉𝑃

−𝐼𝐷 𝑅𝑠 2
𝐼𝐷 = 𝐼𝐷𝑆𝑆 (1 − 𝑉𝑃
)
𝐼𝐷 𝑅𝑠 2
𝐼𝐷 = 𝐼𝐷𝑆𝑆 (1 + 𝑉𝑃
)

𝐼𝐷 2
𝐼𝐷 = 8 (1 − 8
)
 8𝐼𝐷 = (8 − 𝐼𝐷 )2
𝐼𝐷2 − 24𝐼𝐷 + 64 = 0

Solving above equation,

𝐼𝐷 = 3.0557 𝑚𝐴, 20.9443𝑚𝐴
Since 20.9443 mA is greater than 𝐼𝐷𝑆𝑆 = 8𝑚𝐴 , we choose 3.0557 mA.

Now, Using KVL in drain to source loop,

𝑉𝐷𝐷 − 𝐼𝐷 𝑅𝐷 − 𝑉𝐷𝑆 − 𝐼𝑆 𝑅𝑠 = 0
16 − 3.0557 × 2 − 𝑉𝐷𝑆 − 3.0557 = 0
𝑉𝐷𝑆 = 6.829𝑉

Therefore, 𝑉𝐷𝑆𝑄 = 6.829𝑉 and 𝐼𝐷𝑄 = 3.0557 𝑚𝐴

13. The transistor shown in figure below has the following h-parameter value 𝒉𝒊𝒆 = 𝟏𝑲𝛀, 𝒉𝒓𝒆 = 𝟐. 𝟓 ×
𝟏𝟎−𝟒 , 𝒉𝒇𝒆 = 𝟓𝟎, 𝒉𝒐𝒆 = 𝟐𝟓𝝁𝒔. Find:
I. Input impedance
II. Voltage gain
III. Current gain
IV. Output impedance

Solution:
Given,
ℎ𝑖𝑒 = 1𝐾Ω
ℎ𝑟𝑒 = 2.5 × 10−4
ℎ𝑓𝑒 = 50
ℎ𝑜𝑒 = 25𝜇𝑠
We know, for two port networks with h-parameter
𝑣𝑖 = ℎ𝑖𝑒 𝑖𝑖 + ℎ𝑟𝑒 𝑣𝑜
𝑖𝑜 = ℎ𝑓𝑒 𝑖𝑖 + ℎ𝑜𝑒 𝑣𝑜
𝑣𝑜 = −𝑖𝑜 𝑅𝐿 where 𝑅𝐿 = 10//4.7 = 3.197KΩ

ℎ𝑓𝑒 50
Current gain (𝐴𝑖 ) = = = 46.299
1+ℎ𝑜𝑒 𝑅𝐿 1+0.025⋅3.197

𝑣𝑖 ℎ𝑓𝑒 ℎ𝑟𝑒 𝑅𝐿 50⋅2.5⋅10−4 ⋅3.197

Input Impedance, 𝑍𝑖 = = ℎ𝑖𝑒 − =1− = 0.963𝐾Ω
𝑖𝑖 1+ℎ𝑜 𝑅𝐿 1+0.025⋅3.197

𝑍𝑖′ = 0.963 ||33||10 = 0.8557𝐾Ω

𝑣𝑜 −ℎ𝑓𝑒 𝑅𝐿 50⋅3.197
Voltage gain (𝐴𝑣 ) = =ℎ = 1+(1⋅0.025−50⋅2.5⋅10−4 )3.197 = 153.707
𝑣𝑖 𝑖𝑒 +(ℎ𝑖 ℎ𝑜 −ℎ𝑓 ℎ𝑟 )𝑅𝐿
𝑣𝑜 1 1
Output Impedance, 𝑍𝑜′ = = ℎ𝑓𝑒 ℎ𝑟𝑒 = 50⋅2.5⋅10−4
= 73.333𝐾Ω
𝑖𝑜 ℎ𝑜𝑒 −[ ] 0.025−( )
ℎ𝑖𝑒 +𝑅𝑠 1+0.1

𝑍𝑜 = 𝑅𝐶 ||𝑍𝑜′ = 4.7||73.333 = 4.416𝐾Ω

 14. For the given CE amplifier, find the following using 𝑟𝑒 model
i. Input Impedance
ii. Output impedance
iii. Voltage gain (Assume β = 90, Vcc = +19V)

Solution:

𝑅1 = 56𝐾Ω
𝑅2 = 12𝐾Ω
𝑅𝐶 = 3.6𝐾Ω
𝑅𝐸 = 2𝐾Ω
𝑅𝑆 = 0.6𝐾Ω
𝑅𝐿 = 4𝐾Ω

To find 𝑟𝑒 , DC analysis should be done.

For DC analysis

1. All capacitors are open circuited.

1. All AC sources are grounded.

Now, to find Thevenin equivalent circuit

𝑅1 + 𝑅2 56 ⋅ 12
𝑅𝑡ℎ = = = 9.882𝐾Ω
𝑅1 ⋅ 𝑅2 56 + 12
𝑅2 ⋅ 𝑉𝑐𝑐 12 ⋅ 19
𝑉𝑡ℎ = = = 3.3529𝑉
𝑅1 ⋅ 𝑅2 56 + 12
Now, using KVL in base to emitter junction,
𝑉𝑡ℎ − 𝑅𝑡ℎ 𝐼𝐵 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0
9.882𝐼𝐸
3.3529 − − 0.7 − 𝐼𝐸 ⋅ 2 = 0
𝛽
3.3529−0.7
𝐼𝐸 = 9.882 = 1.257𝑚𝐴
2+
90

26𝑚𝑉
Therefore, 𝑟𝑒 = = 20.684Ω
1.257𝑚𝐴

−1
1 1 1
Input impedance, 𝑍𝑖 = 𝛽𝑟𝑒 ||56||12 = ( + + ) = 1.566𝐾Ω
56 12 0.09∗20.684

Output impedance, 𝑍𝑜 = 𝑅𝑐 = 3.6𝐾Ω

𝑉𝑙 𝑉𝑙 𝑉𝑖𝑛 𝑖𝑐 (𝑅𝐶 ||𝑅𝐿 ) 𝑍𝑖 3.6||4 1.566
Voltage gain 𝐴𝑣𝑠𝑙 = = ⋅ =− ⋅ = ⋅
𝑉𝑠 𝑉𝑖𝑛 𝑉𝑠 𝑖𝑏 𝛽𝑟𝑒 𝑍𝑖 +𝑅𝑠 0.020684 1.566+0.6

1.894 1.566
𝐴𝑣𝑠𝑙 = ⋅ = 66.203
0.020684 2.166
15. Darlington-pair amplifier is called super beta, why? Derive the necessary expression of its efficiency.

Solution:

The Darlington pair, is a configuration of two bipolar junction transistors (BJTs) connected in a specific
way to achieve several advantages, including:

High current gain (beta): This is the primary reason it's called "super beta." The overall current gain of
the Darlington pair is significantly higher than that of an individual transistor.

High input impedance: This makes the circuit more sensitive to input current.

In a Darlington pair, the collector current of the first transistor (Q1) acts as the base current for the
second transistor (Q2). Since the current gain of each transistor is greater than 1, the overall current
gain of the pair is the product of the individual gains.

Assuming a beta 𝛽1 for the first transistor and 𝛽2 for the second, the base current for the second
transistor is,

𝐼𝐵2 = 𝐼𝐸1 = (𝛽1 + 1)𝐼𝐵1

And the emitter current for the second transistor is

𝐼𝐸2 = (𝛽2 + 1)𝐼𝐵2 = (𝛽1 + 1)(𝛽2 + 1)𝐼𝐵1

Assuming 𝛽 ≫ 1 for each transistor, we find the net beta for the configuration is,

𝛽𝐷 = 𝛽1 𝛽2
This product can be significantly larger than the β of a single transistor, making the Darlington pair a
"super beta" amplifier.

Efficiency of a Darlington Pair:

The efficiency of an amplifier refers to the ratio of the output power delivered to the load to the total
power supplied to the amplifier. Calculating the exact efficiency of a Darlington pair amplifier circuit
requires specific details about the circuit configuration, transistor characteristics, and operating
conditions. However, we can derive a general expression for the efficiency:
 η ≈ (Pout / Pin) * 100%

where:

η is the efficiency (as a percentage)

Pout is the output power delivered to the load

Pin is the total power supplied to the amplifier

Pout can be calculated using the following equation for a BJT amplifier in the saturation region:

𝑃𝑜𝑢𝑡 = 𝑉𝐶𝐶 ⋅ 𝐶𝑢𝑟𝑟𝑒𝑛𝑡 𝑑𝑟𝑎𝑤𝑛

where:

Vcc is the driving voltage

Current drawn depends on the operating point.

Pin can be estimated by considering the power supply voltage (Vcc) and the total current drawn by the
amplifier (Itotal). However, calculating the exact Itotal requires further analysis of the specific circuit
configuration and component values.

Therefore, providing a specific numerical value for the efficiency is not possible without further
information about the circuit. However, the provided expressions offer a general understanding of how
the efficiency of a Darlington pair amplifier can be determined.

16. Find the overall voltage gain of cascaded transistor amplifier as shown in the figure below. 𝑟𝑒1 =
𝑟𝑒2 = 25Ω and𝜷𝟏 = 𝜷𝟐 = 𝟏𝟎𝟎 𝜷𝟏 = 𝜷𝟐 = 𝟏𝟎𝟎.

Solution:

Given,

𝑟𝑒1 = 𝑟𝑒2 = 25Ω

𝛽1 = 𝛽2 = 100
𝑅1 = 5𝐾Ω
𝑅2 = 9𝐾Ω
𝑅𝐶1 = 𝑅𝐶2 = 3.3𝐾Ω
𝑅3 = 2𝐾Ω
𝑅4 = 11𝐾Ω
𝑅𝐸2 = 100Ω
𝑅𝐿 = 100Ω
𝑅𝑆 = 50Ω

Now, input impedance of first stage,

1 1 1 −1
𝑍𝑖1 = 5||9||𝛽𝑟𝑒1 =( + + ) = 1.406𝐾Ω
5 9 2.5
Output impedance of first stage,
−1
1 1 1 1
𝑍𝑜1 = 𝑅𝐶 ||2||11||𝛽(𝑟𝑒2 + 𝑅𝐸2 ) = ( + + + ) = 1.054𝐾Ω
3.6 2 11 0.1(100 + 25)
Input impedance of second stage,
−1
1 1 1
𝑍𝑖2 = 2||11||𝛽(𝑟𝑒2 + 𝑅𝐸2 ) = ( + + ) = 1.49𝐾Ω
2 11 0.1(25 + 100)
Output impedance of second stage,

𝑍𝑜2 = 𝑅𝐶 = 3.6

Overall voltage gain,

𝑉𝑙 𝑉𝑙 𝑉𝑜1 𝑉𝑖𝑛1
𝐴𝑣𝑠𝑙 = = ⋅ ⋅
𝑉𝑠 𝑉𝑖𝑛2 𝑉𝑖𝑛1 𝑉𝑠
𝑖𝑐2 (𝑅𝐶 ||𝑅𝐿 ) −𝑖𝑐1 𝑍𝑜1 𝑍𝑖1 3.6||0.1 1.054 1.406
𝐴𝑣𝑠𝑙 = − ⋅ = ⋅ ⋅
𝑖𝑏2 𝛽𝑟𝑒 + 𝑖𝑒2 𝑅𝐸 𝑖𝑏1 𝛽𝑟𝑒 𝑍𝑖1 + 𝑅𝑠 0.125 0.025 1.406 + 0.05
 0.0973 1.054 1.406
𝐴𝑣𝑠𝑙 = ⋅ ⋅ = 31.69
0.125 0.025 1.406 + 0.05

17. Explain the advantages and disadvantages of negative feedback. Negative feedback of 0.2% is applied
to an amplifier of gain 60 dB. Calculate the percentage change in the overall gain of the feedback
amplifier if the internal amplifier is subjected to gain reduction of 15%.

Solution:

Advantages of Negative Feedback Amplifiers

Increased Stability: Negative feedback reduces the overall gain of the amplifier, making it less sensitive
to variations in component values, temperature changes, and aging effects. This leads to a more stable
and predictable gain performance.

Reduced Distortion: Non-linarites in the amplifier circuit can cause distortion in the output signal.
Negative feedback helps to cancel out unwanted harmonics and higher-order products, resulting in a
cleaner and less distorted output signal.

Improved Bandwidth: In specific configurations, negative feedback can help to widen the bandwidth of
the amplifier, allowing it to amplify a wider range of frequencies.

Lower Output Impedance: Negative feedback can decrease the output impedance of the amplifier,
making it behave more like an ideal voltage source. This can be beneficial for driving loads that require
low impedance.

Disadvantages of Negative Feedback Amplifiers

Reduced Gain: As mentioned earlier, negative feedback decreases the overall gain of the amplifier. This
may require additional stages of amplification to achieve the desired output level.

Increased Design Complexity: Implementing negative feedback requires additional circuitry, making the
amplifier design slightly more complex compared to non-feedback designs.

Potential for Oscillation: Improper design and component selection with negative feedback can lead to
oscillations in the amplifier, resulting in unwanted output signals.

Given, Open loop gain in decibel 𝐴𝑑𝐵 = 60𝑑𝐵

20 log10 𝐴 = 60
log10 𝐴 = 3

𝐴 = 103 = 1000
𝑑𝐴
= 15% and 𝛽 = 0.2% = 0.002
𝐴

Now, the percentage change in the gain after negative feedback is given by,
𝑑𝐴𝑓 𝑑𝐴 1
= ⋅
𝐴𝑓 𝐴 1 + 𝐴𝛽
 𝑑𝐴𝑓 1
= 15% = 5%
𝐴𝑓 1 + 1000 ⋅ 0.002

Therefore, the % change in overall gain of feedback amplifier is 5%.

18. Calculate voltage gain, input, and output impedance with feedback for voltage series feedback having
𝑨 = 𝟑𝟎𝟎, 𝑹𝒊 = 𝟏. 𝟓𝑲𝛀, 𝑹𝟎 = 𝟓𝟎𝑲𝛀 𝒂𝒏𝒅 𝜷 = 𝟏/𝟏𝟓.
Solution:

Given,

𝐴 = 300
𝑅𝑖 = 1.5𝐾Ω
𝑅𝑜 = 50𝐾Ω
1
𝛽=
15
We know,
1 1
𝐺𝑎𝑖𝑛 𝑎𝑓𝑡𝑒𝑟 𝑓𝑒𝑒𝑑𝑏𝑎𝑐𝑘 (𝐴𝑓 ) = = = 0.0476
1 + 𝐴𝛽 1 + 300 ⋅ 1
15
1
𝐼𝑛𝑝𝑢𝑡 𝑖𝑚𝑝𝑒𝑑𝑒𝑛𝑐𝑒 𝑎𝑓𝑡𝑒𝑟 𝑓𝑒𝑒𝑑𝑏𝑎𝑐𝑘 (𝑅𝑖𝑓 ) = 𝑅𝑖 (1 + 𝐴𝛽) = 1.5 (1 + 300 ⋅ ) = 31.5𝐾Ω
15
𝑅𝑜 50
𝑂𝑢𝑡𝑝𝑢𝑡 𝑖𝑚𝑝𝑒𝑑𝑒𝑛𝑐𝑒 𝑎𝑓𝑡𝑒𝑟 𝑓𝑒𝑒𝑑𝑏𝑎𝑐𝑘 (𝑅𝑜𝑓 ) = = = 2.38𝐾Ω
(1 + 𝐴𝛽) 1
1 + 300 ⋅
15
19. Write the salient feature of operational amplifier. Design a summing operational amplifier circuit that
will produce an output voltage 𝑽𝒐𝒖𝒕 = −𝟒𝑽𝟏 − 𝑽𝟐 + 𝟎. 𝟏𝑽𝟑

Solution:

An operational amplifier, commonly known as an op-amp, is a fundamental building block in analog

electronic circuits. Let us explore its key features:

 High Gain: Op-amps exhibit high voltage amplification. They can significantly boost the input signal to
produce a larger output signal. This high gain makes them suitable for various applications.
 Differential Voltage Amplifier: An op-amp is a two-input, single-output differential voltage amplifier. It
takes two input signals (usually labeled as V1 and V2) and produces an amplified output based on their
difference.
 Input Impedance: Op-amps have extremely high input impedance. This means they draw minimal
current from the input sources, making them ideal for interfacing with sensors and other low-current
devices.
 Output Impedance: The output impedance of an op-amp is low, allowing it to drive loads (such as
resistors or capacitors) effectively without significant voltage drop.
 External Feedback Components: Op-amps are designed to work with external feedback components,
such as resistors and capacitors. These components determine the amplifier’s behavior and
functionality.
 Inverting and Non-Inverting Inputs: The inverting input (marked with a negative sign, “-”) processes the
input signal with inverted polarity. The non-inverting input (marked with a positive sign, “+”) processes
the input signal without inversion.

Given,

𝑉𝑜𝑢𝑡 = −4𝑉1 − 𝑉2 + 0.1𝑉3

𝑉𝑜𝑢𝑡 = −(4𝑉1 + 𝑉2 + 0.1(−𝑉3 ))

The standard form of summing op-amp circuit is,

𝑅𝑓 𝑅𝑓 𝑅𝑓
𝑉𝑜𝑢𝑡 = − ( 𝑉1 + 𝑉2 + 𝑉3 )
𝑅1 𝑅2 𝑅3
Let’s take 𝑅𝑓 = 10𝐾Ω

Now,
𝑅𝑓 10
𝑅1 = = = 2.5𝐾Ω
4 4
𝑅𝑓 10
𝑅2 = = = 10𝐾Ω
1 1
𝑅𝑓 10
𝑅3 = = = 100𝐾Ω
0.1 0.1
20. For the op-amp based Wein bridge oscillator if the component values are:
𝑹 = 𝟓. 𝟏𝒌𝛀, 𝑪 = 𝟏𝒏𝑭, 𝑹𝟐 = 𝟏𝟐𝑲𝛀 𝒂𝒏𝒅 𝑹𝟏 = 𝟓. 𝟏𝑲𝛀
i. Determine whether the circuit will oscillate or not.
ii. Obtain the output frequency.

Solution:

Given,

𝑅 = 5.1𝐾Ω, 𝐶 = 1𝑛𝐹, 𝑅2 = 12𝐾Ω 𝑎𝑛𝑑 𝑅1 = 5.1𝐾Ω

As we know, ideal condition for Wein bridge oscillator to oscillate
𝑅2
=2
𝑅1
𝑅2 12
From given parameters, = = 2.353 is suitable for practical purpose.
𝑅1 5.1

1 1
Oscillation frequency 𝑓 = 2𝜋𝑅𝐶 = 2⋅3.14⋅5.1⋅103 ⋅1⋅10−9 = 31.22𝐾𝐻𝑧