Decimal

 Decimal – The decimal numbering system has a base of 10 (MOD-10) and uses the digits
from 0 through 9 to represent a decimal number value.

 Binary – The binary numbering system has a base of 2 (MOD-2) and uses only two digits
a “0” and a “1” to represent a binary number value.
 Octal – The octal numbering system has a base of 8 (MOD-8) and uses 8 digits between 0
and 7 to represent an octal number value.
 Hexadecimal – The Hexadecimal numbering system has a base of 16 (MOD-16) and uses
a total of 16 numeric and alphabetic characters to represent a number value. Hexadecimal
numbers consist of digits 0 through 9 and letters A to F.
Long binary numbers are difficult to both read or write and are generally converted into a system
more easily understood or user friendly. The two most common derivatives based on binary
numbers are the Octal and the Hexadecimal numbering systems, with both of these limited in
length to a byte (8-bits) or a word (16-bits).
Octal numbers can be represented by groups of 3-bits and hexadecimal numbers by groups of 4-
bits together, with this grouping of the bits being used in electronic or computer systems in
displays or printouts. The grouping together of binary numbers can also be used to represent
Machine Code used for programming instructions and control such as an Assembly Language.
Comparisons between the various Decimal, Binary, Hexadecimal and Octal numbers are given
in the following table.
Comparison Table
Base, b Byte (8-bits) Word (16-bits)

0 0
Decimal to to
25510 65,53510
0000 0000 0000 0000 0000 0000
Binary to to
1111 11112 1111 1111 1111 11112
00 0000
Hexadecimal to to
FF16 FFFF16
000 000 000
Octal to to
3778 177 7778
We can see from the table above that the Hexadecimal numbering system uses only four digits to
express a single 16-bit word length, and as a result it is the most commonly used Base
Numbering System for digital, micro-electronic and computer systems.
Octal numbers therefore have a range of just “8” digits, (0, 1, 2, 3, 4, 5, 6, 7) making them a
Base-8 numbering system and therefore, q is equal to “8”.
Then the main characteristics of an Octal Numbering System is that there are only 8 distinct
counting digits from 0 to 7 with each digit having a weight or value of just 8 starting from the
least significant bit (LSB). In the earlier days of computing, octal numbers and the octal
numbering system was very popular for counting inputs and outputs because as it works in
counts of eight, inputs and outputs were in counts of eight, a byte at a time.
As the base of an Octal Numbers system is 8 (base-8), which also represents the number of
individual numbers used in the system, the subscript 8 is used to identify a number expressed in
octal. For example, an octal number is expressed as: 2378
Just like the hexadecimal system, the “octal number system” provides a convenient way of
converting large binary numbers into more compact and smaller groups. However, these days the
octal numbering system is used less frequently than the more popular hexadecimal numbering
system and has almost disappeared as a digital base number system.
Representation of an Octal Number
MSB Octal Number LSB
88 87 86 85 84 83 82 81 80
16M 2M 262k 32k 4k 512 64 8 1
As the octal number system uses only eight digits (0 through 7) there are no numbers or letters
used above 8, but the conversion from decimal to octal and binary to octal follows the same
pattern as we have seen previously for hexadecimal.
To count above 7 in octal we need to add another column and start over again in a similar way to
hexadecimal.
0, 1, 2, 3, 4, 5, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 20, 21….etc
Again do not get confused, 10 or 20 is NOT ten or twenty it is 1 + 0 and 2 + 0 in octal exactly
the same as for hexadecimal. The relationship between binary and octal numbers is given below.
Octal Numbers
Decimal Number 3-bit Binary Number Octal Number
0 000 0
1 001 1
2 010 2
3 011 3
4 100 4
5 101 5
6 110 6
7 111 7
8 001 000 10 (1+0)
9 001 001 11 (1+1)
Continuing upwards in groups of three
Then we can see that 1 octal number or digit is equivalent to 3 bits, and with two octal number,
778 we can count up to 63 in decimal, with three octal numbers, 7778 up to 511 in decimal and
with four octal numbers, 77778 up to 4095 in decimal and so on.
Octal Numbers Example No1
Using our previous binary number of 11010101110011112 convert this binary number to its octal
equivalent, (base-2 to base-8).
Binary Digit Value 001101010111001111
Group the bits into three´s starting

001 101 010 111 001 111
from the right hand side
Octal Number form 1 5 2 7 1 78
Thus, 0011010101110011112 in its Binary form is equivalent to 1527178 in Octal form or 54,735
in denary.
Octal Numbers Example No2
Convert the octal number 23228 to its decimal number equivalent, (base-8 to base-10).
Octal Digit Value 23228
In polynomial form = ( 2×83 ) + ( 3×82 ) + ( 2×81 ) + ( 2×80 )
Add the results = ( 1024 ) + ( 192 ) + ( 16 ) + ( 2 )
Decimal number form equals: 123410
Then, converting octal to decimal shows that 23228 in its Octal form is equivalent to 123410 in
its Decimal form.
While Octal is another type of digital numbering system, it is little used these days instead the
more commonly used Hexadecimal Numbering System is used as it is more flexible.
One common way of overcoming this problem is to arrange the binary numbers into groups or
sets of four bits (4-bits). These groups of 4-bits uses another type of numbering system also
commonly used in computer and digital systems called Hexadecimal Numbers.
Hexadecimal Number String
The “Hexadecimal” or simply “Hex” numbering system uses the Base of 16 system and are a
popular choice for representing long binary values because their format is quite compact and
much easier to understand compared to the long binary strings of 1’s and 0’s.
Being a Base-16 system, the hexadecimal numbering system therefore uses 16 (sixteen) different
digits with a combination of numbers from 0 through to 15. In other words, there are 16 possible
digit symbols.
However, there is a potential problem with using this method of digit notation caused by the fact
that the decimal numerals of 10, 11, 12, 13, 14 and 15 are normally written using two adjacent
symbols. For example, if we write 10 in hexadecimal, do we mean the decimal number ten, or
the binary number of two (1 + 0). To get around this tricky problem hexadecimal numbers that
identify the values of ten, eleven, . . . , fifteen are replaced with capital letters of A, B, C, D, E
and F respectively.
Then in the Hexadecimal Numbering System we use the numbers from 0 to 9 and the capital
letters A to F to represent its Binary or Decimal number equivalent, starting with the least
significant digit at the right hand side.
As we have just said, binary strings can be quite long and difficult to read, but we can make life
easier by splitting these large binary numbers up into even groups to make them much easier to
write down and understand. For example, the following group of binary digits
1101 0101 1100 11112 are much easier to read and understand
than 11010101110011112 when they are all bunched up together.
In the everyday use of the decimal numbering system we use groups of three digits or 000’s from
the right hand side to make a very large number such as a million or trillion, easier for us to
understand and the same is also true in digital systems.
Hexadecimal Numbers is a more complex system than using just binary or decimal and is
mainly used when dealing with computers and memory address locations. By dividing a binary
number up into groups of 4 bits, each group or set of 4 digits can now have a possible value of
between “0000” (0) and “1111” ( 8+4+2+1 = 15 ) giving a total of 16 different number
combinations from 0 to 15. Don’t forget that “0” is also a valid digit.
We remember from our first tutorial about Binary Numbers that a 4-bit group of digits is called
a “nibble” and as 4-bits are also required to produce a hexadecimal number, a hex digit can also
be thought of as a nibble, or half-a-byte. Then two hexadecimal numbers are required to produce
one full byte ranging from 00 to FF.
Also, since 16 in the decimal system is the fourth power of 2 ( or 24 ), there is a direct
relationship between the numbers 2 and 16 so one hex digit has a value equal to four binary
digits so now q is equal to “16”.
Because of this relationship, four digits in a binary number can be represented with a single
hexadecimal digit. This makes conversion between binary and hexadecimal numbers very easy,
and hexadecimal can be used to write large binary numbers with much fewer digits.
The numbers 0 to 9 are still used as in the original decimal system, but the numbers from 10 to
15 are now represented by capital letters of the alphabet from A to F inclusive and the
relationship between decimal, binary and hexadecimal is given below.
Hexadecimal Numbers
Decimal Number 4-bit Binary Number Hexadecimal Number
0 0000 0
1 0001 1
2 0010 2
3 0011 3
4 0100 4
5 0101 5
6 0110 6
7 0111 7
8 1000 8
9 1001 9
10 1010 A
11 1011 B
12 1100 C
13 1101 D
14 1110 E
15 1111 F
16 0001 0000 10 (1+0)
17 0001 0001 11 (1+1)
Continuing upwards in groups of four
Using the original binary number from above 1101 0101 1100 11112 this can now be converted
into an equivalent hexadecimal number of D5CF which is much easier to read and understand
than a long row of 1’s and 0’s that we had before.
So by using hexadecimal notation, the numbers can be written with fewer digits and much less
likelihood of an error occurring. Similarly, converting hexadecimal based numbers back into
binary is simply the reverse operation.
Then the main characteristics of a Hexadecimal Numbering System is that there are 16 distinct
counting digits from 0 to F with each digit having a weight or value of 16 starting from the least
significant bit (LSB). In order to distinguish Hexadecimal numbers from Denary numbers, a
prefix of either a “#”, (Hash) or a “$” (Dollar sign) is used before the actual Hexadecimal
Number value, #D5CF or $D5CF.
As the base of a hexadecimal system is 16, which also represents the number of individual
symbols used in the system, the subscript 16 is used to identify a number expressed in
hexadecimal. For example, the previous hexadecimal number is expressed as: D5CF16
Counting using Hexadecimal Numbers
So we now know how to convert 4 binary digits into a hexadecimal number. But what if we had
more than 4 binary digits how would we count in hexadecimal beyond the final letter F. The
simple answer is to start over again with another set of 4 bits as follows.
0…to…9, A,B,C,D,E,F, 10…to…19, 1A, 1B, 1C, 1D, 1E, 1F, 20, 21….etc
Do not get confused, 10 or 20 is NOT ten or twenty it is 1 + 0 and 2 + 0 in hexadecimal. In fact

twenty does not even exist in hex. With two hexadecimal numbers we can count up to FF which
is equal to decimal 255. Likewise, to count higher than FF we would add a third hexadecimal
digit to the left so the first 3-bit hexadecimal number would be 10016, (25610) and the last would
be FFF16, (409510). The maximum 4-digit hexadecimal number is FFFF16 which is equal to 65,535
in decimal and so on.
Representation of a Hexadecimal Number
MSB Hexadecimal Number LSB
168 167 166 165 164 163 162 161 160
4.3G 2.6G 16M 1M 65k 4k 256 16 1
This adding of additional hexadecimal digits to convert both decimal and binary numbers into an
Hexadecimal Number is very easy if there are 4, 8, 12 or 16 binary digits to convert. But we
can also add zero’s to the left of the most significant bit, the MSB if the number of binary bits is
not a multiple of four.
For example, 110010110110012 is a fourteen bit binary number that is to large for just three
hexadecimal digits only, yet too small for a four hexadecimal number. The answer is to ADD
additional zero’s to the left most bit until we have a complete four bit binary number or multiples
thereof.
Adding of Additional 0’s to a Binary Number
Binary Number 0011 0010 1101 1001
Hexadecimal Number 3 2 D 9
The main advantage of a Hexadecimal Number is that it is very compact and by using a base of
16 means that the number of digits used to represent a given number is usually less than in binary
or decimal. Also, it is quick and easy to convert between hexadecimal numbers and binary.
Hexadecimal Numbers Example No1
Convert the following Binary number 1110 10102 into its Hexadecimal number equivalent.
Binary Number = 111010102
Group the bits into four’s starting from the right hand side
= 1110 1010
Find the Decimal equivalent of each individual group
= 14 10 (in decimal)
Convert to Hexadecimal using the table above
= E A (in Hex)
Then, the hexadecimal equivalent of the binary number
1110 10102 is #EA16
Hexadecimal Numbers Example No2
Convert the following Hexadecimal number #3FA716 into its Binary equivalent, and also into its
Decimal or Denary equivalent using subscripts to identify each numbering system.
#3FA716
= 0011 1111 1010 01112
= (8192 + 4096 + 2048 + 1024 + 512 + 256 + 128 + 32 + 4 + 2 + 1)
= 16,29510
Then, the Decimal number of 16,295 can be represented as:-
#3FA716 in Hexadecimal
or
0011 1111 1010 01112 in Binary.

Hexadecimal Numbers Summary
Then to summarise. The Hexadecimal, or Hex, numbering system is commonly used in

computer and digital systems to reduce large strings of binary numbers into a sets of four digits
for us to easily understand. The word “Hexadecimal” means sixteen because this type of digital
numbering system uses 16 different digits from 0-to-9, and A-to-F.
To convert binary numbers into hexadecimal numbers we must first divide the binary number up
into a 4-bit binary word which can have any value from 010 ( 00002 ) to 1510 ( 11112 )
representing the hexadecimal equivalent of 0 through to F.
In the next tutorial about Binary Logic we will look at converting strings of binary numbers into
another digital numbering system called Octal Numbers and vice versa.
But as well as having 10 digits ( 0 through 9 ), the decimal numbering system also has the
operations of addition ( + ), subtraction ( – ), multiplication ( × ) and division ( ÷ ).
In a decimal system each digit has a value ten times greater than its previous number and this
decimal numbering system uses a set of symbols, b, together with a base, q, to determine the
weight of each digit within a number. For example, the six in sixty has a lower weighting than
the six in six hundred. Then in a binary numbering system we need some way of converting
Decimal to Binary as well as back from Binary to Decimal.
Any numbering system can be summarised by the following relationship:
N = bi qi
where: N is a real positive number

b is the digit
q is the base value
and integer (i) can be positive, negative or zero
N = bn qn… b3 q3 + b2 q2 + b1 q1 + b0 q0 + b-1 q-1 + b-2 q-2… etc.
The Decimal Numbering System
In the decimal, base-10 (den) or denary numbering system, each integer number column has
values of units, tens, hundreds, thousands, etc as we move along the number from right to left.
Mathematically these values are written as 10 0, 101, 102, 103 etc. Then each position to the left of
the decimal point indicates an increased positive power of 10. Likewise, for fractional numbers
the weight of the number becomes more negative as we move from left to right, 10 -1, 10-2, 10-3
etc.
So we can see that the “decimal numbering system” has a base of 10 or modulo-10 (sometimes
called MOD-10) with the position of each digit in the decimal system indicating the magnitude
or weight of that digit as q is equal to “10” (0 through 9). For example, 20 (twenty) is the same
as saying 2 x 101 and therefore 400 (four hundred) is the same as saying 4 x 102.
The value of any decimal number will be equal to the sum of its digits multiplied by their
respective weights. For example: N = 616310 (Six Thousand One Hundred and Sixty Three) in a
decimal format is equal to:
6000 + 100 + 60 + 3 = 6163
or it can be written reflecting the weight of each digit as:
( 6×1000 ) + ( 1×100 ) + ( 6×10 ) + ( 3×1 ) = 6163
or it can be written in polynomial form as:
( 6×103 ) + ( 1×102 ) + ( 6×101 ) + ( 3×100 ) = 6163
Where in this decimal numbering system example, the left most digit is the most significant
digit, or MSD, and the right most digit is the least significant digit or LSD. In other words, the
digit 6 is the MSD since its left most position carries the most weight, and the number 3 is the
LSD as its right most position carries the least weight.
The Binary Numbering System
The Binary Numbering System is the most fundamental numbering system in all digital and
computer based systems and binary numbers follow the same set of rules as the decimal
numbering system. But unlike the decimal system which uses powers of ten, the binary
numbering system works on powers of two giving a binary to decimal conversion from base-2 to
base-10.
Digital logic and computer systems use just two values or states to represent a condition, a logic
level “1” or a logic level “0”, and each “0” and “1” is considered to be a single digit in a Base-of-
2 (bi) or “binary numbering system”.
In the binary numbering system, a binary number such as 101100101 is expressed with a string
of “1’s” and “0’s” with each digit along the string from right to left having a value twice that of
the previous digit. But as it is a binary digit it can only have a value of either “1” or “0”
therefore, q is equal to “2” (0 or 1) with its position indicating its weight within the string.
As the decimal number is a weighted number, converting from decimal to binary (base 10 to
base 2) will also produce a weighted binary number with the right-hand most bit being the Least
Significant Bit or LSB, and the left-hand most bit being the Most Significant Bit or MSB, and
we can represent this as:
Representation of a Binary Number
MSB Binary Digit LSB
28 27 26 25 24 23 22 21 20
256 128 64 32 16 8 4 2 1
We saw above that in the decimal number system, the weight of each digit to the left increases
by a factor of 10. In the binary number system, the weight of each digit increases by a factor
of 2 as shown. Then the first digit has a weight of 1 ( 20 ), the second digit has a weight of 2
( 21 ), the third a weight of 4 ( 22 ), the fourth a weight of 8 ( 23 ) and so on.
So for example, converting a Binary to Decimal number would be:
Decimal Digit Value 256 128 64 32 16 8 4 2 1
Binary Digit Value 1 0 1 1 0 0 1 0 1
By adding together ALL the decimal number values from right to left at the positions that are
represented by a “1” gives us: (256) + (64) + (32) + (4) + (1) = 35710 or three hundred and fifty
seven as a decimal number.
Then, we can convert binary to decimal by finding the decimal equivalent of the binary array of
digits 1011001012 and expanding the binary digits into a series with a base of 2 giving an
equivalent of 35710 in decimal or denary.
Repeated Division-by-2 Method
We have seen above how to convert binary to decimal numbers, but how do we convert a
decimal number into a binary number. An easy method of converting decimal to binary number
equivalents is to write down the decimal number and to continually divide-by-2 (two) to give a
result and a remainder of either a “1” or a “0” until the final result equals zero.
So for example. Convert the decimal number 29410 into its binary number equivalent.
Number 294 Dividing each decimal number by “2” as

shown will give a result plus a remainder.
divide by 2
result 147 remainder 0 (LSB)
divide by 2
result 73 remainder 1
divide by 2
divide by 2
divide by 2
divide by 2 If the decimal number being divided is

even then the result will be whole and the
result 4 remainder 1 remainder will be equal to “0”. If the
decimal number is odd then the result will
divide by 2 not divide completely and the remainder
will be a “1”.
The binary result is obtained by placing all
divide by 2 the remainders in order with the least
significant bit (LSB) being at the top and
result 1 remainder 0 the most significant bit (MSB) being at the
bottom.
divide by 2
result 0 remainder 1 (MSB)
This divide-by-2 decimal to binary conversion technique gives the decimal number 29410 an
equivalent of 1001001102 in binary, reading from right to left. This divide-by-2 method will also
work for conversion to other number bases.
Then we can see that the main characteristics of a Binary Numbering System is that each
“binary digit” or “bit” has a value of either “1” or “0” with each bit having a weight or value
double that of its previous bit starting from the lowest or least significant bit (LSB) and this is
called the “sum-of-weights” method.
So we can convert a decimal number into a binary number either by using the sum-of-weights
method or by using the repeated division-by-2 method, and convert binary to decimal by finding
its sum-of-weights.
Binary Number Names & Prefixes
Binary numbers can be added together and subtracted just like decimal numbers with the result
being combined into one of several size ranges depending upon the number of bits being used.
Binary numbers come in three basic forms – a bit, a byte and a word, where a bit is a single
binary digit, a byte is eight binary digits, and a word is 16 binary digits.
The classification of individual bits into larger groups are generally referred to by the following
more common names of:
Number of Binary Digits (bits) Common Name
1 Bit
4 Nibble
8 Byte
16 Word
32 Double Word
64 Quad Word
Also, when converting from Binary to Decimal or even from Decimal to Binary, we need to be
careful that we do not mix up the two sets of numbers. For example, if we write the digits 10 on
the page it could mean the number “ten” if we assume it to be a decimal number, or it could
equally be a “1” and a “0” together in binary, which is equal to the number two in the weighted
decimal format from above.
One way to overcome this problem when converting binary to decimal numbers and to identify
whether the digits or numbers being used are decimal or binary is to write a small number called
a “subscript” after the last digit to show the base of the number system being used.
So for example, if we were using a binary number string we would add the subscript “2” to
denote a base-2 number so the number would be written as 102. Likewise, if it was a standard
decimal number we would add the subscript “10” to denote a base-10 number so the number
would be written as 1010.
Today, as micro-controller or microprocessor systems become increasingly larger, the individual

binary digits (bits) are now grouped together into 8’s to form a single BYTE with most computer
hardware such as hard drives and memory modules commonly indicate their size in Megabytes
or even Gigabytes.
Number of Bytes Common Name
1,024 (210) kilobyte (kb)
1,048,576 (220) Megabyte (Mb)
1,073,741,824 (230) Gigabyte (Gb)
a very long number! (240) Terabyte (Tb)
Binary to Decimal Summary

 A “BIT” is the abbreviated term derived from BInary digiT
 A Binary system has only two states, Logic “0” and Logic “1” giving a base of 2
 A Decimal system uses 10 different digits, 0 to 9 giving it a base of 10
 A Binary number is a weighted number who’s weighted value increases from right to left
 The weight of a binary digit doubles from right to left
 A decimal number can be converted to a binary number by using the sum-of-weights method or
the repeated division-by-2 method
 When we convert numbers from binary to decimal, or decimal to binary, subscripts are used to
avoid errors
Converting binary to decimal (base-2 to base-10) or decimal to binary numbers (base10 to base-
2) can be done in a number of different ways as shown above. When converting decimal
numbers to binary numbers it is important to remember which is the least significant bit (LSB),
and which is the most significant bit (MSB).
In the next tutorial about Binary Logic we will look at converting binary numbers into
Hexadecimal Numbers and vice versa and show that binary numbers can be represented by
letters as well as numbers.
Generally, a logic “1” represents a higher voltage, such as 5 volts, which is commonly referred to
as a HIGH value, while a logic “0” represents a low voltage, such as 0 volts or ground, and is
commonly referred to as a LOW value. These two discrete voltage levels representing the digital
values of “1’s” (one’s) and “0’s” (zero’s) are commonly called: BInary digiTS, and in digital and
computational circuits and applications they are normally referred to as binary BITS.
Binary Bits of Zeros and Ones

Because there are only two valid Boolean values for representing either a logic “1” or a logic
“0”, makes the system of using Binary Numbers ideal for use in digital or electronic circuits
and systems.
The binary number system is a Base-2 numbering system which follows the same set of rules in
mathematics as the commonly used decimal or base-10 number system. So instead of powers of
ten, ( 10n ) for example: 1, 10, 100, 1000 etc, binary numbers use powers of two, ( 2n )
effectively doubling the value of each successive bit as it goes, for example: 1, 2, 4, 8, 16, 32 etc.
The voltages used to represent a digital circuit can be of any value, but generally in digital and
computer systems they are kept well below 10 volts. In digital systems theses voltages are called
“logic levels” and ideally one voltage level represents a “HIGH” state, while another different
and lower voltage level represents a “LOW” state. A binary number system uses both of these
two states.
Digital waveforms or signals consist of discrete or distinctive voltage levels that are changing
back and forth between these two “HIGH” and “LOW” states. But what makes a signal or
voltage “Digital” and how can we represent these “HIGH” and “LOW” voltage levels. Electronic
circuits and systems can be divided into two main categories.
 • Analogue Circuits – Analogue or Linear circuits amplify or respond to continuously varying

voltage levels that can alternate between a positive and negative value over a period of time.
 • Digital Circuits – Digital circuits produce or respond too two distinct positive or negative
voltage levels representing either a logic level “1” or a logic level “0”.
Analogue Voltage Output
A simple example of the differences between an analogue (or analog) circuit and a digital circuit
are shown below:
Analogue Voltage Output Representation

This is an analogue circuit. The output from the potentiometer varies as the wiper terminal is
rotated producing an infinite number of output voltage points between 0 volts and Vmax. The
output voltage can vary either slowly or rapidly from one value to the next so there is no sudden
or step change between two voltage levels thereby producing a continuously variable output
voltage. Examples of analogue signals include temperature, pressure, liquid levels and light
intensity.
Digital Voltage Output
In this digital circuit example, the potentiometer wiper has been replaced by a single rotary
switch which is connected in turn to each junction of the series resistor chain, forming a basic
potential divider network. As the switch is rotated from one position (or node) to the next the
output voltage, Vout changes quickly in discrete and distinctive voltage levels representing
multiples of 1.0 volts on each switching action or step, as shown in the output graph.
So for example, the output voltage will be 2 volts, 3 volts, 5 volts, etc. but NOT 2.5V, 3.1V or
4.6V. Finer output voltage levels could easily be produced by using a multi-positional switch and
increasing the number of resistive elements within the potential divider network, therefore
increasing the number of discrete switching steps.
Digital Voltage Output Representation

Then we can see that the major difference between an analogue signal or quantity and a digital
quantity is that an “Analogue” quantity is continuously changing over time while a “Digital”
quantity has discrete (step by step) values. “LOW” to “HIGH” or “HIGH” to “LOW”.
A good example of this would be a light dimmer in your house that varies the lights intensity
(brightness) up or down as it is rotated between fully-ON (maximum brightness) and fully-OFF,
producing an analogue output that varies continuously. While on the other hand, with a standard
wall mounted light switch, the light is either “ON” (HIGH) or it is “OFF” (LOW) when the
switch is operated. The result is that there is no in between producing a form of ON-OFF digital
output.
Some circuits combine both analogue and digital signals such as an analogue to digital converter
(ADC) or a digital to analogue converter (DAC). Either way, the digital input or output signal
represents a binary number value equivalent of an analogue signal.
Digital Logic Levels
In all electronic and computer circuits, only two logic levels are allowed to represent a single
state. These levels are referred to as a logic 1 or a logic 0, HIGH or LOW, True or False, ON or
OFF. Most logic systems use positive logic, in which case a logic “0” is represented by zero
volts and a logic “1” is represented by a higher voltage. For example, +5 volts for TTL logic as
shown.
Digital Value Representation
First State Second State

Logic “0” Logic “1”
LOW HIGH
FALSE TRUE
Low Level Voltage Output High Level Voltage Output
0V or Ground +5 Volts
Generally the switching from one voltage level, “0” to “1” or “1” to “0” is made as quickly as
possible to prevent miss switching of the logic circuit. In standard TTL (transistor-transistor-
logic) IC’s there is a pre-defined range of input and output voltage limits for defining what
exactly is a logic “1” value and what is a logic “0” value as shown below.
TTL Input & Output Voltage Levels

Then, when using a +5 volt supply any voltage input between 2.0v and 5v is recognised as a
logic “1” value and any voltage input of below 0.8v is recognised as a logic “0” value. While the
output of a logic gate between 2.7v and 5v represents a logic “1” value and a voltage output
below 0.4v represents a logic “0” value. This is called “positive logic” and is used in these digital
logic tutorials.
Then binary numbers are commonly used in digital and computer circuits and are represented by
either a logic “0” or a logic “1”. Binary numbering systems are best suited to the digital signal
coding of binary, as it uses only two digits, one and zero, to form different figures. So in this
section about binary numbers we will look at how to convert decimal or base-10 numbers into
octal numbers, hexadecimal numbers, and binary numbers.
So in the next tutorial about Binary Numbers and the binary number system we will look at
converting decimal numbers into binary numbers and vice versa and introduce the concept of the
Byte and the Word to represent the parts of a much larger binary number.
Boolean Algebra is the mathematics we use to analyse digital gates and circuits. We can use
these “Laws of Boolean” to both reduce and simplify a complex Boolean expression in an
attempt to reduce the number of logic gates required. Boolean Algebra is therefore a system of
mathematics based on logic that has its own set of rules or laws which are used to define and
reduce Boolean expressions.
The variables used in Boolean Algebra only have one of two possible values, a logic “0” and a
logic “1” but an expression can have an infinite number of variables all labelled individually to
represent inputs to the expression, For example, variables A, B, C etc, giving us a logical
expression of A + B = C, but each variable can ONLY be a 0 or a 1.
Examples of these individual laws of Boolean, rules and theorems for Boolean Algebra are given
Truth Tables for the Laws of Boolean
Boolean Equivalent Boolean Algebra

Description
Expression Switching Circuit Law or Rule
A in parallel with
A+1=1 Annulment
closed = "CLOSED"
A in parallel with
A+0=A Identity
open = "A"
A in series with
A.1=A Identity
closed = "A"
A in series with
A.0=0 Annulment
open = "OPEN"
A in parallel with
A+A=A Idempotent
A = "A"
A in series with
A.A=A Idempotent
A = "A"
NOT NOT A
NOT A = A Double Negation
(double negative) = "A"
A in parallel with
A+A=1 Complement
NOT A = "CLOSED"
A in series with
A.A=0 Complement
NOT A = "OPEN"
A in parallel with B=
A+B = B+A Commutative
B in parallel with A
A in series with B=
A.B = B.A Commutative
B in series with A
invert and replace OR with

A+B = A.B de Morgan’s Theorem
AND
invert and replace AND with

A.B = A+B de Morgan’s Theorem
OR
The basic Laws of Boolean Algebra that relate to the Commutative Law allowing a change in
position for addition and multiplication, the Associative Law allowing the removal of brackets
for addition and multiplication, as well as the Distributive Law allowing the factoring of an
expression, are the same as in ordinary algebra.
Each of the Boolean Laws above are given with just a single or two variables, but the number of
variables defined by a single law is not limited to this as there can be an infinite number of
variables as inputs too the expression. These Boolean laws detailed above can be used to prove
any given Boolean expression as well as for simplifying complicated digital circuits.
A brief description of the various Laws of Boolean are given below with A representing a
variable input.
Description of the Laws of Boolean Algebra

 Annulment Law – A term ANDéd with a “0” equals 0 or ORéd with a “1” will equal 1.

o A . 0 = 0 A variable AND’ed with 0 is always equal to 0.
o A + 1 = 1 A variable OR’ed with 1 is always equal to 1.
 Identity Law – A term ORéd with a “0” or ANDéd with a “1” will always equal that term.
o A + 0 = A A variable OR’ed with 0 is always equal to the variable.
o A . 1 = A A variable AND’ed with 1 is always equal to the variable.
 Idempotent Law – An input that is ANDéd or ORéd with itself is equal to that input.
o A + A = A A variable OR’ed with itself is always equal to the variable.
o A . A = A A variable AND’ed with itself is always equal to the variable.
 Complement Law – A term ANDéd with its complement equals “0” and a term ORéd with its
complement equals “1”.
o A . A = 0 A variable AND’ed with its complement is always equal to 0.
o A + A = 1 A variable OR’ed with its complement is always equal to 1.

 Commutative Law – The order of application of two separate terms is not important.
o A . B = B . A The order in which two variables are AND’ed makes no difference.
o A + B = B + A The order in which two variables are OR’ed makes no difference.
 Double Negation Law – A term that is inverted twice is equal to the original term.
o A =A A double complement of a variable is always equal to the variable.
 de Morgan´s Theorem – There are two “de Morgan´s” rules or theorems,
 (1) Two separate terms NORéd together is the same as the two terms inverted (Complement)
and ANDéd for example, A+B = A. B.
 (2) Two separate terms NANDéd together is the same as the two terms inverted (Complement)
and ORéd for example, A.B = A +B.
Other algebraic Laws of Boolean not detailed above include:
 Distributive Law – This law permits the multiplying or factoring out of an expression.

o A(B + C) = A.B + A.C (OR Distributive Law)
o A + (B.C) = (A + B).(A + C) (AND Distributive Law)
 Absorptive Law – This law enables a reduction in a complicated expression to a simpler one by
absorbing like terms.
o A + (A.B) = A (OR Absorption Law)

o A(A + B) = A (AND Absorption Law)
 Associative Law – This law allows the removal of brackets from an expression and regrouping of
the variables.
o A + (B + C) = (A + B) + C = A + B + C (OR Associate Law)
o A(B.C) = (A.B)C = A . B . C (AND Associate Law)
Boolean Algebra Functions
Using the information above, simple 2-input AND, OR and NOT Gates can be represented by 16
possible functions as shown in the following table.
Function Description Expression
1. NULL 0
2. IDENTITY 1
3. Input A A
4. Input B B
5. NOT A A
6. NOT B B
7. A AND B (AND) A.B
8. A AND NOT B A.B
9. NOT A AND B A.B
10. NOT A AND NOT B (NAND) A.B
11. A OR B (OR) A+B
12. A OR NOT B A+B
13. NOT A OR B A+B
14. NOT OR (NOR) A+B

15. Exclusive-OR A.B + A.B
16. Exclusive-NOR A.B + A.B
Laws of Boolean Algebra Example No1
Using the above laws, simplify the following expression: (A + B)(A + C)
Q= (A + B).(A + C)
A.A + A.C + A.B + B.C – Distributive law
A + A.C + A.B + B.C – Idempotent AND law (A.A = A)
A(1 + C) + A.B + B.C – Distributive law
A.1 + A.B + B.C – Identity OR law (1 + C = 1)
A(1 + B) + B.C – Distributive law
A.1 + B.C – Identity OR law (1 + B = 1)
Q= A + (B.C) – Identity AND law (A.1 = A)
Then the expression: (A + B)(A + C) can be simplified to A + (B.C) as in the Distributive law.
Logic NOR Function
Like the previous NAND Gate, the NOR or “Not OR” Gate is also a combination of two separate
functions connected together to form a single logic gate function. The OR function and the NOT
function are connected together in series with its operation given by the Boolean expression as,
A+B
The Logic NOR Function only produces and output when “ALL” of its inputs are not present
and in Boolean Algebra terms the output will be TRUE only when all of its inputs are FALSE.
Switch Representation of the NOR Function
The truth table for the NOR function is the opposite of that for the previous OR function because
the NOR gate performs the reverse operation of the OR gate. Then we can see that the NOR gate
is the complement of the OR gate.
NOR Function Truth Table
Switch A Switch B Output Description

0 0 1 Both A and B are open, lamp ON
0 1 0 A is open and B is closed, lamp OFF
1 0 0 A is closed and B is open, lamp OFF
1 1 0 A is closed and B is closed, lamp OFF
Boolean Expression (A OR B) A+B
The NOR Function is sometimes known as the Pierce Function and is denoted by a downwards
arrow operator as shown, A NOR B = A↓B.
Logic NOR gates are available as standard i.c. packages such as the TTL 74LS02 Quadruple 2-
input NOR Gate, the TTL 74LS27 Triple 3-input NOR Gate or the 74LS260 Dual 5-input NOR
Gate.
Logic NAND Function
The NAND or “Not AND” function is a combination of the two separate logical functions, the
AND function and the NOT function connected together in series. The logic NAND function can
be expressed by the Boolean expression of, A.B
The Logic NAND Function only produces an output when “ANY” of its inputs are not present
and in Boolean Algebra terms the output will be TRUE only when any of its inputs are FALSE.
Switch Representation of the NAND Function
The truth table for the NAND function is the opposite of that for the previous AND function
because the NAND gate performs the reverse operation of the AND gate. In other words, the
NAND gate is the complement of the basic AND gate.
NAND Function Truth Table

0 0 1 A and B are both open, lamp ON
0 1 1 A is open and B is closed, lamp ON
1 0 1 A is closed and B is open, lamp ON
1 1 0 A is closed and B is closed, lamp OFF
Boolean Expression (A AND B) A.B
The NAND Function is sometimes known as the Sheffer Stroke Function and is denoted by a
vertical bar or upwards arrow operator, for example, A NAND B = A|B or A↑B.
Logic NAND gates are used as the basic “building blocks” to construct other logic gate functions
and are available in standard i.c. packages such as the very common TTL 74LS00 Quadruple 2-
input NAND Gates, the TTL 74LS10 Triple 3-input NAND Gates or the 74LS20 Dual 4-input
NAND Gates. There is even a single chip 74LS30 8-input NAND Gate.
Logic NOT Function
The Logic NOT Function is simply a single input inverter that changes the input of a logic level
“1” to an output of logic level “0” and vice versa. The logic NOT function is so called because
its output state is NOT the same as its input state.
The “logical NOT function” is generally denoted by a bar or overline ( ¯ ) over its input symbol
which denotes the inversion operation, (hence its name as an inverter). As NOT gates perform
the logic INVERT or COMPLEMENTATION function they are more commonly known as
Inverters because they invert the signal. In logic circuits this negation can be represented by a
normally closed switch.
Switch Representation of the NOT Function
If A means that the switch is closed, then NOT A or simply A says that the switch is NOT closed
or in other words, it is open. The logic NOT function has a single input and a single output as
shown.
NOT Function Truth Table
Switch Output
1 0
0 1
Boolean Expression not-A or A
The inversion indicator for a logic NOT function is a “bubble”, ( O ) symbol on the output (or
input) of the logic elements symbol. In Boolean algebra the inverting Logic NOT Function
follows the Complementation Law producing inversion.
Logic NOT gates or “Inverters” as they are more commonly called, can be connected with
standard AND and OR gates to produce NAND and NOR gates respectively. Inverters can also
be used to produce “Complementary” signals in more complex decoder/logic circuits for
example, the complement of logic A is A and two Inverters connected together in series will give
a double inversion which produces at its output the original value of A.
When designing logic circuits and you may only need one or two inverters within your design,
but do not have the space or the money for a dedicated Inverter chip such as the 74LS04. Then
you can easily make a logic NOT function easily by using any spare NAND or NOR gates by
simply connecting their inputs together as shown below.
NOT Function Equivalents

Logic OR Function
The Logic OR Function function states that an output action will occur or become TRUE if
either one “OR” more events are TRUE, but the order at which they occur is unimportant as it
does not affect the final result. For example, A + B = B + A. In Boolean algebra the Logic OR
Function follows the Commutative Law the same as for the logic AND function, allowing a
change in position of either variable.
The OR function is sometimes called by its full name of “Inclusive OR” in contrast to the
Exclusive-OR function we will look at later in tutorial six.
The logic or Boolean expression given for a logic OR gate is that for Logical Addition which is
denoted by a plus sign, (+). Thus a 2-input (A B) Logic OR Gate has an output term represented
by the Boolean expression of: A+B = Q.
Switch Representation of the OR Function
Here the two switches A and B are connected in parallel and either Switch A OR Switch B can
be closed in order to put the lamp on. In other words, either switch can be closed, or at logic “1”
for the lamp to be “ON”.
Then this type of logic gate only produces and output when “ANY” of its inputs are present and
in Boolean Algebra terms the output will be TRUE when any of its inputs are TRUE. In
electrical terms, the logic OR function is equal to a parallel circuit.
Again as with the AND function there are two switches, each with two possible positions open or
closed so therefore there will be 4 different ways of arranging the switches.
OR Function Truth Table

0 0 0 A and B are both open, lamp OFF
0 1 1 A is open and B is closed, lamp ON
1 0 1 A is closed and B is open, lamp ON
1 1 1 A is closed and B is closed, lamp ON
Boolean Expression (A OR B) A+B
Logic OR gates are available as standard i.c. packages such as the common TTL 74LS32
Quadruple 2-input Positive OR Gates. As with the previous AND Gate, OR can also be
“cascaded” together to produce circuits with more inputs such as in security alarm systems (Zone
A or Zone B or Zone C,etc).
Logic AND Function
Introduction To Boolean
In 1854, George Boole performed an investigation into the “laws of thought” which were based
around a simplified version of the “group” or “set” theory, and from this Boolean or “Switching”
algebra was developed. Boolean Algebra deals mainly with the theory that both logic and set
operations are either “TRUE” or “FALSE” but not both at the same time.
For example, A + A = A and not 2A as it would be in normal algebra. Boolean Algebra is a

simple and effective way of representing the switching action of standard Logic Gates and the
basic logic statements which concern us here are given by the logic gate operations of the AND,
the OR and the NOT gate functions.
The logic AND Function
The Logic AND Function function states that two or more events must occur together and at the
same time for an output action to occur. The order in which these actions occur is unimportant as
it does not affect the final result. For example, A & B = B & A. In Boolean algebra the Logic
AND Function follows the Commutative Law which allows a change in position of either
variable.
The AND function is represented in electronics by the dot or full stop symbol ( . ) Thus a 2-input
(A B) AND Gate has an output term represented by the Boolean expression A.B or just AB.
Switch Representation of the AND Function
Here the two switches, A and B are connected together to form a series circuit. Therefore, in the
circuit above, both switch A AND switch B must be closed (Logic “1”) in order to put the lamp
on. In other words, both switches must be closed, or at logic “1” for the lamp to be “ON”.
Then this type of logic gate ( an AND Gate ) only produces an output when “ALL” of its inputs
are present. In Boolean Algebra terms the output will be TRUE only when all of its inputs are
TRUE. In electrical terms, the logic AND function is equal to a series circuit as shown above.
As there are only two Switches, each with two possible states “open” or “closed”. Defining a
Logic “0” as being when the switch is open and a Logic “1” when the switch is closed, there are
then four different ways or combinations of arranging the two switches together as shown.
AND Function Truth Table
0 0 0 A and B are both open, lamp OFF
0 1 0 A is open and B is closed, lamp OFF

1 0 0 A is closed and B is open, lamp OFF
1 1 1 A is closed and B is closed, lamp ON
Boolean Expression (A AND B) A.B
Logic AND gates are available as standard i.c. packages such as the common TTL 74LS08
Quadruple 2-input Positive AND Gates, (or the 4081 CMOS equivalent) the TTL 74LS11 Triple
3-input Positive AND Gates or the 74LS21 Dual 4-input Positive AND Gates. AND Gates can
also be “cascaded” together to produce circuits with more than just 4 inputs.
Laws of Boolean Algebra
As well as the logic symbols “0” and “1” being used to represent a digital input or output, we can
also use them as constants for a permanently “Open” or “Closed” circuit or contact respectively.
A set of rules or Laws of Boolean Algebra expressions have been invented to help reduce the
number of logic gates needed to perform a particular logic operation resulting in a list of
functions or theorems known commonly as the Laws of Boolean Algebra.
Boolean Algebra is the mathematics we use to analyse digital gates and circuits. We can use
these “Laws of Boolean” to both reduce and simplify a complex Boolean expression in an
attempt to reduce the number of logic gates required. Boolean Algebra is therefore a system of
mathematics based on logic that has its own set of rules or laws which are used to define and
reduce Boolean expressions.
The variables used in Boolean Algebra only have one of two possible values, a logic “0” and a
logic “1” but an expression can have an infinite number of variables all labelled individually to
represent inputs to the expression, For example, variables A, B, C etc, giving us a logical
expression of A + B = C, but each variable can ONLY be a 0 or a 1.
Examples of these individual laws of Boolean, rules and theorems for Boolean Algebra are given
Truth Tables for the Laws of Boolean
Boolean Equivalent Boolean Algebra

Description
Expression Switching Circuit Law or Rule
A in parallel with
A+1=1 Annulment
closed = "CLOSED"
A in parallel with
A+0=A Identity
open = "A"
A in series with
A.1=A Identity
closed = "A"
A in series with
A.0=0 Annulment
open = "OPEN"
A in parallel with
A+A=A Idempotent
A = "A"
A in series with
A.A=A Idempotent
A = "A"
NOT NOT A
NOT A = A Double Negation
(double negative) = "A"
A in parallel with
A+A=1 Complement
NOT A = "CLOSED"
A in series with
A.A=0 Complement
NOT A = "OPEN"
A in parallel with B=
A+B = B+A Commutative
B in parallel with A
A in series with B=
A.B = B.A Commutative
B in series with A
invert and replace OR with

A+B = A.B de Morgan’s Theorem
AND
invert and replace AND with

A.B = A+B de Morgan’s Theorem
OR
The basic Laws of Boolean Algebra that relate to the Commutative Law allowing a change in
position for addition and multiplication, the Associative Law allowing the removal of brackets
for addition and multiplication, as well as the Distributive Law allowing the factoring of an
expression, are the same as in ordinary algebra.
Each of the Boolean Laws above are given with just a single or two variables, but the number of
variables defined by a single law is not limited to this as there can be an infinite number of
variables as inputs too the expression. These Boolean laws detailed above can be used to prove
any given Boolean expression as well as for simplifying complicated digital circuits.
A brief description of the various Laws of Boolean are given below with A representing a
variable input.
Description of the Laws of Boolean Algebra

 Annulment Law – A term ANDéd with a “0” equals 0 or ORéd with a “1” will equal 1.

o A . 0 = 0 A variable AND’ed with 0 is always equal to 0.
o A + 1 = 1 A variable OR’ed with 1 is always equal to 1.
 Identity Law – A term ORéd with a “0” or ANDéd with a “1” will always equal that term.

o A + 0 = A A variable OR’ed with 0 is always equal to the variable.
o A . 1 = A A variable AND’ed with 1 is always equal to the variable.
 Idempotent Law – An input that is ANDéd or ORéd with itself is equal to that input.
o A + A = A A variable OR’ed with itself is always equal to the variable.
o A . A = A A variable AND’ed with itself is always equal to the variable.
 Complement Law – A term ANDéd with its complement equals “0” and a term ORéd with its
complement equals “1”.
o A . A = 0 A variable AND’ed with its complement is always equal to 0.
o A + A = 1 A variable OR’ed with its complement is always equal to 1.
 Commutative Law – The order of application of two separate terms is not important.
o A . B = B . A The order in which two variables are AND’ed makes no difference.
o A + B = B + A The order in which two variables are OR’ed makes no difference.
 Double Negation Law – A term that is inverted twice is equal to the original term.
o A =A A double complement of a variable is always equal to the variable.
 de Morgan´s Theorem – There are two “de Morgan´s” rules or theorems,

 (1) Two separate terms NORéd together is the same as the two terms inverted (Complement)
and ANDéd for example, A+B = A. B.
 (2) Two separate terms NANDéd together is the same as the two terms inverted (Complement)
and ORéd for example, A.B = A +B.
Other algebraic Laws of Boolean not detailed above include:
 Distributive Law – This law permits the multiplying or factoring out of an expression.

o A(B + C) = A.B + A.C (OR Distributive Law)
o A + (B.C) = (A + B).(A + C) (AND Distributive Law)
 Absorptive Law – This law enables a reduction in a complicated expression to a simpler one by
absorbing like terms.
o A + (A.B) = A (OR Absorption Law)
o A(A + B) = A (AND Absorption Law)
 Associative Law – This law allows the removal of brackets from an expression and regrouping of
the variables.
o A + (B + C) = (A + B) + C = A + B + C (OR Associate Law)
o A(B.C) = (A.B)C = A . B . C (AND Associate Law)
Boolean Algebra Functions
Using the information above, simple 2-input AND, OR and NOT Gates can be represented by 16
possible functions as shown in the following table.
Function Description Expression

1. NULL 0
2. IDENTITY 1
3. Input A A
4. Input B B
5. NOT A A
6. NOT B B
7. A AND B (AND) A.B
8. A AND NOT B A.B
9. NOT A AND B A.B
10. NOT A AND NOT B (NAND) A.B
11. A OR B (OR) A+B
12. A OR NOT B A+B
13. NOT A OR B A+B
14. NOT OR (NOR) A+B
15. Exclusive-OR A.B + A.B
16. Exclusive-NOR A.B + A.B
Laws of Boolean Algebra Example No1
Using the above laws, simplify the following expression: (A + B)(A + C)
Q= (A + B).(A + C)
A.A + A.C + A.B + B.C – Distributive law
A + A.C + A.B + B.C – Idempotent AND law (A.A = A)
A(1 + C) + A.B + B.C – Distributive law
A.1 + A.B + B.C – Identity OR law (1 + C = 1)

A(1 + B) + B.C – Distributive law
A.1 + B.C – Identity OR law (1 + B = 1)
Q= A + (B.C) – Identity AND law (A.1 = A)
Then the expression: (A + B)(A + C) can be simplified to A + (B.C) as in the Distributive law.
Boolean Algebra Truth Tables
As well as a standard Boolean Expression, the input and output information of any Logic Gate
or circuit can be plotted into a standard table to give a visual representation of the switching
function of the system. The table used to represent the boolean expression of a logic gate
function is commonly called a Truth Table. A logic gate truth table shows each possible input
combination to the gate or circuit with the resultant output depending upon the combination of
these input(s).
For example, consider a single 2-input logic circuit with input variables labelled as A and B.
There are “four” possible input combinations or 22 of “OFF” and “ON” for the two inputs.
However, when dealing with Boolean expressions and especially logic gate truth tables, we do
not general use “ON” or “OFF” but instead give them bit values which represent a logic level
“1” or a logic level “0” respectively.
Then the four possible combinations of A and B for a 2-input logic gate is given as:
 Input Combination 1. – “OFF” – “OFF” or ( 0, 0 )

 Input Combination 2. – “OFF” – “ON” or ( 0, 1 )
 Input Combination 3. – “ON” – “OFF” or ( 1, 0 )
 Input Combination 4. – “ON” – “ON” or ( 1, 1 )
Therefore, a 3-input logic circuit would have 8 possible input combinations or 2 3 and a 4-input
logic circuit would have 16 or 24, and so on as the number of inputs increases. Then a logic
circuit with “n” number of inputs would have 2n possible input combinations of both “OFF” and
“ON”.
So in order to keep things simple to understand, in this tutorial we will only deal with standard 2-
input type logic gates, but the principals are still the same for gates with more than two inputs.
Then the Truth tables for a 2-input AND Gate, a 2-input OR Gate and a single input NOT Gate
are given as:
2-input AND Gate
For a 2-input AND gate, the output Q is true if BOTH input A “AND” input B are both true,
giving the Boolean Expression of: ( Q = A and B ).
Symbol Truth Table
A B Q
0 0 0
0 1 0
1 0 0
1 1 1
Boolean Expression Q = A.B Read as A AND B gives Q
Note that the Boolean Expression for a two input AND gate can be written as: A.B or just simply
AB without the decimal point.
2-input OR (Inclusive OR) Gate
For a 2-input OR gate, the output Q is true if EITHER input A “OR” input B is true, giving the
Boolean Expression of: ( Q = A or B ).
Symbol Truth Table
A B Q
0 0 0
0 1 1
1 0 1
1 1 1
Boolean Expression Q = A+B Read as A OR B gives Q
NOT Gate
For a single input NOT gate, the output Q is ONLY true when the input is “NOT” true, the
output is the inverse or complement of the input giving the Boolean Expression of: ( Q = NOT
A ).
Symbol Truth Table
A Q
0 1
1 0
Boolean Expression Q = NOT A or A Read as inversion of A gives Q
The NAND and the NOR Gates are a combination of the AND and OR Gates with that of a NOT
Gate or inverter.
2-input NAND (Not AND) Gate
For a 2-input NAND gate, the output Q is true if BOTH input A and input B are NOT true,
giving the Boolean Expression of: ( Q = not(A and B) ).
Symbol Truth Table
A B Q
0 0 1
0 1 1
1 0 1
1 1 0
Boolean Expression Q = A .B Read as A AND B gives NOT-Q

2-input NOR (Not OR) Gate
For a 2-input NOR gate, the output Q is true if BOTH input A and input B are NOT true, giving
the Boolean Expression of: ( Q = not(A or B) ).
Symbol Truth Table
A B Q
0 0 1
0 1 0
1 0 0
1 1 0
Boolean Expression Q = A+B Read as A OR B gives NOT-Q
As well as the standard logic gates there are also two special types of logic gate function called
an Exclusive-OR Gate and an Exclusive-NOR Gate. The actions of both of these types of gates
can be made using the above standard gates however, as they are widely used functions, they are
now available in standard IC form and have been included here as reference.
2-input EX-OR (Exclusive OR) Gate
For a 2-input Ex-OR gate, the output Q is true if EITHER input A or if input B is true, but NOT
both giving the Boolean Expression of: ( Q = (A and NOT B) or (NOT A and B) ).
Symbol Truth Table
A B Q
0 0 0
0 1 1
1 0 1
1 1 0
Boolean Expression Q = A B
2-input EX-NOR (Exclusive NOR) Gate
For a 2-input Ex-NOR gate, the output Q is true if BOTH input A and input B are the same,
either true or false, giving the Boolean Expression of: ( Q = (A and B) or (NOT A and NOT B) ).
Symbol Truth Table
A B Q
0 0 1
0 1 0
1 0 0
1 1 1
Boolean Expression Q = A B
Summary of 2-input Logic Gates
The following Truth Table compares the logical functions of the 2-input logic gates above.
Inputs Truth Table Outputs For Each Gate
A B AND NAND OR NOR EX-OR EX-NOR
0 0 0 1 0 1 0 1
0 1 0 1 1 0 1 0
1 0 0 1 1 0 1 0
1 1 1 0 1 0 0 1
The following table gives a list of the common logic functions and their equivalent Boolean
notation.
Logic Function Boolean Notation
AND A.B
OR A+B
NOT A
NAND A .B
NOR A+B
EX-OR (A.B) + (A.B) or A B
EX-NOR (A.B) + or A B
2-input logic gate truth tables are given here as examples of the operation of each logic function,
but there are many more logic gates with 3, 4 even 8 individual inputs. The multiple input gates
are no different to the simple 2-input gates above, So a 4-input AND gate would still require
ALL 4-inputs to be present to produce the required output at Q and its larger truth table would
reflect that.
Boolean Algebra Examples
We have seen throughout this section that digital logic functions can be defined and displayed as
either a Boolean Algebra expression or as a logic gate truth table. So here are a few examples of
how we can use Boolean Algebra to simplify larger digital logic circuits.
Boolean Algebra Example No1
Construct a Truth Table for the logical functions at points C, D and Q in the following circuit
and identify a single logic gate that can be used to replace the whole circuit.
First observations tell us that the circuit consists of a 2-input NAND gate, a 2-input EX-OR gate
and finally a 2-input EX-NOR gate at the output. As there are only 2 inputs to the circuit labelled
A and B, there can only be 4 possible combinations of the input ( 2 2 ) and these are: 0-0, 0-1, 1-0
and finally 1-1. Plotting the logical functions from each gate in tabular form will give us the
following truth table for the whole of the logic circuit below.
Inputs Output at
A B C D Q
0 0 1 0 0
0 1 1 1 1
1 0 1 1 1
1 1 0 0 1
From the truth table above, column C represents the output function generated by the NAND
gate, while column D represents the output function from the Ex-OR gate. Both of these two
output expressions then become the input condition for the Ex-NOR gate at the output.
It can be seen from the truth table that an output at Q is present when any of the two inputs A or
B are at logic 1. The only truth table that satisfies this condition is that of an OR Gate. Therefore,
the whole of the above circuit can be replaced by just one single 2-input OR Gate.
Find the Boolean algebra expression for the following system.
The system consists of an AND Gate, a NOR Gate and finally an OR Gate. The expression for
the AND gate is A.B, and the expression for the NOR gate is A+B. Both these expressions are
also separate inputs to the OR gate which is defined as A+B. Thus the final output expression is
given as:
The output of the system is given as Q = (A.B) + (A+B), but the notation A+B is the same as the
De Morgan´s notation A.B, Then substituting A.B into the output expression gives us a final
output notation of Q = (A.B)+(A.B), which is the Boolean notation for an Exclusive-NOR Gate
as seen in the previous section.
Inputs Intermediates Output
B A A.B A+B Q
0 0 0 1 1
0 1 0 0 0
1 0 0 0 0
1 1 1 0 1
Then, the whole circuit above can be replaced by just one single Exclusive-NOR Gate and
indeed an Exclusive-NOR Gate is made up of these individual gate functions.
Find the Boolean algebra expression for the following system.

This system may look more complicated than the other two to analyse but again, the logic circuit
just consists of simple AND, OR and NOT gates connected together.
As with the previous Boolean examples, we can simplify the circuit by writing down the Boolean
notation for each logic gate function in turn in order to give us a final expression for the output at
Q.
The output from the 3-input AND gate is only at logic “1” when ALL the gates inputs are HIGH
at logic level “1” (A.B.C). The output from the lower OR gate is only a “1” when one or both
inputs B or C are at logic level “0”. The output from the 2-input AND gate is a “1” when input A
is a “1” and inputs B or C are at “0”. Then the output at Q is only a “1” when inputs A.B.C equal
“1” or A is equal to “1” and both inputs B or C equal “0”, A.(B+C).
By using “de Morgan’s theorem” inputs B and input C cancel out as to produce an output at Q
they can be either at logic “1” or at logic “0”. Then this just leaves input A as the only input
needed to give an output at Q as shown in the table below.
Inputs Intermediates Output
C B A A.B.C B C B+C A.(B+C) Q
0 0 0 0 1 1 1 0 0
0 0 1 0 1 1 1 1 1
0 1 0 0 0 1 1 0 0
0 1 1 0 0 1 1 1 1
1 0 0 0 1 0 1 0 0
1 0 1 0 1 0 1 1 1
1 1 0 0 0 0 0 0 0
1 1 1 1 0 0 0 0 1
Then we can see that the entire logic circuit above can be replaced by just one single input
labelled A thereby reducing a circuit of six individual logic gates to just one single piece of wire,
(or Buffer). This type of circuit analysis using Boolean Algebra can be very powerful and
quickly identify any unnecessary logic gates within a digital logic design thereby reducing the
number of gates required, the power consumption of the circuit and of course the cost.
Digital Logic Gates
Introduction to Digital Logic Gates
A Digital Logic Gate is an electronic device that makes logical decisions based on the different
combinations of digital signals present on its inputs. Digital logic gates may have more than one
input but generally only have one digital output. Individual logic gates can be connected together
to form combinational or sequential circuits, or larger logic gate functions.
Standard commercially available digital logic gates are available in two basic families or forms,
TTL which stands for Transistor-Transistor Logic such as the 7400 series, and CMOS which
stands for Complementary Metal-Oxide-Silicon which is the 4000 series of chips. This notation
of TTL or CMOS refers to the logic technology used to manufacture the integrated circuit, (IC)
or a “chip” as it is more commonly called.
Digital Logic Gate
Generally speaking, TTL logic IC’s use NPN and PNP type Bipolar Junction Transistors while
CMOS logic IC’s use complementary MOSFET or JFET type Field Effect Transistors for both
their input and output circuitry.
As well as TTL and CMOS technology, simple digital logic gates can also be made by
connecting together diodes, transistors and resistors to produce RTL, Resistor-Transistor logic
gates, DTL, Diode-Transistor logic gates or ECL, Emitter-Coupled logic gates but these are less
common now compared to the popular CMOS family.
Integrated Circuits or IC’s as they are more commonly called, can be grouped together into
families according to the number of transistors or “gates” that they contain. For example, a
simple AND gate my contain only a few individual transistors, were as a more complex
microprocessor may contain many thousands of individual transistor gates. Integrated circuits are
categorised according to the number of logic gates or the complexity of the circuits within a
single chip with the general classification for the number of individual gates given as:
Classification of Integrated Circuits

 Small Scale Integration or (SSI) – Contain up to 10 transistors or a few gates within a single
package such as AND, OR, NOT gates.
 Medium Scale Integration or (MSI) – between 10 and 100 transistors or tens of gates within a
single package and perform digital operations such as adders, decoders, counters, flip-flops and
multiplexers.
 Large Scale Integration or (LSI) – between 100 and 1,000 transistors or hundreds of gates and
perform specific digital operations such as I/O chips, memory, arithmetic and logic units.
 Very-Large Scale Integration or (VLSI) – between 1,000 and 10,000 transistors or thousands of
gates and perform computational operations such as processors, large memory arrays and
programmable logic devices.
 Super-Large Scale Integration or (SLSI) – between 10,000 and 100,000 transistors within a single
package and perform computational operations such as microprocessor chips, micro-controllers,
basic PICs and calculators.
 Ultra-Large Scale Integration or (ULSI) – more than 1 million transistors – the big boys that are
used in computers CPUs, GPUs, video processors, micro-controllers, FPGAs and complex PICs.
While the “ultra large scale” ULSI classification is less well used, another level of integration
which represents the complexity of the Integrated Circuit is known as the System-on-Chip or
(SOC) for short. Here the individual components such as the microprocessor, memory,
peripherals, I/O logic etc, are all produced on a single piece of silicon and which represents a
whole electronic system within one single chip, literally putting the word “integrated” into
integrated circuit.
These complete integrated chips which can contain up to 100 million individual silicon-CMOS
transistor gates within one single package are generally used in mobile phones, digital cameras,
micro-controllers, PIC’s and robotic type applications.
Moore’s Law
In 1965, Gordon Moore co-founder of the Intel corporation predicted that “The number of
transistors and resistors on a single chip will double every 18 months” regarding the
development of semiconductor gate technology. When Gordon Moore made his famous
comment way back in 1965 there were approximately only 60 individual transistor gates on a
single silicon chip or die.
The worlds first microprocessor in 1971 was the Intel 4004 that had a 4-bit data bus and
contained about 2,300 transistors on a single chip, operating at about 600kHz. Today, the Intel
Corporation have placed a staggering 1.2 Billion individual transistor gates onto its new Quad-
core i7-2700K Sandy Bridge 64-bit microprocessor chip operating at nearly 4GHz, and the on-
chip transistor count is still rising, as newer faster microprocessors and micro-controllers are
developed.
Digital Logic States
The Digital Logic Gate is the basic building block from which all digital electronic circuits and
microprocessor based systems are constructed from. Basic digital logic gates perform logical
operations of AND, OR and NOT on binary numbers.
In digital logic design only two voltage levels or states are allowed and these states are generally
referred to as Logic “1” and Logic “0”, High and Low, or True and False. These two states are
represented in Boolean Algebra and standard truth tables by the binary digits of “1” and “0”
respectively.
A good example of a digital state is a simple light switch as it is either “ON” or “OFF” but not
both at the same time. Then we can summarise the relationship between these various digital
states as being:
Boolean Algebra Boolean Logic Voltage State
Logic “1” True (T) High (H)
Logic “0” False (F) Low (L)

Most digital logic gates and digital logic systems use “Positive logic”, in which a logic level “0”
or “LOW” is represented by a zero voltage, 0v or ground and a logic level “1” or “HIGH” is
represented by a higher voltage such as +5 volts, with the switching from one voltage level to the
other, from either a logic level “0” to a “1” or a “1” to a “0” being made as quickly as possible to
prevent any faulty operation of the logic circuit.
There also exists a complementary “Negative Logic” system in which the values and the rules of
a logic “0” and a logic “1” are reversed but in this tutorial section about digital logic gates we
shall only refer to the positive logic convention as it is the most commonly used.
In standard TTL (transistor-transistor logic) IC’s there is a pre-defined voltage range for the
input and output voltage levels which define exactly what is a logic “1” level and what is a logic
“0” level and these are shown below.
TTL Input & Output Voltage Levels
There are a large variety of logic gate types in both the bipolar 7400 and the CMOS 4000
families of digital logic gates such as 74Lxx, 74LSxx, 74ALSxx, 74HCxx, 74HCTxx, 74ACTxx
etc, with each one having its own distinct advantages and disadvantages compared to the other.
The exact switching voltage required to produce either a logic “0” or a logic “1” depends upon
the specific logic group or family.
However, when using a standard +5 volt supply any TTL voltage input between 2.0v and 5v is
considered to be a logic “1” or “HIGH” while any voltage input below 0.8v is recognised as a
logic “0” or “LOW”. The voltage region in between these two voltage levels either as an input or
as an output is called the Indeterminate Region and operating within this region may cause the
logic gate to produce a false output.
The CMOS 4000 logic family uses different levels of voltages compared to the TTL types as
they are designed using field effect transistors, or FET’s. In CMOS technology a logic “1” level
operates between 3.0 and 18 volts and a logic “0” level is below 1.5 volts. Then the following
table shows the difference between the logic levels of traditional TTL and CMOS logic gates.
TTL and CMOS Logic Levels
Device Type Logic 0 Logic 1
TTL 0 to 0.8v 2.0 to 5v (VCC)
CMOS 0 to 1.5v 3.0 to 18v (VDD)
Then from the above observations, we can define the ideal TTL digital logic gate as one that has
a “LOW” level logic “0” of 0 volts (ground) and a “HIGH” level logic “1” of +5 volts and this
can be demonstrated as:
Ideal TTL Digital Logic Gate Voltage Levels
Where the opening or closing of the switch produces either a logic level “1” or a logic level “0”
with the resistor R being known as a “pull-up” resistor.
Digital Logic Noise
However, between these defined HIGH and LOW values lies what is generally called a “no-
man’s land” (the blue area’s above) and if we apply a signal voltage of a value within this no-
man’s land area we do not know whether the logic gate will respond to it as a level “0” or as a
level “1”, and the output will become unpredictable.
Noise is the name given to a random and unwanted voltage that is induced into electronic circuits
by external interference, such as from nearby switches, power supply fluctuations or from wires
and other conductors that pick-up stray electromagnetic radiation. Then in order for a logic gate
not to be influence by noise in must have a certain amount of noise margin or noise immunity.
Digital Logic Gate Noise Immunity
In the example above, the noise signal is superimposed onto the Vcc supply voltage and as long
as it stays above the minimum level (VON(min)) the input an corresponding output of the logic gate
are unaffected. But when the noise level becomes large enough and a noise spike causes the
HIGH voltage level to drop below this minimum level, the logic gate may interpret this spike as
a LOW level input and switch the output accordingly producing a false output switching. Then in
order for the logic gate not to be affected by noise it must be able to tolerate a certain amount of
unwanted noise on its input without changing the state of its output.
Simple Basic Digital Logic Gates
Simple digital logic gates can be made by combining transistors, diodes and resistors with a
simple example of a Diode-Resistor Logic (DRL) AND gate and a Diode-Transistor Logic
(DTL) NAND gate given below.
Diode-Resistor Circuit Diode-Transistor circuit

2-input AND Gate 2-input NAND Gate
The simple 2-input Diode-Resistor AND gate can be converted into a NAND gate by the
addition of a single transistor inverting (NOT) stage. Using discrete components such as diodes,
resistors and transistors to make digital logic gate circuits are not used in practical commercially
available logic IC’s as these circuits suffer from propagation delay or gate delay and also power
loss due to the pull-up resistors.
Another disadvantage of diode-resistor logic is that there is no “Fan-out” facility which is the
ability of a single output to drive many inputs of the next stages. Also this type of design does
not turn fully “OFF” as a Logic “0” produces an output voltage of 0.6v (diode voltage drop), so
the following TTL and CMOS circuit designs are used instead.
Basic TTL Logic Gates
The simple Diode-Resistor AND gate above uses separate diodes for its inputs, one for each
input. As a transistor is made up off two diode circuits connected together representing an NPN
or a PNP device, the input diodes of the DTL circuit can be replaced by one single NPN
transistor with multiple emitter inputs as shown.
2-input NAND Gate

As the NAND gate contains a single stage inverting NPN transistor circuit (TR2) an output logic
level “1” at Q is only present when both the emitters of TR1 are connected to logic level “0” or
ground allowing base current to pass through the PN junctions of the emitter and not the
collector. The multiple emitters of TR1 are connected as inputs thus producing a NAND gate
function.
In standard TTL logic gates, the transistors operate either completely in the “cut off” region, or
else completely in the saturated region, Transistor as a Switch type operation.
Emitter-Coupled Digital Logic Gate
Emitter Coupled Logic or ECL is another type of digital logic gate that uses bipolar transistor
logic where the transistors are not operated in the saturation region, as they are with the standard
TTL digital logic gate. Instead the input and output circuits are push-pull connected transistors
with the supply voltage negative with respect to ground.
This has the effect of increasing the speed of operation of the emitter coupled logic gates up to
the Gigahertz range compared with the standard TTL types, but noise has a greater effect in ECL
logic, because the unsaturated transistors operate within their active region and amplify as well
as switch signals.
The “74” Sub-families of Integrated Circuits
With improvements in the circuit design to take account of propagation delays, current
consumption, fan-in and fan-out requirements etc, this type of TTL bipolar transistor technology
forms the basis of the prefixed “74” family of digital logic IC’s, such as the “7400” Quad 2-input
AND gate, or the “7402” Quad 2-input OR gate, etc.
Sub-families of the 74xx series IC’s are available relating to the different technologies used to
fabricate the gates and they are denoted by the letters in between the 74 designation and the
device number. There are a number of TTL sub-families available that provide a wide range of
switching speeds and power consumption such as the 74L00 or 74ALS00 AND gate, were the
“L” stands for “Low-power TTL” and the “ALS” stands for “Advanced Low-power Schottky
TTL” and these are listed below.
 • 74xx or 74Nxx: Standard TTL – These devices are the original TTL family of logic gates
introduced in the early 70’s. They have a propagation delay of about 10ns and a power
consumption of about 10mW. Supply voltage range: 4.75 to 5.25v
 • 74Lxx: Low Power TTL – Power consumption was improved over standard types by increasing
the number of internal resistances but at the cost of a reduction in switching speed. Supply
voltage range: 4.75 to 5.25v
 • 74Hxx: High Speed TTL – Switching speed was improved by reducing the number of internal
resistances. This also increased the power consumption. Supply voltage range: 4.75 to 5.25v
 • 74Sxx: Schottky TTL – Schottky technology is used to improve input impedance, switching
speed and power consumption (2mW) compared to the 74Lxx and 74Hxx types. Supply voltage
range: 4.75 to 5.25v
 • 74LSxx: Low Power Schottky TTL – Same as 74Sxx types but with increased internal resistances
to improve power consumption. Supply voltage range: 4.75 to 5.25v
 • 74ASxx: Advanced Schottky TTL – Improved design over 74Sxx Schottky types optimised to
increase switching speed at the expense of power consumption of about 22mW. Supply voltage
range: 4.5 to 5.5v
 • 74ALSxx: Advanced Low Power Schottky TTL – Lower power consumption of about 1mW and
higher switching speed of 4nS compared to 74LSxx types. Supply voltage range: 4.5 to 5.5v
 • 74HCxx: High Speed CMOS – CMOS technology and transistors to reduce power consumption
of less than 1uA with CMOS compatible inputs. Supply voltage range: 4.5 to 5.5v
 • 74HCTxx: High Speed CMOS – CMOS technology and transistors to reduce power consumption
of less than 1uA but has increased propagation delay of about 16nS due to the TTL compatible
inputs. Supply voltage range: 4.5 to 5.5v
Basic CMOS Digital Logic Gate
One of the main disadvantages with the TTL digital logic gate series is that the logic gates are
based on bipolar transistor logic technology and as transistors are current operated devices, they
consume large amounts of power from a fixed +5 volt power supply.
Also, TTL bipolar transistor gates have a limited operating speed when switching from an “OFF”
state to an “ON” state and vice-versa called the “gate” or “propagation delay”. To overcome
these limitations complementary MOS called “CMOS” (Complementary Metal Oxide
Semiconductor) logic gates which use “Field Effect Transistors” or FET’s were developed.
As these gates use both P-channel and N-channel MOSFET’s as their input device, at quiescent
conditions with no switching, the power consumption of CMOS gates is almost zero, (1 to 2uA)
making them ideal for use in low-power battery circuits and with switching speeds upwards of
100MHz for use in high frequency timing and computer circuits.
2-input NAND Gate
This CMOS gate example contains 3 N-channel MOSFET’s, one for each input FET1 and FET2
and one for the output FET3. When both the inputs A and B are at logic level “0”, FET1 and FET2
are both switched “OFF” giving an output logic “1” from the source of FET3.
When one or both of the inputs are at logic level “1” current flows through the corresponding
FET giving an output state at Q equivalent to logic “0”, thus producing a NAND gate function.
Improvements in the circuit design with regards to switching speed, low power consumption and
improved propagation delays has resulted in the standard CMOS 4000 “CD” family of logic IC’s
being developed that complement the TTL range.
As with the standard TTL digital logic gates, all the major digital logic gates and devices are
available in the CMOS package such as the CD4011, a Quad 2-input NAND gate, or the
CD4001, a Quad 2-input NOR gate along with all their sub-families.
Like TTL logic, complementary MOS (CMOS) circuits take advantage of the fact that both N-
channel and P-channel devices can be fabricated together on the same substrate material to form
various logic functions.
One of the main disadvantage with the CMOS range of IC’s compared to their equivalent TTL
types is that they are easily damaged by static electricity. Also unlike TTL logic gates that
operate on single +5V voltages for both their input and output levels, CMOS digital logic gates
operate on a single supply voltage of between +3 and +18 volts.
Common CMOS Sub-families include:
 • 4000B Series: Standard CMOS – These devices are the original Buffered CMOS family of logic
gates introduced in the early 70’s and operate from a supply voltage of 3.0 to 18v d.c.
 • 74C Series: 5v CMOS – These devices are pin-compatible with standard 5v TTL devices as their
logic switching is implemented in CMOS but with TTL-compatible inputs. They operate from a
supply voltage of 3.0 to 18v d.c.
Note that CMOS logic gates and devices are static sensitive, so always take the appropriate
precautions of working on antistatic mats or grounded workbenches, wearing an antistatic
wristband and not removing a part from its antistatic packaging until required.
In the next tutorial about Digital Logic Gates, we will look at the digital Logic AND Gate
function as used in both TTL and CMOS logic circuits as well as its Boolean Algebra definition
and truth tables.
Digital Logic Gates Summary
In this section about Digital Logic Gates, we have seen that there are three main basic types of
digital logic gate, the AND Gate, the OR Gate and the NOT Gate. We have also seen that each
gate has an opposite or complementary form of itself in the form of the NAND Gate, the NOR
Gate and the Buffer respectively, and that any of these individual gates can be connected
together to form more complex Combinational Logic circuits.
We have also seen, that in digital electronics both the NAND gate and the NOR gate can both be
classed as “Universal” gates as they can be used to construct any other gate type. In fact, any
combinational circuit can be constructed using only two or three input NAND or NOR gates. We
also saw that NOT gates and Buffers are single input devices that can also have a Tri-state
High-impedance output which can be used to control the flow of data onto a common data bus
wire.
Digital Logic Gates can be made from discrete components such as Resistors, Transistors and
Diodes to form RTL (resistor-transistor logic) or DTL (diode-transistor logic) circuits, but
today’s modern digital 74xxx series integrated circuits are manufactured using TTL (transistor-
transistor logic) based on NPN bipolar transistor technology or the much faster and low power
CMOS based MOSFET transistor logic used in the 74Cxxx, 74HCxxx, 74ACxxx and the 4000
series logic chips.
The eight most “standard” individual Digital Logic Gates are summarised below along with
their corresponding truth tables.
Standard Logic Gates
The Logic AND Gate
Symbol Truth Table
B A Q
0 0 0
0 1 0
2-input AND Digital Logic Gate 1 0 0
1 1 1
The Logic OR Gate
Symbol Truth Table
B A Q
0 0 0
0 1 1
1 0 1
1 1 1
Boolean Expression Q = A + B Read as A OR B gives Q
Inverting Logic Gates
The Logic NAND Gate

Symbol Truth Table
B A Q
0 0 1
0 1 1
1 0 1
1 1 0
Boolean Expression Q = A . B Read as A AND B gives NOT Q
The Logic NOR Gate
Symbol Truth Table
B A Q
0 0 1
0 1 0
1 0 0
1 1 0
Boolean Expression Q = A + B Read as A OR B gives NOT Q
Exclusive Logic Gates
The Logic Exclusive-OR Gate (Ex-OR)
Symbol Truth Table
B A Q
0 0 0
0 1 1
1 0 1
1 1 0
Boolean Expression Q = A B Read as A OR B but not BOTH gives Q (odd)
The Logic Exclusive-NOR Gate (Ex-NOR)
Symbol Truth Table
B A Q
0 0 1
0 1 0
1 0 0
1 1 1
Boolean Expression Q = A B Read if A AND B the SAME gives Q (even)
Single Input Logic Gates
The Hex Buffer
Symbol Truth Table
A Q
0 0
1 1
Boolean Expression Q = A Read as A gives Q
The NOT gate (Inverter)
Symbol Truth Table
A Q
0 1
1 0
Read as inverse of
Boolean Expression Q = not A or A
A gives Q
The operation of the above Digital Logic Gates and their Boolean expressions can be
summarised into a single truth table as shown below. This truth table shows the relationship
between each output of the main digital logic gates for each possible input combination.
Digital Logic Gate Truth Table Summary
The following logic gates truth table compares the logical functions of the 2-input logic gates
detailed above.
Inputs Truth Table Outputs For Each Gate
B A AND NAND OR NOR EX-OR EX-NOR
0 0 0 1 0 1 0 1
0 1 0 1 1 0 1 0
1 0 0 1 1 0 1 0
1 1 1 0 1 0 0 1
Truth Table Output for Single-input Gates
A NOT Buffer
0 1 0
1 0 1
Pull-up and Pull-down Resistors
One final point to remember, when connecting together digital logic gates to produce logic
circuits, any “unused” inputs to the gates must be connected directly to either a logic level “1” or
a logic level “0” by means of a suitable “Pull-up” or “Pull-down” resistor ( for example 1kΩ
resistor ) to produce a fixed logic signal. This will prevent the unused input to the gate from
“floating” about and producing false switching of the gate and circuit.
As well as using pull-up or pull-down resistors to prevent unused logic gates from floating about,
spare inputs to gates and latches can also be connected together or connected to left-over or spare
gates within a single IC package as shown.
Logic AND Gate Tutorial
Logic AND Gate Definition
A Logic AND Gate is a type of digital logic gate that has an output which is normally at logic
level “0” and only goes “HIGH” to a logic level “1” when ALL of its inputs are at logic level
“1”. The output state of a “Logic AND Gate” only returns “LOW” again when ANY of its inputs
are at a logic level “0”. In other words for a logic AND gate, any LOW input will give a LOW
output.
The logic or Boolean expression given for a digital logic AND gate is that for Logical
Multiplication which is denoted by a single dot or full stop symbol, ( . ) giving us the Boolean
expression of: A.B = Q.
Then we can define the operation of a 2-input logic AND gate as being:
“If both A and B are true, then Q is true”
2-input Transistor AND Gate
A simple 2-input logic AND gate can be constructed using RTL Resistor-transistor switches
connected together as shown below with the inputs connected directly to the transistor bases.
Both transistors must be saturated “ON” for an output at Q.
Logic AND Gates are available using digital circuits to produce the desired logical function and
is given a symbol whose shape represents the logical operation of the AND gate.
Digital Logic “AND” Gate Types
The 2-input Logic AND Gate
Symbol Truth Table

B A Q
0 0 0
0 1 0
2-input AND Gate 1 0 0
1 1 1
The 3-input Logic AND Gate
Symbol Truth Table
C B A Q
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
3-input AND Gate 1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
Boolean Expression Q = A.B.C Read as A AND B AND C gives Q
Because the Boolean expression for the logic AND function is defined as (.), which is a binary
operation, AND gates can be cascaded together to form any number of individual inputs.
However, commercial available AND gate IC’s are only available in standard 2, 3, or 4-input
packages. If additional inputs are required, then standard AND gates will need to be cascaded
together to obtain the required input value, for example.
Multi-input AND Gate

The Boolean Expression for this 6-input AND gate will therefore be: Q = (A.B).(C.D).(E.F)
If the number of inputs required is an odd number of inputs any “unused” inputs can be held
HIGH by connecting them directly to the power supply using suitable “Pull-up” resistors.
Commonly available digital logic AND gate IC’s include:
TTL Logic AND Gates
 74LS08 Quad 2-input

 74LS11 Triple 3-input
 74LS21 Dual 4-input
CMOS Logic AND Gates

 CD4081 Quad 2-input
 CD4073 Triple 3-input
 CD4082 Dual 4-input
7408 Quad 2-input AND Gate

In the next tutorial about Digital Logic Gates, we will look at the digital logic OR Gate function
as used in both TTL and CMOS logic circuits as well as its Boolean Algebra definition and truth
tables.
Logic OR Gate Tutorial
Logic OR Gate Definition
A Logic OR Gate or Inclusive-OR gate is a type of digital logic gate that has an output which is
normally at logic level “0” and only goes “HIGH” to a logic level “1” when one or more of its
inputs are at logic level “1”. The output, Q of a “Logic OR Gate” only returns “LOW” again
when ALL of its inputs are at a logic level “0”. In other words for a logic OR gate, any “HIGH”
input will give a “HIGH”, logic level “1” output.
The logic or Boolean expression given for a digital logic OR gate is that for Logical Addition
which is denoted by a plus sign, ( + ) giving us the Boolean expression of: A+B = Q.
Then we can define the operation of a 2-input logic OR gate as being:
“If either A or B is true, then Q is true”
2-input Transistor OR Gate
A simple 2-input logic OR gate can be constructed using RTL Resistor-transistor switches
Either transistor must be saturated “ON” for an output at Q.
Logic OR Gates are available using digital circuits to produce the desired logical function and is
given a symbol whose shape represents the logical operation of the OR gate.
Digital Logic “OR” Gate Types
The 2-input Logic OR Gate
Symbol Truth Table
B A Q
0 0 0
0 1 1
2-input OR Gate 1 0 1
1 1 1
Boolean Expression Q = A+B Read as A OR B gives Q
The 3-input Logic OR Gate
Symbol Truth Table

C B A Q
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
3-input OR Gate 1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
Boolean Expression Q = A+B+C Read as A OR B OR C gives Q
Like the AND gate, the OR function can have any number of individual inputs. However,
commercial available OR gates are available in 2, 3, or 4 inputs types. Additional inputs will
require gates to be cascaded together for example.
Multi-input OR Gate
The Boolean Expression for this 6-input OR gate will therefore be: Q = (A+B)+(C+D)+(E+F)
LOW by connecting them directly to ground using suitable “Pull-down” resistors.
Commonly available digital logic OR gate IC’s include:
TTL Logic OR Gates
CMOS Logic OR Gates

7432 Quad 2-input Logic OR Gate
In the next tutorial about Digital Logic Gates, we will look at the digital logic NOT Gate
and truth table.
Logic NOT Gate Tutorial
Logic NOT Gate Definition
The digital Logic NOT Gate is the most basic of all the logical gates and is sometimes referred
to as an Inverting Buffer or simply a Digital Inverter. It is a single input device which has an
output level that is normally at logic level “1” and goes “LOW” to a logic level “0” when its
single input is at logic level “1”, in other words it “inverts” (complements) its input signal. The
output from a NOT gate only returns “HIGH” again when its input is at logic level “0” giving us
the Boolean expression of: A = Q.
Then we can define the operation of a single input digital logic NOT gate as being:
“If A is NOT true, then Q is true”
Transistor NOT Gate
A simple 2-input logic NOT gate can be constructed using a RTL Resistor-transistor switches as
shown below with the input connected directly to the transistor base. The transistor must be
saturated “ON” for an inverted output “OFF” at Q.
Logic NOT Gates are available using digital circuits to produce the desired logical function. The
standard NOT gate is given a symbol whose shape is of a triangle pointing to the right with a
circle at its end. This circle is known as an “inversion bubble” and is used in NOT, NAND and
NOR symbols at their output to represent the logical operation of the NOT function. This bubble
denotes a signal inversion (complementation) of the signal and can be present on either or both
the output and/or the input terminals.
The Logic NOT Gate Truth Table

Symbol Truth Table
A Q
0 1
1 0
Inverter or NOT Gate
Boolean Expression Q = not A or A Read as inverse of A gives Q
Logic NOT gates provide the complement of their input signal and are so called because when
their input signal is “HIGH” their output state will NOT be “HIGH”. Likewise, when their input
signal is “LOW” their output state will NOT be “LOW”. As they are single input devices, logic
NOT gates are not normally classed as “decision” making devices or even as a gate, such as the
AND or OR gates which have two or more logic inputs. Commercial available NOT gates IC’s
are available in either 4 or 6 individual gates within a single IC package.
The “bubble” (o) present at the end of the NOT gate symbol above denotes a signal inversion
(complementation) of the output signal. But this bubble can also be present at the gates input to
indicate an active-LOW input. This inversion of the input signal is not restricted to the NOT gate
only but can be used on any digital circuit or gate as shown with the operation of inversion being
exactly the same whether on the input or output terminal. The easiest way is to think of the
bubble as simply an inverter.
Signal Inversion using Active-low input Bubble
Bubble Notation for Input Inversion
NAND and NOR Gate Equivalents
An Inverter or logic NOT gate can also be made using standard NAND and NOR gates by
connecting together ALL their inputs to a common input signal for example.
A very simple inverter can also be made using just a single
stage transistor switching circuit as shown. When the
transistors base input at “A” is high, the transistor
conducts and collector current flows producing a voltage
drop across the resistor R thereby connecting the output
point at “Q” to ground thus resulting in a zero voltage
output at “Q”.
Likewise, when the transistors base input at “A” is low

(0v), the transistor now switches “OFF” and no collector
current flows through the resistor resulting in an output
voltage at “Q” high at a value near to +Vcc.
Then, with an input voltage at “A” HIGH, the output at “Q” will be LOW and an input voltage at
“A” LOW the resulting output voltage at “Q” is HIGH producing the complement or inversion of
the input signal.
Hex Schmitt Inverters
A standard Inverter or Logic NOT Gate, is usually made up from transistor switching circuits
that do not switch from one state to the next instantly, there will always be some delay in the
switching action.
Also as a transistor is a basic current amplifier, it can also operate in a linear mode and any small
variation to its input level will cause a variation to its output level or may even switch “ON” and
“OFF” several times if there is any noise present in the circuit. One way to overcome these
problems is to use a Schmitt Inverter or Hex Inverter.
We know from the previous pages that all digital gates use only two logic voltage states and that
these are generally referred to as Logic “1” and Logic “0” any TTL voltage input between 2.0v
and 5v is recognised as a logic “1” and any voltage input below 0.8v is recognised as a logic “0”
respectively.
A Schmitt Inverter is designed to operate or switch state when its input signal goes above an
“Upper Threshold Voltage” or UTV limit in which case the output changes and goes “LOW”,
and will remain in that state until the input signal falls below the “Lower Threshold Voltage” or
LTV level in which case the output signal goes “HIGH”. In other words a Schmitt Inverter has
some form of Hysteresis built into its switching circuit.
This switching action between an upper and lower threshold limit provides a much cleaner and
faster “ON/OFF” switching output signal and makes the Schmitt inverter ideal for switching any
slow-rising or slow-falling input signal and as such we can use a Schmitt trigger to convert these
analogue signals into digital signals as shown.
Schmitt Inverter
A very useful application of Schmitt inverters is when they are used as oscillators or sine-to-
square wave converters for use as square wave clock signals.
Schmitt NOT Gate Inverter Oscillator
The first circuit shows a very simple low power RC type oscillator using a Schmitt inverter to
generate a square wave output waveform. Initially the capacitor C is fully discharged so the input
to the inverter is “LOW” resulting in an inverted output which is “HIGH”. As the output from
the inverter is fed back to its input and the capacitor via the resistor R the capacitor begins to
charge up.
When the capacitors charging voltage reaches the upper threshold limit of the inverter, the
inverter changes state, the output becomes “LOW” and the capacitor begins to discharge through
the resistor until it reaches the lower threshold level were the inverter changes state again. This
switching back and forth by the inverter produces a square wave output signal with a 33% duty
cycle and whose frequency is given as: ƒ = 680/RC.
The second circuit converts a sine wave input (or any oscillating input for that matter) into a
square wave output. The input to the inverter is connected to the junction of the potential divider
network which is used to set the quiescent point of the circuit. The input capacitor blocks any DC
component present in the input signal only allowing the sine wave signal to pass.
As this signal passes the upper and lower threshold points of the inverter the output also changes
from “HIGH” to “LOW” and so on producing a square wave output waveform. This circuit
produces an output pulse on the positive rising edge of the input waveform, but by connecting a
second Schmitt inverter to the output of the first, the basic circuit can be modified to produce an
output pulse on the negative falling edge of the input signal.
Commonly available logic NOT gate and Inverter IC’s include:
TTL Logic NOT Gates
 74LS04 Hex Inverting NOT Gate

 74LS14 Hex Schmitt Inverting NOT Gate
 74LS1004 Hex Inverting Drivers
CMOS Logic NOT Gates

 CD4009 Hex Inverting NOT Gate
 CD4069 Hex Inverting NOT Gate
7404 NOT Gate or Inverter

In the next tutorial about Digital Logic Gates, we will look at the digital logic NAND Gate
and truth tables.
Logic NAND Gate Tutorial
Logic NAND Gate Definition
The Logic NAND Gate is a combination of the digital logic AND gate with that of an inverter or
NOT gate connected together in series. The NAND (Not – AND) gate has an output that is
normally at logic level “1” and only goes “LOW” to logic level “0” when ALL of its inputs are
at logic level “1”. The Logic NAND Gate is the reverse or “Complementary” form of the AND
gate we have seen previously.
Logic NAND Gate Equivalence
The logic or Boolean expression given for a logic NAND gate is that for Logical Addition, which
is the opposite to the AND gate, and which it performs on the complements of the inputs. The
Boolean expression for a logic NAND gate is denoted by a single dot or full stop symbol, ( . )
with a line or Overline, ( ‾‾ ) over the expression to signify the NOT or logical negation of the
NAND gate giving us the Boolean expression of: A.B = Q.
Then we can define the operation of a 2-input digital logic NAND gate as being:
“If either A or B are NOT true, then Q is true”

Transistor NAND Gate
A simple 2-input logic NAND gate can be constructed using RTL Resistor-transistor switches
Either transistor must be cut-off “OFF” for an output at Q.
Logic NAND Gates are available using digital circuits to produce the desired logical function
and is given a symbol whose shape is that of a standard AND gate with a circle, sometimes
called an “inversion bubble” at its output to represent the NOT gate symbol with the logical
operation of the NAND gate given as.
The Digital Logic “NAND” Gate
2-input Logic NAND Gate
Symbol Truth Table
B A Q
0 0 1
2-input NAND Gate 0 1 1
1 0 1
1 1 0
Boolean Expression Q = A.B Read as A AND B gives NOT Q
3-input Logic NAND Gate
Symbol Truth Table
C B A Q
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
3-input NAND Gate 1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
Boolean Expression Q = A.B.C Read as A AND B AND C gives NOT Q
As with the AND function seen previously, the NAND function can also have any number of
individual inputs and commercial available NAND Gate IC’s are available in standard 2, 3, or 4
input types. If additional inputs are required, then the standard NAND gates can be cascaded
together to provide more inputs for example.
A 4-input NAND Function

The Boolean Expression for this 4-input logic NAND gate will therefore be: Q = A.B.C.D
HIGH by connecting them directly to the power supply using suitable “Pull-up” resistors.
The Logic NAND Gate function is sometimes known as the Sheffer Stroke Function and is
denoted by a vertical bar or upwards arrow operator, for example, A NAND B = A|B or A↑B.
The “Universal” NAND Gate
The Logic NAND Gate is generally classed as a “Universal” gate because it is one of the most
commonly used logic gate types. NAND gates can also be used to produce any other type of
logic gate function, and in practice the NAND gate forms the basis of most practical logic
circuits. By connecting them together in various combinations the three basic gate types of AND,
OR and NOT function can be formed using only NAND‘s, for example.
Various Logic Gates using only NAND Gates
As well as the three common types above, Ex-Or, Ex-Nor and standard NOR gates can be
formed using just individual NAND gates.
Commonly available digital logic NAND gate IC’s include:

TTL Logic NAND Gates

 74LS30 Single 8-input
CMOS Logic NAND Gates

7400 Quad 2-input Logic NAND Gate
In the next tutorial about Digital Logic Gates, we will look at the digital logic NOR Gate
and truth tables.
Logic NOR Gate Tutorial
Logic NOR Gate Definition

The Logic NOR Gate or Inclusive-NOR gate is a combination of the digital logic OR gate with
that of an inverter or NOT gate connected together in series. The NOR (Not – OR) gate has an
output that is normally at logic level “1” and only goes “LOW” to logic level “0” when ANY of
its inputs are at logic level “1”. The Logic NOR Gate is the reverse or “Complementary” form
of the OR gate we have seen previously.
Logic NOR Gate Equivalent
The logic or Boolean expression given for a logic NOR gate is that for Logical Multiplication
which it performs on the complements of the inputs. The Boolean expression for a logic NOR
gate is denoted by a plus sign, ( + ) with a line or Overline, ( ‾‾ ) over the expression to signify
the NOT or logical negation of the NOR gate giving us the Boolean expression of: A+B = Q.
Then we can define the operation of a 2-input digital logic NOR gate as being:
“If both A and B are NOT true, then Q is true”
Transistor NOR Gate
A simple 2-input logic NOR gate can be constructed using RTL Resistor-transistor switches
Both transistors must be cut-off “OFF” for an output at Q.
Logic NOR Gates are available using digital circuits to produce the desired logical function and
is given a symbol whose shape is that of a standard OR gate with a circle, sometimes called an
“inversion bubble” at its output to represent the NOT gate symbol with the logical operation of
the NOR gate given as.
The Digital Logic “NOR” Gate
2-input NOR Gate
Symbol Truth Table
B A Q
0 0 1
0 1 0
2-input NOR Gate 1 0 0
1 1 0
Boolean Expression Q = A+B Read as A OR B gives NOT Q
3-input NOR Gate

Symbol Truth Table
C B A Q
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 0
3-input NOR Gate 1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0
Boolean Expression Q = A+B+C Read as A OR B OR C gives NOT Q
As with the OR function, the NOR function can also have any number of individual inputs and
commercial available NOR Gate IC’s are available in standard 2, 3, or 4 input types. If additional
inputs are required, then the standard NOR gates can be cascaded together to provide more
inputs for example.
A 4-input NOR Function
The Boolean Expression for this 4-input NOR gate will therefore be: Q = A+B+C+D
LOW by connecting them directly to ground using suitable “Pull-down” resistors.
The Logic NOR Gate function is sometimes known as the Pierce Function and is denoted by a
downwards arrow operator as shown, A↓B.
The “Universal” NOR Gate
Like the NAND gate seen in the last section, the NOR gate can also be classed as a “Universal”
type gate. NOR gates can be used to produce any other type of logic gate function just like the
NAND gate and by connecting them together in various combinations the three basic gate types
of AND, OR and NOT function can be formed using only NOR‘s, for example.
Various Logic Gates using only NOR Gates
As well as the three common types above, Ex-Or, Ex-Nor and standard NOR gates can also be
formed using just individual NOR gates.
Commonly available digital logic NOR gate IC’s include:
TTL Logic NOR Gates

CMOS Logic NOR Gates

7402 Quad 2-input NOR Gate
In the next tutorial about Digital Logic Gates, we will look at the digital logic Exclusive-OR
gate known commonly as the Ex-OR Gate function as used in both TTL and CMOS logic
circuits as well as its Boolean Algebra definition and truth tables.
Exclusive-NOR Gate Tutorial
Exclusive-NOR Gate Definition
The Exclusive-NOR Gate function or Ex-NOR for short, is a digital logic gate that is the reverse
or complementary form of the Exclusive-OR function we look at in the previous tutorial.
Basically the “Exclusive-NOR Gate” is a combination of the Exclusive-OR gate and the NOT
gate but has a truth table similar to the standard NOR gate in that it has an output that is normally
at logic level “1” and goes “LOW” to logic level “0” when ANY of its inputs are at logic level
“1”.
However, an output “1” is only obtained if BOTH of its inputs are at the same logic level, either
binary “1” or “0”. For example, “00” or “11”. This input combination would then give us the
Boolean expression of: Q = (A B) = A.B + A.B
In other words, the output of a digital logic Exclusive-NOR gate ONLY goes “HIGH” when its
two input terminals, A and B are at the “SAME” logic level which can be either at a logic level
“1” or at a logic level “0”. An even number of logic “1’s” on its inputs gives a logic “1” at the
output. Then this type of gate gives and output “1” when its inputs are “logically equal” or
“equivalent” to each other, which is why an Exclusive-NOR gate is sometimes called an
Equivalence Gate.
The logic symbol for an Exclusive-NOR gate is simply an Exclusive-OR gate with a circle or
“inversion bubble”, ( ο ) at its output to represent the NOT function. Then the Logic Exclusive-
NOR Gate is the reverse or “Complementary” form of the Exclusive-OR gate, ( ) we have
seen previously.
Ex-NOR Gate Equivalent
The Exclusive-NOR Gate function is achieved by combining standard gates together to form
more complex gate functions and an example of a 2-input Exclusive-NOR gate is given below.
The Digital Logic “Ex-NOR” Gate
2-input Ex-NOR Gate
Symbol Truth Table
B A Q
0 0 1
0 1 0
2-input Ex-NOR Gate 1 0 0
1 1 1
Boolean Expression Q = A B Read if A AND B the SAME gives Q

The logic function implemented by a 2-input Ex-NOR gate is given as “when both A AND B are
the SAME” will give an output at Q. In general, an Exclusive-NOR gate will give an output
value of logic “1” ONLY when there are an EVEN number of 1’s on the inputs to the gate (the
inverse of the Ex-OR gate) except when all its inputs are “LOW”.
Then an Ex-NOR function with more than two inputs is called an “even function” or modulo-2-
sum (Mod-2-SUM), not an Ex-NOR. This description can be expanded to apply to any number
of individual inputs as shown below for a 3-input Exclusive-NOR gate.
3-input Ex-NOR Gate
Symbol Truth Table
C B A Q
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 1
3-input Ex-NOR Gate 1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0
Boolean Expression Q = A B C Read as “any EVEN number of Inputs” gives Q
We said previously that the Ex-NOR function is a combination of different basic logic gates Ex-
OR and a NOT gate, and by using the 2-input truth table above, we can expand the Ex-NOR
function to: Q = A B = (A.B) + (A.B) which means we can realise this new expression using
the following individual gates.
Ex-NOR Gate Equivalent Circuit

One of the main disadvantages of implementing the Ex-NOR function above is that it contains
three different types logic gates the AND, NOT and finally an OR gate within its basic design.
One easier way of producing the Ex-NOR function from a single gate type is to use NAND gates
as shown below.
Ex-NOR Function Realisation using NAND gates
Ex-NOR gates are used mainly in electronic circuits that perform arithmetic operations and data
checking such as Adders, Subtractors or Parity Checkers, etc. As the Ex-NOR gate gives an
output of logic level “1” whenever its two inputs are equal it can be used to compare the
magnitude of two binary digits or numbers and so Ex-NOR gates are used in Digital Comparator
circuits.
Commonly available digital logic Exclusive-NOR gate IC’s include:
TTL Logic Ex-NOR Gates
CMOS Logic Ex-NOR Gates

74266 Quad 2-input Ex-NOR Gate
In the next tutorial about Digital Logic Gates, we will look at the digital Tri-state Buffer also
called the non-inverting buffer as used in both TTL and CMOS logic circuits as well as its
Boolean Algebra definition and truth table.
Digital Buffer Tutorial
Digital Buffer Definition
In a previous tutorial we looked at the digital Not Gate commonly called an inverter, and we saw
that the NOT gates output state is the complement, opposite or inverse of its input signal. So for
example, when its input signal is “HIGH” its output state will NOT be “HIGH”. When its input
signal is “LOW” its output state will NOT be “LOW”, in other words an inverter “inverts” its
input signal.
Sometimes in digital electronic circuits we need to isolate logic gates from each other or have
them drive or switch higher than normal loads, such as relays, solenoids and lamps without the
need for inversion. One type of single input logic gate that allows us to do just that is called the
Digital Buffer.
Unlike the single input, single output inverter or NOT gate such as the TTL 7404 which inverts
or complements its input signal on the output, the “Buffer” performs no inversion or decision
making capabilities (like logic gates with two or more inputs) but instead produces an output
which exactly matches that of its input. In other words, a digital buffer does nothing as its output
state equals its input state.
Then digital buffers can be regarded as Idempotent gates applying Boole’s Idempotent Law
because when an input passes through this device its value is not changed. So the digital buffer is
a “non-inverting” device and will therefore give us the Boolean expression of: Q = A.
Then we can define the logical operation of a single input digital buffer as being:
“Q is true, only when A is true”
In other words, the output ( Q ) state of a buffer is only true (logic “1”) when its input A is true,
otherwise its output is false (logic “0”).
The Single Input Digital Buffer

Symbol Truth Table
A Q
0 0
The Digital Buffer 1 1
Boolean Expression Q = A Read as: A gives Q
The Digital Buffer can also be made by connecting together two NOT gates as shown below.
The first will “invert” the input signal A and the second will “re-invert” it back to its original
level performing a double inversion of the input.
Double Inversion using NOT Gates
You may be thinking “what’s the point of a Digital Buffer“? If it does not invert or alter its input
signal in any way, or make any logical decisions or operations like the AND or OR gates do,
then why not just use a piece of wire instead, and that’s a good point. But a non-inverting Digital
Buffer does have many uses in digital electronics with one of its main advantages being that it
provides digital amplification.
Digital Buffers can be used to isolate other gates or circuit stages from each other preventing the
impedance of one circuit from affecting the impedance of another. A digital buffer can also be
used to drive high current loads such as transistor switches because their output drive capability
is generally much higher than their input signal requirements. In other words buffers can be used
for power amplification of a digital signal as they have what is called a high “fan-out” capability.
Digital Buffer Fan-out Example
The Fan-out parameter of a buffer (or any digital IC) is the output driving capability or output
current capability of a logic gate giving greater power amplification of the input signal. It may be
necessary to connect more than just one logic gate to the output of another or to switch a high
current load such as an LED, then a Buffer will allow us to do just that.
Generally the output of a logic gate is usually connected to the inputs of other gates. Each input
requires a certain amount of current from the gate output to change state, so that each additional
gate connection adds to the load of the gate. So the fan-out is the number of parallel loads that
can be driven simultaneously by one digital buffer of logic gate. Acting as a current source a
buffer can have a high fan-out rating of up to 20 gates of the same logic family.
If a digital buffer has a high fan-out rating (current source) it must also have a high “fan-in”
rating (current sink) as well. However, the propagation delay of the gate deteriorates rapidly as a
function of fan-in so gates with a fan-in greater than 4 should be avoided.
Then there is a limit to the number of inputs and outputs than can be connected together and in
applications where we need to decouple gates from each other, we can use a Tri-state Buffer or
tristate output driver.
The “Tri-state Buffer”
As well as the standard Digital Buffer seen above, there is another type of digital buffer circuit
whose output can be “electronically” disconnected from its output circuitry when required. This
type of Buffer is known as a 3-State Buffer or more commonly a Tri-state Buffer.
A Tri-state Buffer can be thought of as an input controlled switch with an output that can be
electronically turned “ON” or “OFF” by means of an external “Control” or “Enable” ( EN )
signal input. This control signal can be either a logic “0” or a logic “1” type signal resulting in
the Tri-state Buffer being in one state allowing its output to operate normally producing the
required output or in another state were its output is blocked or disconnected.
Then a tri-state buffer requires two inputs. One being the data input and the other being the
enable or control input as shown.
Tri-state Buffer Switch Equivalent
When activated into its third state it disables or turns “OFF” its output producing an open circuit
condition that is neither at a logic “High” or “Low”, but instead gives an output state of very
high impedance, High-Z, or more commonly Hi-Z. Then this type of device has two logic state
inputs, “0” or a “1” but can produce three different output states, “0”, “1” or “ Hi-Z ” which is
why it is called a “Tri” or “3-state” device.
Note that this third state is NOT equal to a logic level “0” or “1”, but is an high impedance state
in which the buffers output is electrically disconnected from the rest of the circuit. As a result, no
current is drawn from the supply.
There are four different types of Tri-state Buffer, one set whose output is enabled or disabled by
an “Active-HIGH” control signal producing an inverted or non-inverted output, and another set
whose buffer output is controlled by an “Active-LOW” control signal producing an inverted or
non-inverted output as shown below.
Active “HIGH” Tri-state Buffer
Symbol Truth Table
Enable IN OUT
0 0 Hi-Z
0 1 Hi-Z
1 0 0
Tri-state Buffer 1 1 1
Read as Output = Input if Enable is equal to “1”
An Active-high Tri-state Buffer such as the 74LS241 octal buffer, is activated when a logic level
“1” is applied to its “enable” control line and the data passes through from its input to its output.
When the enable control line is at logic level “0”, the buffer output is disabled and a high
impedance condition, Hi-Z is present on the output.
An active-high tri-state buffer can also have an inverting output as well as its high impedance
state creating an active-high tri-state inverting buffer as shown.
Active “HIGH” Inverting Tri-state Buffer
Symbol Truth Table
Enable IN OUT
0 0 Hi-Z
0 1 Hi-Z
1 0 1
Inverting Tri-state Buffer
1 1 0
Read as Output = Inverted Input if Enable equals “1”
The output of an active-high inverting tri-state buffer, such as the 74LS240 octal buffer, is
activated when a logic level “1” is applied to its “enable” control line. The data at the input is
passes through to the output but is inverted producing a complement of the input. When the
enable line is LOW at logic level “0”, the buffer output is disabled and at a high impedance
condition, Hi-Z.
The same two tri-state buffers can also be implemented with an active-low enable input as
shown.
Active “LOW” Tri-state Buffer

Symbol Truth Table
Enable IN OUT
0 0 0
0 1 1
1 0 Hi-Z
Tri-state Buffer
1 1 Hi-Z
Read as Output = Input if Enable is NOT equal to “1”
An Active-low Tri-state Buffer is the opposite to the above, and is activated when a logic level
“0” is applied to its “enable” control line. The data passes through from its input to its output.
When the enable control line is at logic level “1”, the buffer output is disabled and a high
impedance condition, Hi-Z is present on the output.
Active “LOW” Inverting Tri-state Buffer
Symbol Truth Table
Enable IN OUT
0 0 1
0 1 0
1 0 Hi-Z
Inverting Tri-state Buffer
1 1 Hi-Z
Read as Output = Inverted Input if Enable is NOT equal to “1”
An Active-low Inverting Tri-state Buffer is the opposite to the above as its output is enabled or
disabled when a logic level “0” is applied to its “enable” control line. When a buffer is enabled
by a logic “0”, the output is the complement of its input. When the enable control line is at logic
level “1”, the buffer output is disabled and a high impedance condition, Hi-Z is present on the
output.
Tri-state Buffer Control
We have seen above that a buffer can provide voltage or current amplification within a digital
circuit and it can also be used to invert the input signal. We have also seen that digital buffers are
available in the tri-state form that allows the output to be effectively switched-off producing a
high impedance state (Hi-Z) equivalent to an open circuit.
The Tri-state Buffer is used in many electronic and microprocessor circuits as they allow
multiple logic devices to be connected to the same wire or bus without damage or loss of data.
For example, suppose we have a data line or data bus with some memory, peripherals, I/O or a
CPU connected to it. Each of these devices is capable of sending or receiving data to each other
onto this single data bus at the same time creating what is called a contention.
Contention occurs when multiple devices are connected together because some want to drive
their output high and some low. If these devices start to send or receive data at the same time a
short circuit may occur when one device outputs to the bus a logic “1”, the supply voltage, while
another is set at logic level “0” or ground, resulting in a short circuit condition and possibly
damage to the devices as well as loss of data.
Digital information is sent over these data buses or data highways either serially, one bit at a
time, or it may be up to eight (or more) wires together in a parallel form such as in a
microprocessor data bus allowing multiple tri-state buffers to be connected to the same data
highway without damage or loss of data as shown.
Tri-state Buffer Data Bus Control
Then, the Tri-state Buffer can be used to isolate devices and circuits from the data bus and one
another. If the outputs of several Tri-state Buffers are electrically connected together Decoders
are used to allow only one set of Tri-state Buffers to be active at any one time while the other
devices are in their high impedance state. An example of Tri-state Buffers connected to a 4-wire
data bus is shown below.
Tri-state Buffer Control
This basic example shows how a binary decoder can be used to control a number of tri-state
buffers either individually or together in data sets. The decoder selects the appropriate output that
corresponds to its binary input allowing only one set of data to pass either a logic “1” or logic
“0” output state onto the bus. At this time all the other tri-state outputs connected to the same bus
lines are disabled by being placed in their high impedance Hi-Z state.
Then data from data set “A” can only be transferred to the common bus when an active HIGH
signal is applied to the tri-state buffers via the Enable line, ENA. At all other times it represents a
high impedance condition effectively being isolated from the data bus.
Likewise, data set “B” only passes data to the bus when an enable signal is applied via ENB. A
good example of tri-state buffers connected together to control data sets is the TTL 74244 Octal
Buffer.
It is also possible to connect Tri-state Buffers “back-to-back” to produce what is called a Bi-
directional Buffer circuit with one “active-high buffer” connected in parallel but in reverse with
one “active-low buffer”.Here, the “enable” control input acts more like a directional control
signal causing the data to be both read “from” and transmitted “to” the same data bus wire. In
this type of application a tri-state buffer with bi-directional switching capability such as the TTL
74245 can be used.
We have seen that a Tri-state buffer is a non-inverting device which gives an output (which is
same as its input) only when the input to the Enable, ( EN ) pin is HIGH otherwise the output of
the buffer goes into its high impedance, ( Hi-Z ) state. Tri-state outputs are used in many
integrated circuits and digital systems and not just in digital tristate buffers.
Both digital buffers and tri-state buffers can be used to provide voltage or current amplification
driving much high loads such as relays, lamps or power transistors than with conventional logic
gates. But a buffer can also be used to provide electrical isolation between two or more circuits.
We have seen that a data bus can be created if several tristate devices are connected together and
as long as only one is selected at any one time, there is no problem. Tri-state buses allow several
digital devices to input and output data on the same data bus by using I/O signals and address
decoding.
Tri-state Buffers are available in integrated form as quad, hex or octal buffer/drivers in both
uni-directional and bi-directional forms, with the more common being the TTL 74240, the TTL
74244 and the TTL 74245 as shown.
Commonly available Digital Buffer and Tri-state Buffer IC’s include:
TTL Logic Digital Buffers
 74LS07 Hex Non-inverting Buffer

 74LS17 Hex Buffer/Driver
 74LS244 Octal Buffer/Line Driver
 74LS245 Octal Bi-directional Buffer
CMOS Logic Digital Buffers

 CD4050 Hex Non-inverting Buffer
 CD4503 Hex Tri-state Buffer
 HEF40244 Tri-state Octal Buffer
74LS07 Digital Buffer
74LS244 Octal Tri-state Buffer

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 Decimal – The decimal numbering system has a base of 10 (MOD-10) and uses the digits

from 0 through 9 to represent a decimal number value.

Base, b Byte (8-bits) Word (16-bits)

Representation of an Octal Number

MSB Octal Number LSB

16M 2M 262k 32k 4k 512 64 8 1

Decimal Number 3-bit Binary Number Octal Number

8 001 000 10 (1+0)

9 001 001 11 (1+1)

Continuing upwards in groups of three

Octal Numbers Example No1

Binary Digit Value 001101010111001111

Group the bits into three´s starting

Octal Number form 1 5 2 7 1 78

Octal Numbers Example No2

In polynomial form = ( 2×83 ) + ( 3×82 ) + ( 2×81 ) + ( 2×80 )

Add the results = ( 1024 ) + ( 192 ) + ( 16 ) + ( 2 )

Decimal number form equals: 123410

Hexadecimal Number String

Decimal Number 4-bit Binary Number Hexadecimal Number

16 0001 0000 10 (1+0)

17 0001 0001 11 (1+1)

Continuing upwards in groups of four

Do not get confused, 10 or 20 is NOT ten or twenty it is 1 + 0 and 2 + 0 in hexadecimal. In fact

Representation of a Hexadecimal Number

MSB Hexadecimal Number LSB

168 167 166 165 164 163 162 161 160

4.3G 2.6G 16M 1M 65k 4k 256 16 1

Adding of Additional 0’s to a Binary Number

Binary Number 0011 0010 1101 1001

Binary Number = 111010102

Convert to Hexadecimal using the table above

Then, the hexadecimal equivalent of the binary number

1110 10102 is #EA16

Hexadecimal Numbers Example No2

= 0011 1111 1010 01112

= (8192 + 4096 + 2048 + 1024 + 512 + 256 + 128 + 32 + 4 + 2 + 1)

Then, the Decimal number of 16,295 can be represented as:-

0011 1111 1010 01112 in Binary.

Then to summarise. The Hexadecimal, or Hex, numbering system is commonly used in

Any numbering system can be summarised by the following relationship:

where: N is a real positive number

N = bn qn… b3 q3 + b2 q2 + b1 q1 + b0 q0 + b-1 q-1 + b-2 q-2… etc.

The Decimal Numbering System

6000 + 100 + 60 + 3 = 6163

or it can be written reflecting the weight of each digit as:

( 6×1000 ) + ( 1×100 ) + ( 6×10 ) + ( 3×1 ) = 6163

or it can be written in polynomial form as:

( 6×103 ) + ( 1×102 ) + ( 6×101 ) + ( 3×100 ) = 6163

The Binary Numbering System

Representation of a Binary Number

MSB Binary Digit LSB

So for example, converting a Binary to Decimal number would be:

Decimal Digit Value 256 128 64 32 16 8 4 2 1

Binary Digit Value 1 0 1 1 0 0 1 0 1

Repeated Division-by-2 Method

Number 294 Dividing each decimal number by “2” as

divide by 2 If the decimal number being divided is