Fall 2024: Analog IC Design Exercise
2-stage Operational-Transconductance-Amplifier (OTA)
Use 45nm CMOS technology to design a 2-stage OTA shown in Figure 1 below (i.e., determine
bias current Ibias, sizes of all transistors, compensation capacitor CC, lead compensation resistor RC)
such that the design achieves open-loop DC gain of at least 60dB (1000 in linear scale) and when
OTA deployed in a unity-gain buffer topology (see Figure 2) a -3dB bandwidth of at least 5MHz
is achieved with a minimum phase-margin of 65o degrees. Good practices of achieving low noise
and low power design should be taken into consideration.
V+in V-in Vout
Fig.1: 2-stage OTA with Miller compensation capacitor CC and lead compensation resistor RC.
For simplicity assume that transistors Q5 and Q8 have the same channel width W and channel
length L.
V+in
Vout
V-in
Fig.2: Unity-gain buffer topology deploying 2-stage OTA from Fig 1. Note that a DC voltage
source Vcm must be applied in series with the input signal source (or AC signal) for the proper
biasing of the OTA.
Work Description:
The goal is to design an OTA from Figure 1 in 45nm CMOS technology to meet the design
specifications in Table 1 below – note that the parameter values in the table whose values are not
specified are meant to be determined during the design optimization and their obtained values
should be listed in the table as part of the report on this project.
Specifications:
Specified Value / Range Obtained
Parameter Description
/Used *
Minimum Typical Maximum
Vdd Supply Voltage 1.1V 1.1V
Av0 Open-loop DC Gain (in dB) 45
fta Unity-gain Frequency 5 MHz
Ibias Bias Current Not specified
Ivdd Total current consumption 1mA
o
PM Phase Margin 65
VCM Input Common-Mode Voltage 0.55V 0.55
SR Slew Rate Not specified
CC Compensation capacitance Not specified
RC Lead compensation resistance Not specified
Integrated Total noise in 5MHz bandwidth Not specified
noise
Spot noise Noise power spectral density at 5kHz Not specified
Table 1: Specifications for the Design Exercise. * Last column to be filled with obtained results.
If the Specified Value/Range is not provided for a parameter, this means that the parameter value
is either derived from other parameters whose values are specified or it can be chosen freely to
possibly improve some other amplifier’s performance metrics (e.g., noise or dynamic range).
Remarks on the Specifications:
Vdd: Choose 1.1V for your design.
fta: Note that the bandwidth of an OTA in a unity-gain buffer topology of Figure 2 is the same as
the unity-gain frequency of OTA (i.e., feedback factor b=1)
Ivdd: Current consumption should not be greater than 1mA
Phase Margin (PM): Should be a minimum of 65o
VCM: Input common-mode voltage is the DC voltage (so-called bias voltage) applied
simultaneously to both inputs to the OTA. If this voltage is too high or too low, some of the MOS
transistors will enter triode region of operation causing the amplifier to lose gain and/or become
non-linear (i.e., causing distortion). For this design project assume that VCM is equal to half the
power supply range (or 0.55V).
Slew Rate (SR): Is calculated as a ratio of the maximum current that can be provided by the first
stage (differential amplifier) and the compensation capacitance CC. It specifies the maximum rate
of change of the output voltage.
Final Report Suggestions:
At the end of the project, the final report must be handed in. At minimum, this report shall include:
o Final schematic with MOS transistor sizes clearly indicated
o A complete description of all key simulations (AC and noise analysis)- include their
results and plots to support that the design goals has been achieved.
o Noise analysis of the final design that includes plot of the output noise power
spectral density and total input-referred noise power within 0-5MHz frequency
range and provide suggestions on ways to reduce noise and associated trade-offs.
o A complete account of the design trade-offs or unforeseen modifications
o A ”Data Sheet” summarizing key design parameters (i.e., provide a copy of Table
1 with the last column filled out with Obtained/Used values.
