573128, 1:16AM 8085 Addressing Modes & Interupis 8085 Addressing Modes & Interrupts Now let us discuss the addressing modes in 8085 Microprocessor. Addressing Modes in 8085. These are the instructions used to transfer the data from one register to another register, from the memory to the register, and from the register to the memory without any alteration in the content. Addressing modes in 8085 is classified into 5 groups ~ Immediate addressing mode In this mode, the 8/16-bit data is specified in the instruction itself as one of its operand. For example: MVI K, 20 means 20F is copied into register K. Register addressing mode In this mode, the data is copied from one register to another. For example: MOV K, B: means data in register B is copied to register K. Direct addressing made In this mode, the data is directly copied from the given address to the register. For example: LDB S000K: means the data at address 5000K is copied to register 8 Indirect addressing mode In this mode, the data is transferred from one register to anther by using the address pointed by the register. For ‘example: MOV K, B: means data is transferred from the memory address pointed by the register to the register K. Implied addressing mode This mode doesn't require any operand; the data is specified by the opcode itself. For example: CMP. Interrupts in 8085 Interrupts are the signals generated by the external devices to request the microprocessor to perform a task. There are 5 interrupt signals, ie. TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR. Interrupt are classified into following groups based on their parameter + Vector interrupt - In this type of interrupt, the interrupt address is known to the processor. For example: RST7.5, RST6.5, RSTS.5, TRAP. + Non-Vector interrupt ~ In this type of interrupt, the interrupt address is not known to the processor so, the interrupt address needs to be sent externally by the device to perform interrupts. Far example: INTR. + Maskable interrupt - In this type of interrupt, we can disable the interrupt by writing some instructions into ‘the program. For example: RST7.5, RST6.5, RSTSS. nitps:lwurtutoralspoint.commicroprocessorimicroprocessor_8085_addressing_ modes_and_Interupts nim 4257323, 11:16 AM £8085 Addressing Modes &Interupts + Non-Maskable interrupt - In this type of interrupt, we cannot disable the interrupt by writing some instructions into the program. For example: TRAP. * Software interrupt ~ In this type of interrupt, the programmer has to add the instructions into the program to execute the interrupt. There are 8 software interrupts in 8085, ic. RSTO, RST1, RST2, RST3, RST4, RSTS, RST6, and RST7. + Hardware interrupt - There are 5 interrupt pins in 8085 used as hardware interrupts, ie. TRAP, RST7.5, RST6.5, RSTS5, INTA. Note - NTA is not an interrupt, it is used by the microprocessor for sending acknowledgement. TRAP has the highest priority, then RST7.5 and so on Interrupt Service Routine (ISR) ‘A small program or a routine that when executed, services the corresponding interrupting source is called an ISR. TRAP. It is a non-maskable interrupt, having the highest priority among all interrupts. Bydefault, it is enabled until it gets acknowledged. In case of failure, it executes as ISR and sends the data to backup memory. This interrupt transfers the control to the location 0024H. RST7.5 It is a maskable interrupt, having the second highest priority among all interrupts. When this interrupt is executed, the processor saves the content of the PC register into the stack and branches to 003CH address. RST 6.5 Itis a maskable interrupt, having the third highest priority among all interrupts. When this interrupt is executed, the processor saves the content of the PC register into the stack and branches to 0034H address. RST 5.5 It is a maskable interrupt. When this interrupt is executed, the processor saves the content of the PC register into the stack and branches to 002CH address. INTR It is a maskable interrupt, having the lowest priority among all interrupts. It can be disabled by resetting the microprocessor. When INTR signal goes high, the following events can occur ~ + The microprocessor checks the status of INTR signal during the execution of each instruction. + When the INTR signal is high, then the microprocessor completes its current instruction and sends active low interrupt acknowledge signal. + When instructions are received, then the microprocessor saves the address of the next instruction on stack and executes the received instruction. ‘Print Pege nitps:lwurtutoralspoint.conmmleroprocessorimicroprocessor_8085_addressing_ modes_and_Interupts nim 25/3128, 1:18AM Microprocessor - 8085 Control Instructions Microprocessor - 8085 Control Instructions Following is the table showing the list of Control instructions with their meanings, Opcode Operand Meaning Explanation NOP None Nooperation No operation is performed, ie, the instruction is fetched and decoded Halt and enter The CPU finishes executing the current instruction and stops further HUT None wait state execution. An interrupt or reset is necessary to exit from the halt state. Disable ‘The interrupt enable flip-flop is reset and all the interrupts are disabled DL None interrupts except TRAP. El None Enable interrupts The interrupt enable flip-flop is set and all the interrupts are enabled. IM None Read interrupt This instruction is used to read the status of interrupts 7.5, 6.5, 55 and read mask serial data input bit. Setinterrupt This instruction is used to implement the interrupts 7.5, 6.5, 5.5, and serial SM None mask data output. Print Page https:vnw.tutorilspoint.com/microprocessor/microprocessor_B086_control_nstructions.him wn573128, 1:19AM Opcode MP. cpl ANA ANI XRA xRI ORA, oR! RLC RRC RAL RAR MA, cmc sTc Operand R M B-bit data B-bit data B-bit data None None None None None None None Meaning Compare the register ‘or memory with the accumulator Compare immediate with the accumulator Logical AND register ‘or memory with the accumulator Logical AND immediate with the accumulator Exclusive OR register (or memory with the accumulator Exclusive OR immediate with the accumulator Logical OR register or memory with the accumulator Logical OR immediate with the accumulator Rotate the accumulator left Rotate the accumulator right Rotate the accumulator left through carry Rotate the accumulator right through carry ‘Complement accumulator Complement carry Set Carry Microprocessor 8085 Logical Instructions Explanation ‘The contents of the operand (register or memory] are M compared with the contents of the accumulator. ‘The second byte data is compared with the contents of the accumulator. The contents of the accumulator are logically AND with M the contents of the register or memory, and the result is placed in the accumulator. The contents of the accumulator are logically AND with the 8-bit data and the result is placed in the accumulator. The contents of the accumulator are Exclusive OR with M the contents of the register or memory, and the result is placed in the accumulator. The contents of the accumulator are Exclusive OR with the 8-bit data and the result is placed in the accumulator The contents of the accumulator are logically OR with M the contents of the register or memory, and result is placed in the accumulator. The contents of the accumulator are logically OR with the 8-bit data and the result is placed in the accumulator. Each binary bit of the accumulator is rotated left by one position, Bit D7 is placed in the position of DO as well as in the Carry flag. CY is modified according to bit D7. Each binary bit of the accumulator is rotated right by one position, Bit DO is placed in the position of D7 as well as in the Carry flag. CY is modified according to bit DO. Each binary bit of the accumulator is rotated left by one position ‘through the Carry flag. Bit D7 is placed in the Carry flag, and the Carry flag is placed in the Least significant position DO. CY is modified according to bit D7. Each binary bit of the accumulator is rotated right by one position ‘through the Carry flag. Bit DO is placed in the Carry flag, and the Carry flag is placed in the most significant position D7. CY is modified according to bit DO. ‘The contents of the accumulator are complemented. No flags are affected, ‘The Carry flag is complemented. No other flags are affected Set Carty htts:vnw.utorilspoint.comimieroprocessorimicroprocessor_8085_logical_instuctions nimi 28573128, 1:21AM. Opcode Jc INC P IM Zz INZ IPE 1PO Opcode cc cnc or cm cz Nz cre cro. Opcade IMP Description Jump on Carty Jump on no Carty Jump on positive Jump on Jump on Jump on no Jump on parity even Jump on parity odd Description Calton cary Calton no Cary Calton positive Calton Call on zero Callon no Calton parity even Calton parity odd Flag Status zea Flag Status P=0 Operand 16-bit address 16-bit acdress 16-bit acdress Nore Meaning Jump unconditionally Jump conditionally Unconditional subroutine call Return from subroutine unconditionally Microprocessor 8086 Branching Instructions Explanation ‘The program sequence is transferred to the memory address given in the operand, The program sequence is transferred to the memory address given in the operand based on the specified flag of the PSW. The program sequence is transferred to the memory address given in the operand. Before ‘vansferring, the address of the next instruction after CALL is pushed onto the stack ‘The program sequence is transferred from the subroutine to the calling program. https:vw.tutorialspoint.com/microprocessor/microprocessor_8086_branching_ Instructions him 218573128, 1:21AM. Opcode RC RNC RP. RM RZ. RNZ RPE RPO. Description Return on Carty Return on no Carry Return on positive Return on Return on Return on Return on parity even Return on parity odd PCHL RST Microprocessor 8086 Branching Instructions Flag Status ct cy=0 s-0 Return from Nore subroutine conditionally Zl 20 Pat P=0 Load the program Nore counter with HL contents 07 Restart The program sequence is transferred from the subroutine to the calling program based on the specified flag of the PSW and the program ‘execution begins at the new address. The contents of registers H & L are copied into the program counter, The contents of H are placed as the high-order byte and the contents ‘of Las the loworder byte. ‘The RST instruction is used as software instructions ina program to transfer the program ‘execution to one of the following eight locations. Instruction Restart Address RSTO ‘0000H rst ‘008 RsT2 0010H RST3 oo18H RST 4 (0020H RSTS 0028H RsT6 (0030H RST? (0038H ‘The 8085 has additionally 4 interrupts, which ‘ean generate RST instructions internally and doesn't require any external hardware. are those instructions and their Restar addresses ~ htts:vw.tutorilspoint.com/microprocessor/microprocessor_8086_branching_ instructions him 318573128, 1:21AM. Microprocessor 8086 Branching Instructions Print Page https:vw.tutorialspoint.com/microprocessor/microprocessor_8086_branching_instructions him Interrupt TRAP RSTSS RSTS RST7.5 Restart Address oo2at oo2cH oases osc a8573128, 11:22AM 8085 Arithmetic Instructions Opcode Operand Meaning Explanation The contents of the register or memory are added to R Add register or memory, the contents of the accumulator and the result is ADD M to the accumulator stored in the accumulator. Example - ADD k. The contents of the register or memory & M the Carry R ‘Add register to. the flag are added to the contents of the accumulator and ape M accumulator with carry __ the results stored in the accumulator. Example - ADC K The 8-bit data is added to the contents of the Add the immediate to accumulator and the result is stored in the ADI 8-bit data Ct the accumulator accumulator. Example - ADI 55K The 8-bit data and the Carry flag are added to the Add the immediate tO contents of the accumulator and the result is stored in Act S-bitdata the accumulator with the accumulator, carry Example - ACI 55k The instruction stores 16-bit data into the register pair La Rea: Pair: 16bit_ Load the register Pair designated in the operand data immediate Example ~ LX! k, 3025M The 16-bit data of the specified register pair are Add the register pair to DAD Reg. pair added to the contents of the HL register. Hand L registers Example ~ DAD K The contents of the register or the memory are R Subtract the register or suB ‘the memory from the subtracted from the contents of the accumulator, and the result is stored in the accumulator. accumulator Example - SUB K The contents of the register or the memory & M the Subtract the source and Borrow flag are subtracted from the contents of the sBB borrow from the accumulator and the result is placed in the accumulator accumulator. Example - S88 K nitps:lwurtutoralspointcom/microprocessorimicroprocessor_8085_srithmati.instrucions.him 28573128, 11:22AM 8085 Arithmetic Instructions The 8-bit data is subtracted from the contents of the sul Bebit dats SUotact_ the immediate accumulator & the result is stored in the accumulator. from the accumulator Example - SUI 55K The contents of register H are exchanged with the Exchange H and L with contents of register D, and the contents of register L XCHG None DandE are exchanged with the contents of register E. Example - xCHG The contents of the designated register or the memory R Increment the register or are incremented by 1 and their result is stored at the INR M the memory by 1 same place. Example ~ INR K The contents of the designated register pair are Increment register pair incremented by 1 and their result is stored at the same INX R a by place. Example - INX K The contents of the designated register or memory are R Decrement the register decremented by 1 and their result is stored at the Der M or the memory by 1 same place. Example ~ DCR K The contents of the designated register pair are Decrement the register decremented by 1 and their result is stored at the Dex R St pair by 1 same place. Example - DCX K The contents of the accumulator are changed from a binary value to two 4-bit BCD digits. If the value of the low-order 4-bits in the accumulator is greater than 9 or if AC flag is set, the instruction DAA None Decimal adiust adds 6 to the low-order four bits. accumulator If the value of the high-order 4-bits in the accumulator is greater than 9 or if the Carry flag is set, the instruction adds 6 to the high-order four bits. Example - DAA Print Page nitps:lwurtutoralspointcom/microprocessorimicroprocessor_8085_srithmati.instrucions.him 335/3128, 11:23 AM. 8085 Data-ransferInstuctons Opcode Operand Meaning Explanation This instruction copies the contents of the Rd. Se Copy from the source Mov M, Se (Se) to the destination(Dt) ouM Example - MOV K,L source register into the destination register without any alteration. The 8-bit data is stored in the destination Ra, data Mv Move immediate 8-bit register or memory. M, data Example ~ MVIK, 55L. The contents of a memory location, specified by a 16-bit address in the operand, are copied to LOA 16-bit address Load the accumulator tha accumulator. Example - LDA 2034K The contents of the designated register pair point to a memory location. This instruction Load the accumulator LOAX BID Reg. pair copies the contents of that memory location indirect into the accumulator. Example ~ LDAX K The instruction loads 16-bit data in the register LXI— Reg. pair, 16-bit data Ld the resister Pair pair designated in the register or the memory. immediate Example ~ LX! K, 32251. The instruction copies the contents of the memory location pointed out by the address LHLD 16-bit address Load H and L registers into register L and copies the contents of the Sirect next memory location into register H. Example ~ LHLD 3225« The contents of the accumulator are copied into ‘the memory location specified by the operand, This is a 3-byte instruction, the second byte specifies the low-order address and the third byte specifies the high-order address. STA 16-bit address 16-bit address Example - STA 325K STAX 16-bit address Store the accumulator The contents of the accumulator are copied into indirect the memory location specified by the contents of the operand. nitps:wartutoralspoint.com/microprocessorimicroprocessor_8085_data_transfer_instructionshim 2189/3128, 11:23 AM 8085 Data-ransferInstuctons Example ~ STAX K The contents of register L are stored in the memory location specified by the 16-bit address in the operand and the contents of H register are stored into the next memory SHLD Le-bit address Store Hand L registers location by incrementing the operand, direct This is a 3-byte instruction, the second byte specifies the low-order address and the third byte specifies the high-order address. Example ~ SHLO 3225K The contents of register H are exchanged with the contents of register D, and the contents of Exchange H and L with Dandeé register L are exchanged with the contents of register E, XCHG None Example - XCHG The instruction loads the contents of the H and L registers into the stack pointer register. The Copy H and L registers contents of the H register provide the high- tothe stack pointer _-_ofder address and the contents of the L register provide the low-order address. SPHL None Example - SPHL The contents of the L register are exchanged with the stack location pointed out by the Exchange H and L with | Contents ofthe stack pointer register. top of stack The contents of the H register are exchanged with the next stack location (SP+1). OTHE None Example ~ XTHL The contents of the register pair designated in the operand are copied onto the stack in the following sequence. The stack pointer register is decremented and Push the register pair the contents of the high order register (B, D, H, PUSH Reg. pair onto the stack ‘A) are copied into that Location The stack pointer register is decremented again and the contents of the low-order register (C, E, L, flags) are copied to that location. Example - PUSH K nitps:lwartutoralspoint.com/microprocessorimicroprocessor_8085_data_transfer_instructions him ia5/3128, 11:23 AM. PoP Reg. pair our 8-bit port address. IN B-bit port address. Print Pege £2085 Data-ransferInetuctions Pop off stack to the register pair Output the data from the accumulator to a port with Bbit address Input data_——to accumulator from a port with 8-bit address The contents of the memory location pointed out by the stack pointer register are copied to the low-order register (C, E, L, status flags) of ‘the operand, The stack pointer is incremented by 1 and the contents of that memory location are copied to the high-order register (B, D, H, A) of the operand. The stack pointer register is again incremented by 1. Example - POPK The contents of the accumulator are copied into the VO port specified by the operand. Example ~ OUT K9L The contents of the input port designated in the operand are read and loaded into the accumulator. Example ~ INSKL nitps:lwartutoralspoint.com/microprocessorimicroprocessor_8085_data_transfer_instructions him 48