IT T46 SYSTEM SOFTWARE

IT-T46 SYSTEM SOFTWARE

Unit: I
Introduction to System Software and Machine architecture – Simplified Instructional
Computer (SIC)-Traditional machines-VAX Architecture-Pentium Pro Architecture- RISC machines.
Unit: II
Assemblers: Basic assembler functions- machine – dependent and machine independent
assembler features – Assembler design – Two-pass assembler with overlay structure- one – pass
assembler and multi - pass assembler. Interpreters: Virtual Machine concept- Java Byte Codes-
Microsoft Intermediate Language
Unit: III
Loaders and Linkers: Basic loader functions, machine – dependent and machine –
independent loader features. Loader design – Linkage editors, dynamic linking and bootstrap loaders.
Unit: IV
Macro Processors: Functions – Machine independent macro processor features – macro
processor design option-Implementation examples.
Unit: V
Text editors - Overview of the Editing Process - User Interface – Editor Structure. - Interactive
debugging systems - Debugging functions and capabilities – Relationship with other parts of the system
– User-Interface Criteria.

Text Books:
Leland L Beck and D. Manjula, "System Software",III Edition, Pearson Education , First
Impression, 2007.
John J Donovan, Systems Programming, Tata McGraw Hill Company, New Delhi, 2004.
Alfred V. Aho, Monica S. Lam, Ravi Sethi, Jeffrey D. Ullman, Compilers: Principles,
Techniques, & Tools, 2nd edition Addison-Wesley, 2006.
Reference Books:
Dhamdhere D M, Systems Programming and Operating Systems, Tata McGraw Hill
Company, New Delhi, 2002.
David Galles, Modern Compiler Design, Addison Wesley, 2004.
Websites:
http://www.edunotes.in/system-software-notes
http://www.uotechnology.edu.iq/sweit/Lectures/Dr-Shaima-Sys-Prog/lec1-2-3-4.pdf

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TABLE OF CONTENTS
1. Machine Architecture
1.1 Introduction 04
1.2 System Software and Machine Architecture 04
1.3 Simplified Instructional Computer (SIC) 04
1.3.1 SIC Machine Architecture 05
1.3.2 SIC Programming Examples 07
1.3.3 SIC/XE Machine Architecture 09
1.4 VAX Architecture 13
1.5 Pentium Pro Architecture 15
1.6 RISC Machines 17

2. Assemblers
2.1 Basic Assembler Function 25
2.1.1 A Simple SIC Assembler 29
2.1.2Assembler Algorithm and Data Structures 30
2.2 Machine Dependent Assembler Features 36
2.2.1 Instruction Formats & Addressing Modes 36
22.2. Program Relocation. 40
2.3 Machine Independent Assembler Features 42
2.3.1 Literals
2.3.2 Symbol-Definition Statements
2.3.3 Expression, Program Blocks
2.3.4 Control Sections and Programming Linking
2.4 Assembler Design Operations 59
2.4.1 One-Pass Assembler 59
2.4.2 Multi-Pass Assembler 63
2.5 Interpreters 65
2.5.1 Java Virtual Machine Concepts 65
2.5.2 Java Byte Codes 68
2.5.3 Microsoft Intermediate Language 70
3. Loaders and Linkers
3.1 Basic Loader Functions 77
3.1.1 Design of an Absolute Loader 78
3.1.2 A Simple Bootstrap Loader 80

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3.2 Machine-Dependent Loader Features 81

3.2.1Relocation 81
3.2.2Program Linking 83
3.2.3 Algorithm and Data Structures for a Linking Loader 89
3.3 Machine-Independent Loader Features 94
3.3.1 Automatic Library Search 94
3.3.2 Loader Options 95
3.4 Loader Design Options 95
3.4.1 Linking Loader 96
3.4.2 Linkage Editor 96
3.4.3 Dynamic Linkage 97
3.4.4 Bootstrap Loaders 99

4. Macro Processor
4.1 Basic Macro Processor Functions 103
4.1.1 Macro Definitions and Expansion 103
4.1.2 Macro Processor Algorithm and Data Structures 106
4.2 Machines-Independent Macro Processor Features 113
4.2.1 Concatenation of Macro Parameters 113
4.2.2 Generation of Unique Labels 114
4.2.3 Conditional Macro Expansion 116
4.2.4 Keyword Macro Parameters
4.3 Macro Processor Design Options 122
4.3.1 Recursive Macro Expansion 122
4.3.2 General-Purpose Macro Processors 123
4.3.3 Macro Processing Within Language Translators 124
4.4 Line by Line Macro Processor 124

5. Editors and Debugging Systems

5.1 Text Editors 131
5.1.1 Overview of Editing Process 131
5.1.2 User Interface 132
5.1.3 Editor Structure 133
5.2 Interactive Debugging Systems 135
5.2.1Debugging Functions and Capabilities 135
5.2.2 Relationship with Other Parts of the System 137
5.2.3User-Interface Criteria 137

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UNIT-I
Introduction to System Software and Machine architecture – Simplified Instructional Computer
(SIC)-Traditional machines-VAX Architecture-Pentium Pro Architecture- RISC machines.

1.1 INTRODUCTION
SYSTEM SOFTWARE
The Software is set of instructions or programs written to carry out certain task on digital
computers. It is classified into system software and application software. System software consists of a
variety of programs that support the operation of a computer. Application software focuses on an
application or problem to be solved. System software consists of a variety of programs that support the
operation of a computer.
Examples for system software are Operating system, compiler, assembler, macro processor,
loader or linker, debugger, text editor, database management systems (some of them) and, software
engineering tools. These software’s make it possible for the user to focus on an application or other
problem to be solved, without needing to know the details of how the machine works internally.

1.2 SYSTEM SOFTWARE AND MACHINE ARCHITECTURE

One characteristic in which most system software differs from application software is machine
dependency.
System software supports operation and use of computer. Application software provides
solution to a problem. Assembler translates mnemonic instructions into machine code. The instruction
formats, addressing modes etc., are of direct concern in assembler design. Similarly,
Compilers must generate machine language code, taking into account such hardware
characteristics as the number and type of registers and the machine instructions available. Operating
systems are directly concerned with the management of nearly all of the resources of a computing
system.
There are aspects of system software that do not directly depend upon the type of computing
system, general design and logic of an assembler, general design and logic of a compiler and code
optimization techniques, which are independent of target machines. Likewise, the process of linking
together independently assembled subprograms does not usually depend on the computer being used.

1.3 THE SIMPLIFIED INSTRUCTIONAL COMPUTER (SIC)

Simplified Instructional Computer (SIC) is a hypothetical computer that includes the hardware
features most often found on real machines. There are two versions of SIC, they are, standard model
(SIC), and, extension version (SIC/XE) (extra equipment or extra expensive).

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1.3.1 SIC MACHINE ARCHITECTURE

We discuss here the SIC machine architecture with respect to its Memory and Registers, Data
Formats, Instruction Formats, Addressing Modes, Instruction Set, Input and Output

Memory
There are 215 bytes in the computer memory, which is 32,768 bytes. It uses Little Endian format to
store the numbers, 3 consecutive bytes form a word, and each location in memory contains 8-bit bytes.

Registers:
There are five registers, each 24 bits in length. Their mnemonic, number and use are given in the
following table.

Mnemonic Number Use

A 0 Accumulator; used for
arithmetic operations
X 1 Index register; used
for addressing
L 2 Linkage register;
JSUB
PC 8 Program counter
SW 9 Status word, including
CC

Data Formats:
Integers are stored as 24-bit binary numbers. 2’s complement representation is used for negative values,
characters are stored using their 8-bit ASCII codes. No floating-point hardware on the standard version
of SIC.

Addressing Modes:

Mode Indication Target address

calculation
Direct x=0 TA = address
Indexed x=1 TA = address + (x)

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There are two addressing modes available, which are as shown in the above table. Parentheses
are used to indicate the contents of a register or a memory location.

Instruction Set
SIC provides, load and store instructions (LDA, LDX, STA, STX, etc.). Integer arithmetic
operations: (ADD, SUB, MUL, DIV, etc.).
All arithmetic operations involve register A and a word in memory, with the result being
left in the register. Two instructions are provided for subroutine linkage.
COMP compares the value in register A with a word in memory, this instruction sets a
condition code CC to indicate the result. There are conditional jump instructions: (JLT, JEQ, JGT),
these instructions test the setting of CC and jump accordingly.
JSUB jumps to the subroutine placing the return address in register L, RSUB returns by
jumping to the address contained in register L.

Input and Output

Input and Output are performed by transferring 1 byte at a time to or from the rightmost 8 bits
of register A (accumulator). The Test Device (TD) instruction tests whether the addressed device is
ready to send or receive a byte of data. Read Data (RD), Write Data (WD) are used for reading or
writing the data.

Data movement and Storage Definition

LDA, STA, LDL, STL, LDX, STX (A- Accumulator, L – Linkage Register, X – Index
Register), all uses3-byte word. LDCH, STCH associated with characters uses 1-byte. There are no
memory-memory move instructions.
Storage definitions are
WORD - ONE-WORD CONSTANT

RESW - ONE-WORD VARIABLE

BYTE - ONE-BYTE CONSTANT

RESB - ONE-BYTE VARIABLE

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1.3.2 EXAMPLE PROGRAMS (SIC)

Example 1: Simple data and character movement operation

LDA FIVE
STA ALPHA
LDCH CHARZ
STCH C1
ALPHA RESW 1
FIVE WORD 5
CHARZ BYTE C’Z’
C1 RESB 1

Example 2: Arithmetic operations

LDA ALPHA
ADD INCR
SUB ONE
STA BETA
……..
……..
……..
ONE WORD 1
ALPHA RESW 1
BETA RESW 1
INCR RESW 1

Example 3: Looping and Indexing operation

LDX ZERO ;X=0

MOVECH LDCH STR1, X; LOAD A FROM STR1
STCH STR2, X; STORE A TO STR2
TIX ELEVEN; ADD 1 TO X, TEST
JLT MOVECH
.
.
.

STR1 BYTE C ‘HELLO WORLD’

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STR2 RESB 11
ZERO WORD 0
ELEVEN WORD 11

Example 4: Input and Output operation

INLOOP TD INDEV : TEST INPUT DEVICE

JEQ INLOOP : LOOP UNTIL DEVICE IS READY
RD INDEV : READ ONE BYTE INTO A
STCH DATA : STORE A TO DATA
.
.
OUTLP TD OUTDEV : TEST OUTPUT DEVICE
JEQ OUTLP : LOOP UNTIL DEVICE IS READY
LDCH DATA : LOAD DATA INTO A
WD OUTDEV : WRITE A TO OUTPUT DEVICE
.
.
INDEV BYTE X ‘F5’ : INPUT DEVICE NUMBER
OUTDEV BYTE X ‘08’ : OUTPUT DEVICE NUMBER
DATA RESB 1 : ONE-BYTE VARIABLE

Example 5: To transfer two hundred bytes of data from input device to memory

LDX ZERO
CLOOP TD INDEV
JEQ CLOOP
RD INDEV
STCH RECORD, X
TIX B200
JLT CLOOP
.
.
INDEV BYTE X ‘F5’
RECORD RESB 200
ZERO WORD 0
B200 WORD 200

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1.3.3 SIC/XE MACHINE ARCHITECTURE

Memory

Maximum memory available on a SIC/XE system is 1 Megabyte (220 bytes).

Registers

Additional B, S, T, Number Special use

and F registers are
provided by SIC/XE,
in addition to the
registers of SIC.
Mnemonic
B 3 Base register
S 4 General working
register
T 5 General working
register
F 6 Floating-point
accumulator (48 bits)

Instruction Formats

The new set of instruction formats for SIC/XE machine architecture are as follows.
Format 1 (1 byte): contains only operation code (straight from table).

Format 2 (2 bytes): first eight bits for operation code, next four for register 1 and following
four for register 2. The numbers for the registers go according to the numbers indicated at the
registers section (ie, register T is replaced by hex 5, F is replaced by hex 6).

Format 3 (3 bytes): First 6 bits contain operation code, next 6 bits contain flags, last 12 bits
contain displacement for the address of the operand. Operation code uses only 6 bits, thus the
second hex digit will be affected by the values of the first two flags (n and i). The flags, in
order, are: n, i, x, b, p, and e. its functionality is explained in the next section. The last flag e
indicates the instruction format (0 for 3 and 1 for 4).

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Format 4 (4 bytes): same as format 3 with an extra 2 hex digits (8 bits) for addresses that require
more than 12 bits to be represented.

Format 1 (1 byte)

8
op

Format 2 (2 bytes)
Formats 1 and 2 are instructions do not reference memory at all
8 4 4
op r1 r2

Format 3 (3 bytes)

6 1 1 1 1 1 1 12
op n i x b p e disp

Format 4 (4 bytes)

6 1 1 1 1 1 1 20
Op n i x b p e address

Addressing modes & Flag Bits

Five possible addressing modes plus the combinations are as follows.
Direct (x, b, and p all set to 0): operand address goes as it is. n and i are both set to the same value,
either 0 or 1. While in general that value is 1, if set to 0 for format 3 we can assume that the rest of the
flags (x, b, p, and e) are used as a part of the address of the operand, to make the format compatible to
the SIC format.
Relative (either b or p equal to 1 and the other one to 0): the address of the operand should be added to
the current value stored at the B register (if b = 1) or to the value stored at the PC register (if p = 1)
Immediate (i = 1, n = 0): The operand value is already enclosed on the instruction (i.e. lies on the last
12/20 bits of the instruction)

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Indirect (i = 0, n = 1): The operand value points to an address that holds the address for the operand
value.

Indexed (x = 1): value to be added to the value stored at the register x to obtain real address of the
operand. This can be combined with any of the previous modes except immediate mode.

The various flag bits used in the above formats have the following meanings
e - > e = 0 means format 3, e = 1 means format 4.

Bits x, b, p: Used to calculate the target address using relative, direct, and indexed addressing
Modes.
Bits i and n: Says, how to use the target address.
b and p - both set to 0, disp field from format 3 instruction is taken to be the target address. For a
format 4 bits b and p are normally set to 0, 20 bit address is the target address
x - x is set to 1, X register value is added for target address calculation
i=1, n=0 Immediate addressing, TA: TA is used as the operand value, no memory reference
i=0, n=1 Indirect addressing, ((TA)): The word at the TA is fetched. Value of TA is taken as the
address of the operand value
i=0, n=0 or i=1, n=1 simple addressing, (TA): TA is taken as the address of the operand value. Two
new relative addressing modes are available for use with instructions assembled using format
3.

Mode Indication Target address calculation

Base relative b=1,p=0 TA=(B)+ disp
(0<=disp <=4095)
Program-counter relative b=0,p=1 TA=(PC)+ disp
(-2048<=disp <=2047)

Instruction Set

SIC/XE provides all of the instructions that are available on the standard version. In addition
we have, Instructions to load and store the new registers LDB, STB, etc, Floating-point arithmetic
operations, ADDF, SUBF, MULF, DIVF, Register move instruction: RMO, Register-to-register
arithmetic operations, ADDR, SUBR, MULR, DIVR and, Supervisor call instruction : SVC.

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Input and Output

There are I/O channels that can be used to perform input and output while the CPU is executing other
instructions. Allows overlap of computing and I/O, resulting in more efficient system operation. The
instructions SIO, TIO, and HIO are used to start, test and halt the operation of I/O channels. Example
Programs (SIC/XE)

Example 1: Simple data and character movement operation

LDA #5
STA ALPHA
LDA #90
STCH C1
.
.
ALPHA RESW 1
C1 RESB 1

Example 2: Arithmetic operations

LDS INCR
LDA ALPHA
ADD S, A
SUB #1
STA BETA
………….
…………..
ALPHA RESW 1
BETA RESW 1
INCR RESW 1

Example 3: Looping and Indexing operation

LDT #11
LDX #0 :X=0
MOVECH LDCH STR1, X : LOAD A FROM STR1

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STCH STR2, X : STORE A TO STR2

TIXR T : ADD 1 TO X, TEST (T)
JLT MOVECH
……….
……….
………
STR1 BYTE C ‘HELLO WORLD’
STR2 RESB 11

1.4 CISC ARCHITECTURE-VAX ARCHITECTURE

The VAX family of computer was introduced by Digital Equipment Corporation in 1978.

A compatibility mode was provided at the hardware level so the many PDP – II program
could run unchanged on the VAX.

Memory: 232 bytes in virtual address space

– consists of 8-bit bytes:
word: 2 bytes
longword: 4 bytes
quadword: 8 bytes
octaword: 16 bytes
– The virtual memory allow program to operate as though they had access to an
extremely large memory regardless of the amount of memory actually present in the
system.
– can be divided into
System space (OS and shared space)
Process space (defined separately for each process)
32-bit registers

16 general-purpose registers
R0-R11: no special functions
R12 - AP: argument pointer (address of arguments when making a procedure
call)
FP: frame pointer (address of the stack frame when making a procedure call)
R14 - SP: stack pointer (top of stack in program’s process space)
R15 - PC: program counter
PSL: processor status long word
Control registers to support OS

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Data formats
– Characters: 8-bit ASCII codes
– Integers:
2, 4, 8, 16-byte binary numbers
2’s complement for negative values
– Floating-point numbers:
4 different floating-point data ranging in length from 4 to 16 bytes
– Packed decimal data format
Each byte represents two decimal digits
– Numeric format
To represent numeric values with one digit per byte
– Queues and variable-length bit strings
– VAX processor provide a packed decimal data format in each byte represent two
decimal digit, which each digit encoded using 4 bits of the byte.
– The sign is encoded in the last 4 bits

Instruction formats
– Variable-length instruction format
– Each instruction consists of
OP code (1 or 2 bytes)
Up to 6 operand specifiers (depends on instruction)
Addressing modes
– Register mode
– Register deferred mode
– Auto increment and auto decrement modes
– Base relative modes
– PC relative modes
– Index modes
– Indirect modes
– Immediate mode
Instruction set
– Mnemonics format (e.g., ADDW2, MULL3)
Prefix: type of operation
Suffix: data type of the operands
Modifier: number of operands involved

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– In addition to computation, data movement and conversion, comparison, branching,

VAX provides instructions that are hardware realizations of frequently occurring
sequences of codes
Load and store multiple registers
Manipulate queues and variable-length bit fields
Powerful instructions for calling and returning from procedure

Input and output

– Each I/O device has a set of registers, which are assigned locations in the physical
address space, called I/O space.
– Association of these registers with addresses in I/O space is handled by memory
management routines.
– Device driver read/write values into these registers.
– Software routines read/write values in I/O space using standard instructions.

1.5 CISC ARCHITECTURE-PENTIUM PRO ARCHITECTURE

Introduction
The Pentium pro architecture is introduced near the end of 1995. Is the latest in the Intel X86
families, other recent microprocessors in this family are 80486 and Pentium Processors of the x86
family are presented used in a majority of personal computer, and there is a vast amount of software for
this processor

Memory: virtual memory

– consists of 8-bit bytes:
word: 2 bytes
double-word: 4 bytes
– can be divided into a collection of segments with different sizes
Code, data, and stack segments
Each segment can be divided into pages
Segment/offset address is automatically translated into a physical byte
address by Memory Management Unit.
32-bit registers
– 8 general-purpose registers
EAX, EBX, ECX, EDX: data manipulation
ESI, EDI, EBP, ESP: addresses

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– EIP: pointer to the next instruction

– FLAGS: processor status and calculation results(32-bit)
16-bit registers
– segment registers
– CS(contain address currently executing code segment and System Software),
– SS, DS, ES, FS, GS(indicate address of data segments)
80-bit registers
– 8 80-bit registers for FPU

Data formats
– The x86 architecture provided for the storage of integer floating point value character
and strings.
– Characters: 8-bit ASCII codes
– Integers:
1, 2, 4-byte binary numbers (8-byte signed integers for FPU)
2’s complement for negative values
Little-endian byte ordering
Binary coded decimal (packed or unpacked BCD)
– Floating-point numbers:
Single-precision: 32 bits
Double-precision: 64 bits
Extended-precision: 80 bits

– The single Pentium format 32 bit long. It store 24 significant bit of floating point value
and allow for 7 bit exponent
– The double precision format 64-bit long. It store 53 significant bit of floating point
value and allow for 10 bit exponent.

Instruction formats
– Variable-length instruction format (1-10 bytes)
– Each instruction consists of
Optional prefixes containing flags that modify the operation of the instruction
E.g., repetition count, segment register specification
OP code (1 or 2 bytes)
A number of bytes for operands and addressing modes

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Addressing modes
– The x86 architecture provides a large number of addressing mode. An operand value
may be specified as part of the instruction itself or it may be register
– Immediate mode
– Register mode
– Base relative mode
– PC relative mode
– Index mode
– Direct mode
– Etc
– Operands stored memory often specified using variation of general target address
calculation.
– TA = (base register) + (index register) * (scale factor) + displacement

Instruction set (>400 instructions)

– The x86 architecture has large and complete instruction set containing more than 400
different machine instructions.
– An instruction may have 0, 1, 2, or 3 operands
– Register-to-register, register-to-memory, and memory-to-memory instructions
– Special-purpose instructions that are frequently required in high-level languages, e.g.,
entering and leaving procedures, checking the bounds of an array

Input and output

– I/O instructions that transfer one byte, word, or double-word from an I/O device into
register EAX, or vice versa.
– Repetition prefixes can be used to transfer an entire string in a single operation.
–
1.6 RISC MACHINES

Ultra SPARC Architecture

The ULTRA SPARC processor announced by sun micro system in 1995, is latest
member of SPARC family other member of this family include a variety SPARC and super SPARC
processors.

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The original SPARC Architecture developed in mid 1980s, and has been implemented
by a number of manufacturers. The name SPARC stands for Scalable Processor ARChitecture.

Memory: 264 bytes in virtual address space

– consists of 8-bit bytes:
halfword: 2 bytes
word: 4 bytes
doubleword: 8 bytes
– can be divided into pages
Virtual address is automatically translated into a physical address by the
UltraSPARC Memory Management Unit.
large register file (>100 general-purpose registers)
– 32 bits for original SPARC, 64 bits for UltraSPARC
– Each procedure can access only 32 registers
8 global registers
24 registers in overlapped window
A file of 64 double-precision floating-point registers for FPU.
Program counter PC
R0 – R7 – global
R8 – R15 – calling procedure physically the same register
R24 – R31 – called procedure. This facilitates the passing parameter.
– The SPARC hardware manages windows into register file.
– If a set concurrently running procedure need more windows that physically available
“window overflow” interrupt occurs.
– The floating point computation performed using a special floating point unit (FFU)

Data formats
– The ultra SPARC architecture provides for storage integer floating point value and
characters.
– Characters: 8-bit ASCII codes
– Integers:
1, 2, 4, 8-byte binary numbers
2’s complement for negative values

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Big- and little-endian and byte ordering

– Floating-point numbers:
Single-precision: 32 bits
Double-precision: 64 bits
Quad-precision: 80 bits
Instruction formats
– Fix-length instruction format (32 bits long)
Can speed the process of instruction fetching and decoding
– 3 basic instruction formats
Call instruction
Branch instruction
Register loads and stores, and three-operands arithmetic operations
– Each instruction consists of
First 2 bits: identify formats
OP code
Operands

Addressing modes
– Immediate mode
– Register direct mode
– PC relative mode only for branch instructions
– Register indirect with displacement
– Register indirect indexed

Instruction set (<100 instructions)

– Register-to-register instructions
– Load and store instructions (only instructions that access memory)
Instruction execution is pipelined.
Branch instructions are delayed branches
– Instructions immediately following the branch instruction is actually executed before
the branch is taken.
Input and output
– A range of memory locations is logically replaced by device registers.
– Device driver read/write values into these registers.
– Software routines read/write values in this area using standard instructions.

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RISC MACHINE-POWER PC ARCHITECTURE

• POWER stands for Performance Optimization with Enhanced RISC

History
» IBM (1990) introduced POWER in 1990 with RS/6000
» IBM, Apple, and Motorola formed an alliance to develop PowerPC in 1991
» The first products were delivered near the end of 1993
» Recent implementations include PowerPC 601, 603, 604

• Memory
» halfword, word, doubleword, quadword
» may instructions may execute more efficiently if operands are aligned at a
starting address that is a multiple of their length
» virtual space 264 bytes
» fixed-length segments, 256 MB
» fixed-length pages, 4KB
» MMU: virtual address -> physical address
• Registers
» 32 general-purpose registers, GPR0~GPR31
» FPU
» condition code register reflects the result of certain operations, and can be used
as a mechanism for testing and branching
» Link Register (LR) and Count Register (CR) are used by some branch
instructions
» Machine Status Register (MSR)
• Data Formats
» integers are 8-, 16-, 32-, 64-bit binary numbers
» 2’s complement is used for negative values
» support both big-endian (default) and little-endian byte orderings
» three different floating-point data formats
l single-precision, 32 bits long (23 + 8 + 1)
l double-precision, 64 bits long (52 + 11 + 1)
» characters are stored using 8-bit ASCII codes
• Seven Instruction Formats
» 32 bits long
» the first 6 bits identify specify the opcode
» some instruction have an additional extended opcode
» the complexity is greater than SPARC
» fixed-length makes decoding faster and simple than VAX and x86
 • Addressing Modes
» immediate mode, register direct mode
» memory addressing
Mode Target address calculation
Register indirect TA=(register)
Register indirect with indexed TA=(register-1)+(register-2)
Register indirect with TA=(register)+displacement {16 bits,
signed}immediate indexed
» branch instruction
» Mode Target address calculation
Absolute TA= actual address
Relative TA= current instruction address +
displacement {25 bits, signed}
Link Register TA= (LR)
Count Register TA= (CR)
• Instruction Set
» 200 machine instructions
– more complex than most RISC machines
– e.g. floating-point “multiply and add” instructions that take three input
operands
– e.g. load and store instructions may automatically update the index
register to contain the just-computed target address
» pipelined execution
– more sophisticated than SPARC
» branch prediction
• Input and Output
» two different modes
– direct-store segment: map virtual address space to an external address
space
– normal virtual memory access
CRAY T3E ARCHITECTURE
• T3E
» 16~2048 processing elements (PE)
» three-dimensional network
» each PE consists of a DEC Alpha EV5 RISC microprocessor, local memory,
and performance-accelerating control logic.
• Local Memory
» 64MB ~ 2GB
 » physically distributed, logically shared memory
» byte, word, longword, quadword
» 64-bit virtual addresses
• Registers
» 32 general-purpose registers, GPR0~GPR31
» 32 floating-point registers, F0~F31
▪ F31 always contain the value zero
» program counter PC
» other status and control registers
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Two Marks Questions

1. Define system software.

It consists of variety of programs that supports the operation of the computer. This software
makes it possible for the user to focus on the other problems to be solved without needing to know how
the machine works internally.
E.g.: operating system, assembler, and loader.

2. Give some applications of operating system.

to make the computer easier to use
to manage the resources in computer
process management
data and memory management
To provide security to the user.
Operating system acts as an interface between the user and the system Eg: windows, Linux, UNIX,
dos

3. Define compiler and interpreter.

Compiler is a set of program which converts the whole high level language program to
machine language program.
Interpreter is a set of programs which converts high level language program to machine
language program line by line.

4. Define loader.
Loader is a set of program that loads the machine language translated by the translator into the
main memory and makes it ready for execution.

5. What is the need of MAR register?

MAR (memory address register) is used to store the address of the memory from which the
data is to be read or to which the data is to be written.

6. Draw SS instruction format.

It is a 6 byte instruction used to move L+I bytes data from the storage location1 to the storage
location2.
Storage location1 = D1+ [B1]
Storage location2 = D2+ [B2]
Eg: MOV 60,400(3), 500(4)

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7. Give any two difference between base relative addressing and program counter relative
addressing used in SIC/XE.

8. Define indirect addressing

In the case of immediate addressing the operand field gives the memory location. The word
from the given address is fetched and it gives the address of the operand.
Eg: ADD R5, [600]
Here the second operand is given in indirect addressing mode. First the word in memory
location 600 is fetched and which will give the address of the operand.

9. Define immediate addressing.

In this addressing mode the operand value is given directly. There is no need to refer memory.
The immediate addressing is indicated by the prefix ‘#’.
Eg: ADD #5
In this instruction one operand is in accumulator and the second operand is an immediate value
the value 5 is directly added with the accumulator content and the result is stored in accumulator.

List out any two CISC and RISC machine.

CISC –Power PC, Cray T3E
RISC – VAX, Pentium Pro architecture

Following is a memory configuration:

Address Value Register R
1 5 5
7
5
10. What is the result of the following statement?
ADD 6(immediate) to R (indirect)

Here 6 is the immediate data and the next value is indirect data.ie the register contains the
address of the operand. Here the address of the operand is 5 and its corresponding value is 7.
6 + [R] = 6+ [5] = 6+ 7 =13

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Following is a memory configuration:

Address Value Register R
4 9 6
7
2
11. What is the result of the following statement?
SUB 4(direct) to R (direct)
Here one operand is in the address location 4(direct addressing) and the next operand is in the
register (register direct).
The resultant value is 9 –6 =3.

12. What is the name of X and L register in SIC machine and also specify its
use. A-accumulator
Used for arithmetic operation.ie in the case of arithmetic operations one operand is in the
Accumulator and other operand may be an immediate value, register operand or memory content. The
operation given in the instruction is performed and the result is stored in the accumulator register.
L-linkage register
It is used to store the return address in the case of jump to subroutine (JSUB) instructions.

13. What are the instruction formats used in SIC/XE architecture? Give any one format.
Format 1 (1 byte), Format 2 (2 bytes), Format 3 (3 bytes) & Format 4(4 bytes)
Are the different instructions used in SIC/XE
architecture? Format 2:

Consider the instructions in SIC/ XE programming

10 1000 LENGTH RESW 4
20 ----- NEW WORD 3
14.What is the value assign to the symbol NEW?
In the line 10 the address is 1000 and the instruction is RESW 4.It reserves 4 word (3 x 4=12)
area for the symbol LENGTH. Hence 12 is added to the LOCCTR. Thus the value of the symbol
NEW is 1000+12 =100C.

16. What is the difference between the instructions LDA # 3 and LDA THREE?
In the first instruction immediate addressing is used. Here the value 3 is directly loaded into the
accumulator register.
In the second instruction the memory reference is used. Here the address (address assigned for
the symbol THREE) is loaded into the accumulator register.

17. Differentiate trailing numeric and leading separate numeric.

The numeric format is used to represent numeric values with one digit per byte. In the numeric
format if the sign appears in the last byte it is known as the trailing numeric. If the sign appears in a
separate byte preceding the first digit then it is called as leading separate numeric.

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18. What are the addressing modes used in VAX architecture?

Register direct, register deferred, auto increment and decrement, program counter relative, base
relative, index register mode and indirect addressing are the various addressing modes in VAX
architecture.

How do you calculate the actual address in the case of register indirect with immediate index
mode?
Here the target address is calculated using the formula
T.A = (register) + displacement.

Write the sequence of instructions to perform the operation BETA = ALPHA + 1 using SIC
instructions.

Write the sequence of instructions to perform the operation BETA = ALPHA+5 using SIC/XE
instructions.

What is the use of TD instruction in SIC architecture?

The test device (TD) instruction tests whether the addressed device is ready to send or receive
a byte of data. The condition code is set to indicate the result of this test. Setting of < means the device
is ready to send or receive, and = means the device is not ready.

23. Define Assembler.

Assembler is a translator from human readable (ASCII text) files of machine instructions into
the actual binary code (object files) of a machine.

23. Define Loader.

Loader is a program that performs the functions of loading and linkage editing. The process of
loading consists of taking re-locatable machine code, altering the re-locatable address and lacing the
altered instruction and data in memory at the proper location.

24. Define Preprocessor. What are its functions?

Program that processes the source code before the compiler sees it. Usually, it implements
macro expansion, but it can do much more. The functions of a preprocessor are:
Macro processing.
File inclusion.
Rational preprocessors.
Language extensions

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25. Define Debugger.

Debugger is a program to help you see what is going on when your program runs.
It can print the values of variables, show what procedure called what procedure to get where you are,
run up to a particular line, run until a particular variables gets a special value etc.

26. What is front-end and back-end of the compiler?

Often the phases of a compiler are collected into a front-end and back-end.
Front-end consists of those phases that depend primarily on the source program and largely
independent of the target machine. Back-end consists of those phases that depend on the target machine
language and generally those portions do not depend on the source language, just the intermediate
language. In back end we use aspects of code optimization, code generation, along with error handling
and symbol table operations.

27. Define Passes.

In an implementation of a compiler, portion of one or more phases are combined into a module
called pass. A pass reads the source program or the output of the previous pass, makes the transformation
specified by its phases and writes output into an intermediate file, which is read by subsequent pass.

28. Define syntax and semantics.

The rules and regulations used to form a language are known as syntax. The meaning given to
a programming construct is known as semantics.

What are the classifications of a compiler?

The classifications of compiler are:
Single-pass compiler.
Multi-pass compiler.
Load and go compiler.
Debugging compiler.
Optimizing compiler.

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Unit-II
Assemblers: Basic assembler functions- machine – dependent and machine independent assembler
features – Assembler design – Two-pass assembler with overlay structure- one – pass assembler and
multi - pass assembler. Interpreters: Virtual Machine concept- Java Byte Codes- Microsoft
Intermediate Language

2.1 BASIC ASSEMBLER FUNCTIONS

The basic assembler functions are:
Translating mnemonic language code to its equivalent object code.
Assigning machine addresses to symbolic labels.
The design of assembler can be to perform the following:
Scanning (tokenizing)
Parsing (validating the instructions)
Creating the symbol table
Resolving the forward references
Converting into the machine language

SIC Assembler Directive

START: Specify name & starting address.
END: End of the program, specify the first execution instruction.
BYTE, WORD, RESB, RESW
End of record: a null char(00)
End of file: a zero length record

The design of assembler in other words

Convert mnemonic operation codes to their machine language equivalents
Convert symbolic operands to their equivalent machine addresses
Decide the proper instruction format Convert the data constants to internal
machine representations
Write the object program and the assembly listing

So for the design of the assembler we need to concentrate on the machine architecture of
the SIC/XE machine. We need to identify the algorithms and the various data structures to be used.
According to the above required steps for assembling the assembler also has to handle

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assembler directives, these do not generate the object code but directs the assembler to perform
certain operation. These directives are:
The assembler design can be done:
Single pass assembler

Multi-pass assembler

Single-pass Assembler
In this case the whole process of scanning, parsing, and object code conversion is done in
single pass. The only problem with this method is resolving forward reference. This is shown with
an example below:
10 1000 FIRST STL RETADR 141033
--
--
--
--
95 1033 RETADR RESW 1

In the above example in line number 10 the instruction STL will store the linkage register
with the contents of RETADR. But during the processing of this instruction the value of this symbol
is not known as it is defined at the line number 95. Since I single-pass assembler the scanning,
parsing and object code conversion happens simultaneously. The instruction is fetched; it is
scanned for tokens, parsed for syntax and semantic validity. If it valid then it has to be converted
to its equivalent object code. For this the object code is generated for the opcode STL and the value
for the symbol RETADR need to be added, which is not available.
Due to this reason usually the design is done in two passes. So a multi-pass assembler
resolves the forward references and then converts into the object code. Hence the process of the
multi-pass assembler can be as follows:

Pass-1
Assign addresses to all the statements

Save the addresses assigned to all labels to be used in Pass-2

Perform some processing of assembler directives such as RESW, RESB to find the length of
data areas for assigning the address values.

Defines the symbols in the symbol table(generate the symbol table)

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Pass-2
Assemble the instructions (translating operation codes and looking up addresses).

Generate data values defined by BYTE, WORD etc.

Perform the processing of the assembler directives not done during pass-1.

Write the object program and assembler listing.

Assembler Design:
The most important things which need to be concentrated is the generation of Symbol
table and resolving forward references.

Symbol Table
This is created during pass 1

All the labels of the instructions are symbols

Table has entry for symbol name, address value.

Forward reference
Symbols that are defined in the later part of the program are called forward
referencing.

There will not be any address value for such symbols in the symbol table in pass 1.

Example Program
The example program considered here has a main module, two subroutines
Purpose of example program
Reads records from input device (code F1)
Copies them to output device (code 05)
At the end of the file, writes EOF on the output device, then RSUB to the operating system
Data transfer (RD, WD)
A buffer is used to store record
Buffering is necessary for different I/O rates
The end of each record is marked with a null character (00)16
The end of the file is indicated by a zero-length record
Subroutines (JSUB, RSUB)
RDREC, WRREC
-Save link register first before nested jump

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The first column shows the line number for that instruction, second column shows the addresses
allocated to each instruction. The third column indicates the labels given to the statement, and is
followed by the instruction consisting of opcode and operand. The last column gives the equivalent
object code.
The object code later will be loaded into memory for execution. The simple object program we
use contains three types of records:
Header record
Col. 1 H
Col. 2~7 Program name
Col. 8~13 Starting address of object program (hex)
Col. 14~19 Length of object program in bytes (hex)
Text record
Col. 1 T
Col. 2~7 Starting address for object code in this record (hex).
Col. 8~9 Length of object code in this record in bytes (hex)

Col. 10~69 Object code, represented in hex (2 col. per byte)

End record

Col.1 E
Col.2~7 Address of first executable instruction in object program (hex) “^” is only for
separation only

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2.1.1 Simple SIC Assembler

The program below is shown with the object code generated. The column named LOC gives
the machine addresses of each part of the assembled program (assuming the program is starting at
location 1000). The translation of the source program to the object program requires us to accomplish
the following functions:
Convert the mnemonic operation codes to their machine language equivalent.

Convert symbolic operands to their equivalent machine addresses.

Build the machine instructions in the proper format.

Convert the data constants specified in the source program into their internal machine
representations in the proper format.

Write the object program and assembly listing.

All these steps except the second can be performed by sequential processing of the source
program, one line at a time. Consider the instruction

10 1000 LDA ALPHA 00-----

This instruction contains the forward reference, i.e. the symbol ALPHA is used is not yet
defined. If the program is processed (scanning and parsing and object code conversion) is done line-by-
line, we will be unable to resolve the address of this symbol. Due to this problem most of the assemblers
are designed to process the program in two passes.

In addition to the translation to object program, the assembler has to take care of handling
assembler directive. These directives do not have object conversion but gives direction to the
assembler to perform some function. Examples of directives are the statements like BYTE and
WORD, which directs the assembler to reserve memory locations without generating data values.
The other directives are START which indicates the beginning of the program and END indicating
the end of the program.
The assembled program will be loaded into memory for execution. The simple object
program contains three types of records: Header record, Text record and end record. The header
record contains the starting address and length. Text record contains the translated instructions and
data of the program, together with an indication of the addresses where these are to be loaded. The
end record marks the end of the object program and specifies the address where the execution is to
begin.

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The format of each record is as given below.

Header record
Col 1 H
Col. 2-7 Program name
Col 8-13 Starting address of object program (hexadecimal)
Col 14-19 Length of object program in bytes (hexadecimal)
Text record
Col. 1 T
Col 2-7. Starting address for object code in this record (hexadecimal)
Col 8-9 Length off object code in this record in bytes (hexadecimal)
Col 10-69 Object code, represented in hexadecimal (2 columns per byte of object code)
End record
Col. 1 E
Col 2-7 Address of first executable instruction in object program (hexadecimal)

The assembler can be designed either as a single pass assembler or as a two pass assembler.
The general description of both passes is as given below:

Pass 1 (define symbols)

Assign addresses to all statements in the program

Save the addresses assigned to all labels for use in Pass 2

Perform assembler directives, including those for address assignment, such as BYTE and
RESW
Pass 2 (assemble instructions and generate object program)
Assemble instructions (generate opcode and look up addresses)

Generate data values defined by BYTE, WORD

Perform processing of assembler directives not done during Pass 1

Write the object program and the assembly listing

2.1.2. Algorithms and Data structure

The simple assembler uses two major internal data structures: the operation Code Table
(OPTAB) and the Symbol Table (SYMTAB).

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OPTAB
It is used to lookup mnemonic operation codes and translates them to their machine language
equivalents. In more complex assemblers the table also contains information about instruction
format and length.

In pass 1 the OPTAB is used to look up and validate the operation code in the source program. In
pass 2, it is used to translate the operation codes to machine language. In simple SIC machine
this process can be performed in either in pass 1 or in pass 2. But for machine like SIC/XE that
has instructions of different lengths, we must search OPTAB in the first pass to find the
instruction length for incrementing LOCCTR.

In pass 2 we take the information from OPTAB to tell us which instruction format to use in
assembling the instruction, and any peculiarities of the object code instruction.

OPTAB is usually organized as a hash table, with mnemonic operation code as the key. The hash
table organization is particularly appropriate, since it provides fast retrieval with a minimum of
searching. Most of the cases the OPTAB is a static table- that is, entries are not normally added
to or deleted from it. In such cases it is possible to design a special hashing function or other
data structure to give optimum performance for the particular set of keys being stored.
SYMTAB
This table includes the name and value for each label in the source program, together with flags to
indicate the error conditions (e.g., if a symbol is defined in two different places).

During Pass 1: labels are entered into the symbol table along with their assigned address value as they
are encountered. All the symbols address value should get resolved at the pass 1.

During Pass 2: Symbols used as operands are looked up the symbol table to obtain the address
value to be inserted in the assembled instructions.

SYMTAB is usually organized as a hash table for efficiency of insertion and retrieval. Since
entries are rarely deleted, efficiency of deletion is the important criteria for optimization.

Both pass 1 and pass 2 require reading the source program. Apart from this an intermediate file is
created by pass 1 that contains each source statement together with its assigned address, error
indicators, etc. This file is one of the inputs to the pass 2.

A copy of the source program is also an input to the pass 2, which is used to retain the operations
that may be performed during pass 1 (such as scanning the operation field for

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symbols and addressing flags), so that these need not be performed during pass 2. Similarly,
pointers into OPTAB and SYMTAB is retained for each operation code and symbol used. This
avoids need to repeat many of the table-searching operations.

LOCCTR
Apart from the SYMTAB and OPTAB, this is another important variable which helps in the
assignment of the addresses. LOCCTR is initialized to the beginning address mentioned in the START
statement of the program. After each statement is processed, the length of the assembled instruction is
added to the LOCCTR to make it point to the next instruction. Whenever a label is encountered in an
instruction the LOCCTR value gives the address to be associated with that label.

The Algorithm for Pass 1

Begin
read first input line
if OPCODE = ‘START’ then begin
save #[Operand] as starting addr
initialize LOCCTR to starting address
write line to intermediate file
read next line
end( if START)
else
initialize LOCCTR to 0
While OPCODE != ‘END’ do
begin
if this is not a comment line then
begin
if there is a symbol in the LABEL field then
begin
search SYMTAB for LABEL
if found then
set error flag (duplicate symbol)
else
(if symbol)
search OPTAB for OPCODE
if found then
add 3 (instr length) to LOCCTR

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else if OPCODE = ‘WORD’ then

add 3 to LOCCTR
else if OPCODE = ‘RESW’ then
add 3 * #[OPERAND] to LOCCTR
else if OPCODE = ‘RESB’ then
add #[OPERAND] to LOCCTR
else if OPCODE = ‘BYTE’ then
begin
find length of constant in bytes
add length to LOCCTR
end
else
set error flag (invalid operation code)
end (if not a comment)
write line to intermediate file
read next input line
end { while not END}
write last line to intermediate file
Save (LOCCTR – starting address) as program length
End {pass 1}

The algorithm scans the first statement START and saves the operand field (the address) as the
starting address of the program. Initializes the LOCCTR value to this address. This line is
written to the intermediate line.

If no operand is mentioned the LOCCTR is initialized to zero. If a label is encountered, the

symbol has to be entered in the symbol table along with its associated address value.

If the symbol already exists that indicates an entry of the same symbol already exists. So an error
flag is set indicating a duplication of the symbol.

It next checks for the mnemonic code, it searches for this code in the OPTAB. If found then the
length of the instruction is added to the LOCCTR to make it point to the next instruction.

If the opcode is the directive WORD it adds a value 3 to the LOCCTR. If it is RESW, it needs to
add the number of data word to the LOCCTR. If it is BYTE it adds a value one to the LOCCTR,
if RESB it adds number of bytes.

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If it is END directive then it is the end of the program it finds the length of the program by evaluating
current LOCCTR – the starting address mentioned in the operand field of the END directive.
Each processed line is written to the intermediate file.

The Algorithm for Pass 2

Begin
read 1st input line
if OPCODE = ‘START’ then
begin
write listing line
read next input line
end
write Header record to object program
initialize 1st Text record
while OPCODE != ‘END’ do
begin
if this is not comment line then
begin

search OPTAB for OPCODE

if found then
begin
if there is a symbol in OPERAND field then
begin
search SYMTAB for OPERAND field then
if found then
begin
store symbol value as operand address
else
begin
store 0 as operand address
set error flag (undefined symbol)
end
end (if symbol)
else store 0 as operand address
assemble the object code instruction
else if OPCODE = ‘BYTE’ or ‘WORD” then
convert constant to object code

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if object code doesn’t fit into current Text record then

begin
Write text record to object code
initialize new Text record
end
add object code to Text record end {if not
comment} write listing line read next input line end

write listing line

read next input line
write last listing line
End {Pass 2}

Here the first input line is read from the intermediate file. If the op code is START, then this
line is directly written to the list file. A header record is written in the object program which gives the
starting address and the length of the program (which is calculated during pass 1). Then the first text
record is initialized. Comment lines are ignored. In the instruction, for the op code the OPTAB is
searched to find the object code.
If a symbol is there in the operand field, the symbol table is searched to get the address value
for this which gets added to the object code of the op code. If the address not found then zero value is
stored as operands address. An error flag is set indicating it as undefined. If symbol itself is not found
then store 0 as operand address and the object code instruction is assembled.
If the op code is BYTE or WORD, then the constant value is converted to its equivalent object
code (for example, for character EOF, its equivalent hexadecimal value ‘454f46’ is stored). If the object
code cannot fit into the current text record, a new text record is created and the rest of the instructions
object code is listed. The text records are written to the object program. Once the whole program is
assemble and when the END directive is encountered, the End record is written.

Design and Implementation Issues

Some of the features in the program depend on the architecture of the machine. If the program
is for SIC machine, then we have only limited instruction formats and hence limited addressing modes.
We have only single operand instructions. The operand is always a memory reference. Anything to be
fetched from memory requires more time. Hence the improved version of SIC/XE machine provides
more instruction formats and hence more addressing modes. The moment we change the machine
architecture the availability of number of instruction formats and the addressing modes changes.
Therefore the design usually requires considering two things: Machine-dependent features and
Machine-independent features.

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2.2. MACHINE-DEPENDENT ASSEMBLER FEATURES

Instruction formats and addressing modes

Program relocation.

2.2.1 .Instruction formats and Addressing Modes

The instruction formats depend on the memory organization and the size of the memory. In SIC
machine the memory is byte addressable. Word size is 3 bytes. So the size of the memory is 212 bytes.
Accordingly it supports only one instruction format. It has only two registers: register A and Index
register. Therefore the addressing modes supported by this architecture are direct, indirect, and indexed.
Whereas the memory of a SIC/XE machine is 220 bytes (1 MB). This supports four different types of
instruction types, they are:
1 byte instruction

2 byte instruction

3 byte instruction

4 byte instruction
Instructions can be
Instructions involving register to register

Instructions with one operand in memory, the other in Accumulator (Single operand instruction)

Extended instruction format

Addressing Modes are
Index Addressing(SIC): Opcode m, x

Indirect Addressing: Opcode @m

PC-relative: Opcode m

Base relative: Opcode m

Immediate addressing: Opcode #c

Translations for the Instruction involving Register-Register addressing mode

During pass 1 the registers can be entered as part of the symbol table itself. The value for
these registers is their equivalent numeric codes. During pass2, these values are assembled along

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with the mnemonics object code. If required a separate table can be created with the register names and
their equivalent numeric values.
2. Translation involving Register-Memory instructions
In SIC/XE machine there are four instruction formats and five addressing modes. For formats
and addressing modes
Among the instruction formats, format -3 and format-4 instructions are Register-Memory type of
instruction. One of the operand is always in a register and the other operand is in the memory. The
addressing mode tells us the way in which the operand from the memory is to be fetched.
There are two ways: Program-counter relative and Base-relative. This addressing mode can be
represented by either using format-3 type or format-4 type of instruction format. In format-3, the
instruction has the opcode followed by a 12-bit displacement value in the address field. Where as in
format-4 the instruction contains the mnemonic code followed by a 20-bit displacement value in the
address field.
Program-Counter Relative
In this usually format-3 instruction format is used. The instruction contains the opcode followed
by a 12-bit displacement value.
The range of displacement values are from 0 -2048. This displacement (should be small enough
to fit in a 12-bit field) value is added to the current contents of the program counter to get the target
address of the operand required by the instruction.
This is relative way of calculating the address of the operand relative to the program counter.
Hence the displacement of the operand is relative to the current program counter value. The following
example shows how the address is calculated:

Base-Relative Addressing Mode

In this mode the base register is used to mention the displacement value. Therefore
the target address is
TA = (base) + displacement value

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This addressing mode is used when the range of displacement value is not sufficient. Hence the
operand is not relative to the instruction as in PC-relative addressing mode. Whenever this
mode is used it is indicated by using a directive BASE.
The moment the assembler encounters this directive the next instruction uses base-relative
addressing mode to calculate the target address of the operand.
When NOBASE directive is used then it indicates the base register is no more used to calculate the
target address of the operand. Assembler first chooses PC-relative, when the displacement field
is not enough it uses Base-relative.

LDB #LENGTH (instruction)

BASE LENGTH (directive)
:
NOBASE

For example
12 0003 LDB #LENGTH 69202D
13 BASE LENGTH
::
100 0033 LENGTH RESW 1
105 0036 BUFFER RESB 4096
::
160 104E STCH BUFFER, X 57C003
165 1051 TIXR T B850

In the above example the use of directive BASE indicates that Base-relative addressing mode
is to be used to calculate the target address. PC-relative is no longer used. The value of the LENGTH
is stored in the base register. If PC-relative is used then the target address calculated is:
The LDB instruction loads the value of length in the base register which 0033. BASE directive
explicitly tells the assembler that it has the value of LENGTH.

BUFFER is at location (0036)16

(B) = (0033)16
disp = 0036 – 0033 = (0003)16

20 000A LDA LENGTH 032026

::
175 1056 EXIT STX LENGTH 134000

Consider Line 175. If we use PC-relative

Disp = TA – (PC) = 0033 –1059 = EFDA

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PC relative is no longer applicable, so we try to use BASE relative addressing mode.

Immediate Addressing Mode
In this mode no memory reference is involved. If immediate mode is used the target
address is the operand itself.

If the symbol is referred in the instruction as the immediate operand then it is immediate with PC-
relative mode as shown in the example below:

Indirect and PC-relative mode

In this type of instruction the symbol used in the instruction is the address of the location which
contains the address of the operand. The address of this is found using PC-relative addressing mode.
For example:

The

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instruction jumps the control to the address location RETADR which in turn has the address of the
operand. If address of RETADR is 0030, the target address is then 0003 as calculated above.

2.2.2 Program Relocation

Sometimes it is required to load and run several programs at the same time. The system must
be able to load these programs wherever there is place in the memory. Therefore the exact starting is
not known until the load time.

Absolute Program
In this the address is mentioned during assembling itself. This is called Absolute Assembly.
Consider the instruction:
55 101B LDA THREE 00102D
This statement says that the register A is loaded with the value stored at location 102D. Suppose it
is decided to load and execute the program at location 2000 instead of location 1000.

Then at address 102D the required value which needs to be loaded in the register A is no more
available. The address also gets changed relative to the displacement of the program. Hence we
need to make some changes in the address portion of the instruction so that we can load and
execute the program at location 2000.
Apart from the instruction which will undergo a change in their operand address value as the
program load address changes. There exist some parts in the program which will remain same
regardless of where the program is being loaded.

Since assembler will not know actual location where the program will get loaded, it cannot
make the necessary changes in the addresses used in the program. However, the assembler
identifies for the loader those parts of the program which need modification.

An object program that has the information necessary to perform this kind of modification is
called the relocatable program.

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The above diagram shows the concept of relocation. Initially the program is loaded at location
0000. The instruction JSUB is loaded at location 0006.

The address field of this instruction contains 01036, which is the address of the instruction labeled
RDREC. The second figure shows that if the program is to be loaded at new location 5000.

The address of the instruction JSUB gets modified to new location 6036. Likewise the third figure
shows that if the program is relocated at location 7420, the JSUB instruction would need to be
changed to 4B108456 that correspond to the new address of RDREC.

The only part of the program that require modification at load time are those that specify direct
addresses. The rest of the instructions need not be modified. The instructions which doesn’t
require modification are the ones that is not a memory address (immediate addressing) and PC-
relative, Base-relative instructions.

From the object program, it is not possible to distinguish the address and constant the assembler
must keep some information to tell the loader. The object program that contains the
modification record is called a relocatable program.

For an address label, its address is assigned relative to the start of the program (START 0). The
assembler produces a Modification record to store the starting location and the length of

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the address field to be modified. The command for the loader must also be a part of the object
program. The Modification has the following format:

Modification record
Col. 1 M
Col. 2-7 Starting location of the address field to be modified, relative to the beginning of the
program (Hex)
Col. 8-9 Length of the address field to be modified, in half-bytes (Hex)

One modification record is created for each address to be modified The length is stored in half-
bytes (4 bits) The starting location is the location of the byte containing the leftmost bits of the address
field to be modified. If the field contains an odd number of half-bytes, the starting location begins in
the middle of the first byte.

In the above object code the red boxes indicate the addresses that need modifications. The
object code lines at the end are the descriptions of the modification records for those instructions which
need change if relocation occurs. M00000705 is the modification suggested for the statement at location
0007 and requires modification 5-half bytes. Similarly the remaining instructions indicate.

2.3 MACHINE-INDEPENDENT ASSEMBLER FEATURES

These are the features which do not depend on the architecture of the machine. These are:
Literals
Expressions
Program blocks
Control sections

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Literals
A literal is defined with a prefix = followed by a specification of the literal value.
Example:
45 001A ENDFIL LDA =C’EOF’ 032010
-
-
93 LTORG

002D * =C’EOF’ 454F46

The example above shows a 3-byte operand whose value is a character string EOF. The
object code for the instruction is also mentioned. It shows the relative displacement value of the
location where this value is stored. In the example the value is at location (002D) and hence the
displacement value is (010). As another example the given statement below shows a 1-byte literal
with the hexadecimal value ‘05’.

215 1062 WLOOP TD =X’05’ E32011

It is important to understand the difference between a constant defined as a literal and a constant
defined as an immediate operand. In case of literals the assembler generates the specified value as a
constant at some other memory location in immediate mode the operand value is assembled as part of
the instruction itself. Example

55 0020 LDA #03 010003

All the literal operands used in a program are gathered together into one or more literal pools.
This is usually placed at the end of the program. The assembly listing of a program containing literals
usually includes a listing of this literal pool, which shows the assigned addresses and the generated data
values. In some cases it is placed at some other location in the object program. An assembler directive
LTORG is used. Whenever the LTORG is encountered, it creates a literal pool that contains all the
literal operands used since the beginning of the program. The literal pool definition is done after LTORG
is encountered. It is better to place the literals close to the instructions.
A literal table is created for the literals which are used in the program. The literal table contains
the literal name, operand value and length. The literal table is usually created as a hash table on the
literal name.

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Implementation of Literals
During Pass-1:
The literal encountered is searched in the literal table. If the literal already exists, no action is
taken; if it is not present, the literal is added to the LITTAB and for the address value it waits till it
encounters LTORG for literal definition. When Pass 1 encounters a LTORG statement or the end of the
program, the assembler makes a scan of the literal table. At this time each literal currently in the table
is assigned an address. As addresses are assigned, the location counter is updated to reflect the number
of bytes occupied by each literal.

During Pass-2:
The assembler searches the LITTAB for each literal encountered in the instruction and replaces
it with its equivalent value as if these values are generated by BYTE or WORD. If a literal represents
an address in the program, the assembler must generate a modification relocation for, if it all it gets
affected due to relocation. The following figure shows the difference between the SYMTAB and
LITTAB

Symbol-Defining Statements

EQU Statement
Most assemblers provide an assembler directive that allows the programmer to define
symbols and specify their values. The directive used for this EQU (Equate). The general form of the
statement is

Symbol EQU value

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This statement defines the given symbol (i.e., entering in the SYMTAB) and assigning to it the
value specified. The value can be a constant or an expression involving constants and any other symbol
which is already defined. One common usage is to define symbolic names that can be used to improve
readability in place of numeric values. For example

+LDT #4096

This loads the register T with immediate value 4096, this does not clearly what exactly this value
indicates. If a statement is included as:
MAXLEN EQU 4096 and then
+LDT #MAXLEN
Then it clearly indicates that the value of MAXLEN is some maximum length value. When
the assembler encounters EQU statement, it enters the symbol MAXLEN along with its value in
the symbol table. During LDT the assembler searches the SYMTAB for its entry and its equivalent
value as the operand in the instruction. The object code generated is the same for both the options
discussed, but is easier to understand. If the maximum length is changed from 4096 to 1024, it is
difficult to change if it is mentioned as an immediate value wherever required in the instructions.
We have to scan the whole program and make changes wherever 4096 is used. If we mention this
value in the instruction through the symbol defined by EQU, we may not have to search the whole
program but change only the value of MAXLENGTH in the EQU statement (only once).
Another common usage of EQU statement is for defining values for the general-purpose
registers. The assembler can use the mnemonics for register usage like a-register A, X – index
register and so on. But there are some instructions which requires numbers in place of names in the
instructions. For example in the instruction RMO 0, 1 instead of RMO A, X. The programmer can
assign the numerical values to these registers using EQU directive.
A EQU 0
X EQU 1 and so on
These statements will cause the symbols A, X, L… to be entered into the symbol table
with their respective values. An instruction RMO A, X would then be allowed. As another usage
if in a machine that has many general purpose registers named as R1, R2… some may be used as
base register, some may be used as accumulator. Their usage may change from one program to
another. In this case we can define these requirement using EQU statements.
BASE EQU R1

INDEX EQU R2
COUNT EQU R3

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One restriction with the usage of EQU is whatever symbol occurs in the right hand side of the EQU
should be predefined. For example, the following statement is not valid:
BETA EQU ALPHA
ALPHA RESW 1
As the symbol ALPHA is assigned to BETA before it is defined. The value of ALPHA is not known.

ORG Statement

This directive can be used to indirectly assign values to the symbols. The directive is usually
called ORG (for origin). Its general format is:
ORG value
Where value is a constant or an expression involving constants and previously defined symbols.
When this statement is encountered during assembly of a program, the assembler resets its location
counter (LOCCTR) to the specified value. Since the values of symbols used as labels are taken from
LOCCTR, the ORG statement will affect the values of all labels defined until the next ORG is
encountered. ORG is used to control assignment storage in the object program. Sometimes altering the
values may result in incorrect assembly.
ORG can be useful in label definition. Suppose we need to define a symbol table with the
following structure:
SYMBOL 6 Bytes
VALUE 3 Bytes
FLAG 2 Bytes
The table looks like the one given below.

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The symbol field contains a 6-byte user-defined symbol; VALUE is a one-word representation
of the value assigned to the symbol; FLAG is a 2-byte field specifies symbol type and other information.
The space for the table can be reserved by the statement:
STAB RESB 1100
If we want to refer to the entries of the table using indexed addressing, place the offset value
of the desired entry from the beginning of the table in the index register. To refer to the fields
SYMBOL, VALUE, and FLAGS individually, we need to assign the values first as shown below:
SYMBOL EQU STAB
VALUE EQU STAB+6
FLAGS EQU STAB+9
To retrieve the VALUE field from the table indicated by register X, we can write a statement:
LDA VALUE, X
The same thing can also be done using ORG statement in the following way:

STAB RESB 1100

ORG STAB
SYMBOL RESB 6
VALUE RESW 1
FLAG RESB 2
ORG STAB+1100
The first statement allocates 1100 bytes of memory assigned to label STAB. In the second
statement the ORG statement initializes the location counter to the value of STAB. Now the LOCCTR
points to STAB. The next three lines assign appropriate memory storage to each of SYMBOL, VALUE
and FLAG symbols. The last ORG statement reinitializes the LOCCTR to a new value after skipping
the required number of memory for the table STAB (i.e., STAB+1100).
While using ORG, the symbol occurring in the statement should be predefined as is required in
EQU statement. For example for the sequence of statements below:

ORG ALPHA
BYTE1 RESB 1
BYTE2 RESB 1
BYTE3 RESB 1
ORG
ALPHA RESB 1

The sequence could not be processed as the symbol used to assign the new location counter
value is not defined. In first pass, as the assembler would not know what value to assign to ALPHA,

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the other symbol in the next lines also could not be defined in the symbol table. This is a kind of
problem of the forward reference.

Expressions
Assemblers also allow use of expressions in place of operands in the instruction. Each
such expression must be evaluated to generate a single operand value or address. Assemblers
generally arithmetic expressions formed according to the normal rules using arithmetic
operators +, - *, /. Division is usually defined to produce an integer result. Individual terms
may be constants, user-defined symbols, or special terms. The only special term used is * (the
current value of location counter) which indicates the value of the next unassigned memory
location. Thus the statement
BUFFEND EQU *
Assigns a value to BUFFEND, which is the address of the next byte following the buffer
area. Some values in the object program are relative to the beginning of the program and some
are absolute (independent of the program location, like constants). Hence, expressions are
classified as either absolute expression or relative expressions depending on the type of value
they produce.
Absolute Expressions: The expression that uses only absolute terms is absolute
expression. Absolute expression may contain relative term provided the relative terms
occur in pairs with opposite signs for each pair. Example:

MAXLEN EQU BUFEND-BUFFER

In the above instruction the difference in the expression gives a value that does not
depend on the location of the program and hence gives an absolute immaterial o the relocation
of the program. The expression can have only absolute terms. Example:
MAXLEN EQU 1000
Relative Expressions: All the relative terms except one can be paired as described in
“absolute”. The remaining unpaired relative term must have a positive sign. Example:

STAB EQU OPTAB + (BUFEND – BUFFER)

Handling the type of expressions: to find the type of expression, we must keep track the type of
symbols used. This can be achieved by defining the type in the symbol table against each of the
symbol as shown in the table below:

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Program Blocks
Program blocks allow the generated machine instructions and data to appear in the object
program in a different order by Separating blocks for storing code, data, stack, and larger data block.
Assembler Directive USE
USE [block name]

At the beginning, statements are assumed to be part of the unnamed (default) block. If no USE
statements are included, the entire program belongs to this single block. Each program block may
actually contain several separate segments of the source program. Assemblers rearrange these segments
to gather together the pieces of each block and assign address. Separate the program into blocks in a
particular order. Large buffer area is moved to the end of the object program. Program readability is
better if data areas are placed in the source program close to the statements that reference them.

In the example below three blocks are used:

Default: executable instructions
CDATA: all data areas that are less in length
CBLKS: all data areas that consists of larger blocks of memory

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Example Code

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Arranging code into program blocks

Pass 1
A separate location counter for each program block is maintained.

Save and restore LOCCTR when switching between blocks.

At the beginning of a block, LOCCTR is set to 0.

Assign each label an address relative to the start of the block.

Store the block name or number in the SYMTAB along with the assigned relative address of the
label.
Indicate the block length as the latest value of LOCCTR for each block at the end of Pass1.
Assign to each block a starting address in the object program by concatenating the program
blocks in a particular order
Pass 2

Calculate the address for each symbol relative to the start of the object program by adding o
The location of the symbol relative to the start of its block

The starting address of this block

Control Sections
A control section is a part of the program that maintains its identity after assembly; each
control section can be loaded and relocated independently of the others. Different control sections are

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most often used for subroutines or other logical subdivisions. The programmer can assemble, load, and
manipulate each of these control sections separately.
Because of this, there should be some means for linking control sections together. For example,
instructions in one control section may refer to the data or instructions of other control sections. Since
control sections are independently loaded and relocated, the assembler is unable to process these
references in the usual way. Such references between different control sections are called external
references.
The assembler generates the information about each of the external references that will allow
the loader to perform the required linking. When a program is written using multiple control sections,
the beginning of each of the control section is indicated by an assembler directive
assembler directive: CSECT
The syntax
Sec name CSECT

separate location counter for each control section

Control sections differ from program blocks in that they are handled separately by the
assembler. Symbols that are defined in one control section may not be used directly another control
section; they must be identified as external reference for the loader to handle. The external references
are indicated by two assembler directives:

EXTDEF (external Definition)

It is the statement in a control section, names symbols that are defined in this section but may
be used by other control sections. Control section names do not need to be named in the EXTREF as
they are automatically considered as external symbols.

EXTREF (external Reference)

It names symbols that are used in this section but are defined in some other control section.
The order in which these symbols are listed is not significant. The assembler must include proper
information about the external references in the object program that will cause the loader to insert the
proper value where they are required.

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Handling External Reference

Case 1

15 0003 CLOOP +JSUB RDREC 4B100000

The operand RDREC is an external reference.
The assembler has no idea where RDREC is

inserts an address of zero

Can only use extended format to provide enough room (that is, relative addressing for
external reference is invalid).
The assembler generates information for each external reference that will allow the loader to
perform the required linking.

Case 2
190 0028 MAXLEN WORD BUFEND-BUFFER 000000
There are two external references in the expression, BUFEND and BUFFER.

The assembler inserts a value of zero.

Passes information to the loader.

Add to this data area the address of BUFEND

Subtract from this data area the address of BUFFER

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Case 3
On line 107, BUFEND and BUFFER are defined in the same control section and the expression can
be calculated immediately.
107 1000 MAXLEN EQU BUFEND-BUFFER

Object Code for the example program

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The assembler must also include information in the object program that will cause the loader
to insert the proper value where they are required. The assembler maintains two new record in the object
code and a changed version of modification record.

Define record (EXTDEF)

• Col. 1 D

• Col. 2-7 Name of external symbol defined in this control section

Col. 8-13Relative address within this control section (hexadecimal)

Col.14-73Repeat information in Col. 2-13 for other external symbols

Refer record (EXTREF)

• Col. 1 R

• Col. 2-7 Name of external symbol referred to in this control section

Col. 8-73Name of other external reference symbols

Modification record
• Col. 1 M

• Col. 2-7 Starting address of the field to be modified (hexadecimal)

• Col. 8-9 Length of the field to be modified, in half-bytes (hexadecimal)

Col.11-16 External symbol whose value is to be added to or subtracted from the indicated field

A define record gives information about the external symbols that are defined in this control
section, i.e., symbols named by EXTDEF.A refer record lists the symbols that are used as external
references by the control section, i.e., symbols named by EXTREF.
The new items in the modification record specify the modification to be performed: adding or
subtracting the value of some external symbol. The symbol used for modification may be defined either
in this control section or in another section.
The object program is shown below. There is a separate object program for each of the control
sections. In the Define Record and refer record the symbols named in EXTDEF and EXTREF are
included.

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In the case of Define, the record also indicates the relative address of each external symbol
within the control section. For EXTREF symbols, no address information is available. These symbols
are simply named in the Refer record.

Handling Expressions in Multiple Control Sections

The existence of multiple control sections that can be relocated independently of one another

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makes the handling of expressions complicated. It is required that in an expression that all the relative
terms be paired (for absolute expression), or that all except one be paired (for relative expressions).

When it comes in a program having multiple control sections then we have an extended
restriction that:
Both terms in each pair of an expression must be within the same control section
If two terms represent relative locations within the same control section, their
difference is an absolute value (regardless of where the control section is located.
Legal: BUFEND-BUFFER (both are in the same control section)

If the terms are located in different control sections, their difference has a value that
is unpredictable.
Illegal: RDREC-COPY (both are of different control section) it is the
difference in the load addresses of the two control sections. This value depends
on the way run-time storage is allocated; it is unlikely to be of any use.

How to enforce this restriction

When an expression involves external references, the assembler cannot determine
whether or not the expression is legal.

The assembler evaluates all of the terms it can, combines these to form an initial
expression value, and generates Modification records.

The loader checks the expression for errors and finishes the evaluation.

2.4 ASSEMBLER DESIGN OPTIONS

Here we are discussing
The structure and logic of one-pass assembler. These assemblers are used when it is necessary or
desirable to avoid a second pass over the source program.
Notion of a multi-pass assembler, an extension of two-pass assembler that allows an assembler to
handle forward references during symbol definition.

2.4.1. ONE-PASS ASSEMBLER

The main problem in designing the assembler using single pass was to resolve forward
references. We can avoid to some extent the forward references by:
Eliminating forward reference to data items, by defining all the storage reservation statements at
the beginning of the program rather at the end.

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Unfortunately, forward reference to labels on the instructions cannot be avoided. (Forward

jumping)
To provide some provision for handling forward references by prohibiting forward references to
data items.

There are two types of one-pass assemblers

One that produces object code directly in memory for immediate execution (Load-and-go
assemblers).

The other type produces the usual kind of object code for later execution.

Load-and-Go Assembler
Load-and-go assembler generates their object code in memory for immediate execution.

No object program is written out, no loader is needed.

It is useful in a system with frequent program development and testing

The efficiency of the assembly process is an important consideration.
Programs are re-assembled nearly every time they are run; efficiency of the assembly process is
an important consideration.

Forward Reference in One-Pass Assemblers: In load-and-Go assemblers when a forward reference

is

encountered:

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Omits the operand address if the symbol has not yet been defined
Enters this undefined symbol into SYMTAB and indicates that it is undefined
Adds the address of this operand address to a list of forward references associated with the
SYMTAB entry
When the definition for the symbol is encountered, scans the reference list and inserts the address.
At the end of the program, reports the error if there are still SYMTAB entries indicated undefined
symbols.
For Load-and-Go assembler
Search SYMTAB for the symbol named in the END statement and jumps to this
location to begin execution if there is no error

After scanning line 40 of the program

40 2021 J` CLOOP 302012

The status is that upon this point the symbol RREC is referred once at location 2013,
ENDFIL at 201F and WRREC at location 201C. None of these symbols are defined. The figure
shows that how the pending definitions along with their addresses are included in the symbol table.

The status after scanning line 160, which has encountered the definition of RDREC and ENDFIL is as
given below:

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If One-Pass needs to generate object code

If the operand contains an undefined symbol, use 0 as the address and write the Text
record to the object program.
Forward references are entered into lists as in the load-and-go assembler.

When the definition of a symbol is encountered, the assembler generates another Text
record with the correct operand address of each entry in the reference list.

When loaded, the incorrect address 0 will be updated by the latter Text record containing the
symbol definition.

Object Code Generated by One-Pass Assembler

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2.4.2 MULTI_PASS ASSEMBLER

For a two pass assembler, forward references in symbol definition are not allowed:
ALPHA EQU BETA
BETA EQU DELTA
DELTA RESW 1
Symbol definition must be completed in pass 1.

Prohibiting forward references in symbol definition is not a serious inconvenience.

Forward references tend to create difficulty for a person reading the program.

Implementation Issues for Modified Two-Pass Assembler

Implementation Issues when forward referencing is encountered in Symbol Defining statements:
For a forward reference in symbol definition, we store in the SYMTAB: o
The symbol name

The defining expression

The number of undefined symbols in the defining expression.

The undefined symbol (marked with a flag *) associated with a list of symbols depend on
this undefined symbol.

When a symbol is defined, we can recursively evaluate the symbol expressions depending on
the newly defined symbol.

Multi-Pass Assembler Example Program

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Multi-Pass Assembler: Example for forward reference in Symbol Defining Statements

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MASM Assembler

The Microsoft Macro Assembler is an X86 architecture assembler for MS-DOS and
Microsoft Windows. While the name MASM has earlier usage as the Unisys OS 1100 Meta-Assembler,
it is commonly understood in more recent years to refer to the Microsoft Macro Assembler. It is an
archetypal MACRO assembler for the x86 PC market that is owned and maintained by a major operating
system vendor and since the introduction of MASM version 6.0 in 1991 has had a powerful preprocessor
that supports pseudo high level emulation of variety of high level constructions including loop code,
conditional testing and has a semi-automated system of procedure creation and management available
if required. Version 6.11d was 32 bit object module capable using a specialized linker available in the
WinNT 3.5 SDK but with the introduction of binary patches that upgraded version 6.11d, all later
versions were 32 bit Portable Executable console mode application that produced both OMF and COFF
object modules for 32 bit code.

2.5 INTERPRETERS

2.5.1 JAVA VIRTUAL MACHINE (JVM)

Java virtual machine (JVM) interprets compiled Java binary code (called byte code) for a
computer's processor (or "hardware platform") so that it can perform a Java program's
instructions. Java was designed to allow application programs to be built that could be run on
any platform without having to be rewritten or recompiled by the programmer for each separate
platform. A Java virtual machine makes this possible because it is aware of the specific
instruction lengths and other particularities of the platform.
JIT compiling, not interpreting, is used in most JVMs today to achieve greater speed
Need to be implemented for each platform.
Although the details vary from machine to machine, all JVM understand the same byte code.
Java compiler produces an intermediate code known as byte code for a machine, known as JVM.
It exists only inside the computer memory.

Java Program Java Virtual Machine

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Machine code is generated by the java interpreter by acting as an intermediary between the virtual
machine and real machine.

The Java Virtual Machine

An abstract computing machine that executes byte code programs

An instruction set and the meaning of those instructions –the byte codes
A binary format –the class file format
An algorithm to verify the class file
Runtime environment for Java
Implementation NOT defined
Runs Java .class files
Has to conform to Sun‘s specification

Implementations of the JVM

Interpreter
Simple, compact
Slow
Just-in-time compilation
State-of-the-art for desktop/server
Too resource consuming in embedded systems
Batch compilation
Hardware implementation

JVM Data Types

Reference Pointer to an object or array

int 32-bit integer (signed)
long 64-bit integer (signed)
float 32-bit floating-point (IEEE 754-1985)
double 64-bit floating-point (IEEE 754-1985)

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No Boolean, char, byte, and short types

Stack contains only 32-bit and 64-bit data

Conversion instructions
Memory Areas for the JVM

Method area
Class description
Code
Constant pool
Heap
Objects and Arrays
Shared by all threads
Garbage collected
Stack
Thread private
Logical stack that contains:
Invocation frame
Local variable area
Operand stack
Not necessary a single stack
Local variables and operand stack are accessed frequently.

JVM Instruction Set

32 (64) bit stack machine

Variable length instruction set
Simple to very complex instructions
Symbolic references
Only relative branches
Load and store
Arithmetic
Type conversion
Object creation and manipulation
Operand stack manipulation
Control transfer
Method invocation and return

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2.5.2 JAVA BYTE CODES

Byte codes are the machine language of the Java virtual machine. When a JVM loads a class
file, it gets one stream of byte codes for each method in the class. The byte codes streams are stored in
the method area of the JVM. The byte codes for a method are executed when that method is invoked
during the course of running the program. They can be executed by interpretation, just-in-time
compiling, or any other technique that was chosen by the designer of a particular JVM.

A method's byte code stream is a sequence of instructions for the Java virtual machine. Each
instruction consists of a one-byte op code followed by zero or more operands. The op code indicates
the action to take. If more information is required before the JVM can take the action, that information
is encoded into one or more operands that immediately follow the op code.

Each type of op code has a mnemonic. In the typical assembly language style, streams of Java
byte codes can be represented by their mnemonics followed by any operand values. For example, the
following stream of byte codes can be disassembled into mnemonics:

Byte code stream: 03 3b 84 00 01 1a 05 68 3b a7 ff f9

Disassembly:

iconst_0 // 03

istore_0 // 3b

iinc 0, 1 // 84 00 01

iload_0 // 1a

iconst_2 // 05

imul // 68

istore_0 // 3b

goto -7 // a7 ff f9

The byte code instruction set was designed to be compact. All instructions, except two that deal
with table jumping, are aligned on byte boundaries. The total number of op codes is small enough so
that op codes occupy only one byte. This helps minimize the size of class files that may be traveling
across networks before being loaded by a JVM. It also helps keep the size of the JVM implementation
small.

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All computation in the JVM centers on the stack. Because the JVM has no registers for storing
arbitrary values, everything must be pushed onto the stack before it can be used in a calculation. Byte
code instructions therefore operate primarily on the stack. For example, in the above byte code sequence
a local variable is multiplied by two by first pushing the local variable onto the stack with the iload_0
instruction, then pushing two onto the stack with iconst_2. After both integers have been pushed onto
the stack, the imul instruction effectively pops the two integers off the stack, multiplies them, and pushes
the result back onto the stack. The result is popped off the top of the stack and stored back to the local
variable by the istore_0 instruction. The JVM was designed as a stack-based machine rather than a
register-based machine to facilitate efficient implementation on register-poor architectures such as the
Intel 486.

Compiled and Interpreted

Java works in two stage

Java compiler translates the source code into byte code.
Java interpreter converts the byte code into machine level representation.

Byte Code:

-A highly optimized set of instructions to be executed by the java runtime system, known as
java virtual machine (JVM).

-Not executable code.

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A Byte code Example

public static void main(java.lang.String[]);

public class X { public Code:
static void iconst_1
main(String[] args) { iconst_2
add(1, 2); //Method add:(II)I
} invokestatic #2;
public static int pop
add(int a, int b) { return
returna+b; public static int add(int,int);
} Code:
} iload_0
iload_1
iadd
ireturn

2.5.3 MICROSOFT INTERMEDIATE LANGUAGE

MSIL stands for Microsoft Intermediate Language. We can call it as Intermediate Language
(IL) or Common Intermediate Language (CIL). During the compile time, the compiler convert the
source code into Microsoft Intermediate Language (MSIL) .Microsoft Intermediate Language (MSIL)
is a CPU-independent set of instructions that can be efficiently converted to the native code. During the
runtime the Common Language Runtime (CLR)'s Just In Time (JIT) compiler converts the Microsoft
Intermediate Language (MSIL) code into native code to the Operating System.

When a compiler produces Microsoft Intermediate Language (MSIL), it also produces

Metadata. The Microsoft Intermediate Language (MSIL) and Metadata are contained in a portable
executable (PE) file. Microsoft Intermediate Language (MSIL) includes instructions for loading,
storing, initializing, and calling methods on objects, as well as instructions for arithmetic and logical
operations, control flow, direct memory access, exception handling, and other operations.

During compilation of CLI programming languages, the source code is translated into CIL code
rather than into platform- or processor-specific object code. CIL is a CPU- and platform-independent
instruction set that can be executed in any environment supporting the Common Language
Infrastructure, such as the .NET runtime on Windows, or the cross-platform Mono runtime. In theory,
this eliminates the need to distribute different executable files for different platforms and CPU types.
CIL code is verified for safety during runtime, providing better security and reliability than natively
compiled executable files.

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The execution process looks like this:

Source code is converted to CIL i.e. Common Intermediate Language, which is the CLI's
equivalent to assembly language for a CPU.
CIL is then assembled into a form of so-called byte code and a CLI assembly is created.
Upon execution of a CLI assembly, its code is passed through the runtime's JIT compiler to generate
native code. Ahead-of-time compilation may also be used, which eliminates this step, but at the
cost of executable-file portability.
The computer's processor executes the native code.

Compiling and executing managed code

Common Language Runtime

CLR sits on top of OS to provide a virtual environment for hosting managed applications o
Is CLR similar to in Java
o Java Virtual Machine (JVM)
CLR loads modules containing executable and executes their code
Code might be managed or unmanaged
In either case the CLR determines what to do with it
Managed Code consists of instructions written in a pseudo-machine language called common
intermediate language, or IL.
IL instructions are just-in-time (JIT) compiled into native machine code at run time

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Execution

Just-in-time compilation

Just-in-time compilation (JIT) involves turning the byte-code into code immediately executable
by the CPU. The conversion is performed gradually during the program's execution. JIT compilation
provides environment-specific optimization, runtime type safety, and assembly verification. To
accomplish this, the JIT compiler examines the assembly metadata for any illegal accesses and handles
violations appropriately.

Ahead-of-time compilation

CLI-compatible execution environments also come with the option to do an Ahead-of-time

compilation (AOT) of an assembly to make it execute faster by removing the JIT process at
runtime.
In the .NET Framework there is a special tool called the Native Image Generator (NGEN) that
performs the AOT. In Mono there is also an option to do an AOT.

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Two Marks Questions

Define the basic functions of assembler.
Translating mnemonic operation codes to their machine language equivalents.
Assigning machine addresses to symbolic labels used by the programmer.

What is meant by assembler directives? Give example.

These are the statements that are not translated into machine instructions, but they provide
instructions to assembler itself.
Example: START, END, BYTE, WORD, RESW and RESB.

3. What is forward references?

It is a reference to a label that is defined later in a program.
Consider the statement

The first instruction contains a forward reference RETADR. If we attempt to translate the
program line by line, we will unable to process the statement in line10 because we do not know the
address that will be assigned to RETADR .The address is assigned later(in line 80) in the program.

4. What are the three different records used in object program?

The header record, text record and the end record are the three different records used in object
program. The header record contains the program name, starting address and length of the program.
Text record contains the translated instructions and data of the program.
End record marks the end of the object program and specifies the address in the program where
execution is to begin.

5. What is the need of SYMTAB (symbol table) in assembler?

The symbol table includes the name and value for each symbol in the source program, together
with flags to indicate error conditions. Sometimes it may contains details about the data area. SYMTAB
is usually organized as a hash table for efficiency of insertion and retrieval.

6. What is the need of OPTAB (operation code table) in assembler?

The operation code table contain the mnemonic operation code and its machine language
equivalent. Some assemblers it may also contains information about instruction format and length.
OPTAB is usually organized as a hash table, with mnemonic operation code as the key.

7. What are the symbol defining statements generally used in assemblers?

‘EQU’-it allows the programmer to define symbols and specify their values directly. The
general format is symbol EQU value
‘ORG’-it is used to indirectly assign values to symbols. When this statement is encountered the
assembler resets its location counter to the specified value.
The general format
is ORG value
In the above two statements value is a constant or an expression involving constants and
previously defined symbols.

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8. Define relocatable program.

An object program that contains the information necessary to perform required modification in
the object code depends on the starting location of the program during load time is known as relocatable
program.

9. Differentiate absolute expression and relative expression.

If the result of the expression is an absolute value (constant) then it is known as absolute
expression, e.g.: BUFEND – BUFFER
If the result of the expression is relative to the beginning of the program then it is known as
relative expression. Label on instructions and data areas and references to the location counter values
are relative terms.
E.g.: BUFEND + BUFFER

Write the steps required to translate the source program to object program.
Convert mnemonic operation codes to their machine language equivalents.
Convert symbolic operands to their equivalent machine addresses
Build the machine instruction in the proper format.
Convert the data constants specified in the source program into their internal machine
representation
Write the object program and assembly listing.

What is the use of the variable LOCCTR (location counter) in assembler?

This variable is used to assign addresses to the symbols. LOCCTR is initialized to the beginning
address specified in the START statement. After each source statement is processed the length of the
assembled instruction or data area to be generated is added to LOCCTR and hence whenever we reach
a label in the source program the current value of LOCCTR gives the address associated with the label.

12. Define load and go assembler.

One pass assembler that generate their object code in memory for immediate execution is
known as load and go assembler. Here no object programmer is written out and hence no need for
loader.

13. What are the two different types of jump statements used in MASM assembler?
Near jump
A near jump is a jump to a target in the same segment and it is assembled by using a
current code segment CS.
Far jump
A far jump is a jump to a target in a different code segment and it is assembled by
using different segment registers.

What are the use of base register table in AIX assembler?

A base register table is used to remember which of the general purpose registers are currently
available as base registers and also the base addresses they contain.
.USING statement causes entry to the table and .DROP statement removes the corresponding
table entry.

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Differentiate the assembler directives RESW and RESB.

RESW –It reserves the indicated number of words for data area.
E.g.: 10 1003 THREE RESW 1
In this instruction one word area (3 bytes) is reserved for the symbol THREE. If the memory
is byte addressable then the address assigned for the next symbol is 1006.
RESB –It reserves the indicated number of bytes for data area.
E.g.: 10 1008 INPUT RESB 1
In this instruction one byte area is reserved for the symbol INPUT .Hence the address assigned for the
next symbol is 1009.

16. Define modification record and give its format

This record contains the information about the modification in the object code during program
relocation. The general format is
Col 1 M
Col 2-7 starting location of the address field to be modified relative to the beginning of the Program
Col 8-9 length of the address field to be modified in half bytes.

Write down the pass numbers (PASS 1/ PASS 2) of the following activities that occur in a two
pass assembler:
a. Object code generation
b. Literals added to literal
table c. Listing printed
d. Address location of local symbols

Answer:
a. Object code generation - PASS 2
b. Literals added to literal table – PASS 1
c. Listing printed – PASS2
d. Address location of local symbols – PASS1

18. What is meant by machine independent assembler features?

The assembler features that does not depends upon the machine architecture are known as
machine independent assembler features.
E.g.: program blocks, Literals.

19. How the register to register instructions are translated in assembler?

In the case of register to register instructions the operand field contains the register name.
During the translation first the object code is converted into its corresponding machine language
equivalent with the help of OPTAB. Then the SYMTAB is searched for the numeric equivalent of
register and that value is inserted into the operand field.
Eg: 125 1036 RDREC CLEAR X B410 B4-macine equivalent of the
opcode CLEAR 10-numeric equivalent of the register X.

20. What is meant by external references?

Assembler program can be divided into many sections known as control sections and each
control section can be loaded and relocated independently of the others. If the instruction in one control
section need to refer instruction or data in another control section .the assembler is unable to

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process these references in normal way. Such references between controls are called external
references.

21. Define control section.

A control section is a part of the program that maintain its identity after assembly; each
control section can be loaded and relocated independently of the others.
Control sections are most often used for subroutines. The major benefit of using control
sections is to increase flexibility.

22. What is the difference between the assembler directive EXTREF and EXTDEF.
EXTDEF names external symbols that are defined in a particular control section and may be
used by other sections.
EXTREF names external symbols that are referred in a particular control section and defined
in another control section.

23. Give the general format of define record.

This record gives information about external symbols that are defined in a particular control
section. The format is
Col 1 D
Col 2-7 name of external symbol defined in this control section
Col 8-13 relative address of the symbol with in this control section
Col 14-73 name and relative address for other external symbols.

24. Give the use of assembler directive CSECT and USE

CSECT - used to divide the program into many control sections
USE – used to divide the program in to many blocks called program blocks

25. What is the use of the assembler directive START?

The assembler directive START gives the name and starting address of the program. The
format is
PN START 1000
Here
PN –name of the program
1000-starting address of the program.

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Unit-III
Loaders and Linkers: Basic loader functions, machine – dependent and machine –
independent loader features. Loader design – Linkage editors, dynamic linking and bootstrap loaders.

Introduction
The Source Program written in assembly language or high level language will be converted to
object program, which is in the machine language form for execution. This conversion either from
assembler or from compiler, contains translated instructions and data values from the source program,
or specifies addresses in primary memory where these items are to be loaded for execution. This
contains the following three processes, and they are,
Loading - which allocates memory location and brings the object program into memory for
execution - (Loader)

Linking- which combines two or more separate object programs and supplies the information
needed to allow references between them - (Linker)

Relocation - which modifies the object program so that it can be loaded at an address different
from the location originally specified - (Linking Loader)

3.1 BASIC LOADER FUNCTIONS

A loader is a system program that performs the loading function. It brings object program into
memory and starts its execution. The role of loader is as shown in the figure 3.1. Translator may be
assembler/complier, which generates the object program and later loaded to the memory by the loader
for execution. In figure 3.2 the translator is specifically an assembler, which generates the object loaded,
which becomes input to the loader. The figure 3.3 shows the role of both loader and linker.

Source Object
Translator Loader Object Program
Program Program Ready for
Execution

Memory

Fig 3.1: The Role of Loader

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Assembler Loader Object Program

Ready for
Source Object
Execution
Program Program

Memory
Fig 3.2: The Role of Loader with Assembler

Assembler Linker Object Program

Ready for
Source Object
Execution
Program Program Executable code

Loader

Memory
Fig 3.3: The Role of both Loader and Linker

Type of Loaders
The different types of loaders are, absolute loader, bootstrap loader, relocating loader
(relative loader), and, direct linking loader. The following sections discuss the functions and design
of all these types of loaders.

3.1.1 DESIGN OF ABSOLUTE LOADER

The operation of absolute loader is very simple. The object code is loaded to specified locations
in the memory. At the end the loader jumps to the specified address to begin execution of the loaded
program.

The algorithm for this type of loader is given here. The object program and, the object
program loaded into memory by the absolute loader are also shown. Each byte of assembled code
is given using its hexadecimal representation in character form. Easy to read by human beings.

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Each byte of object code is stored as a single byte. Most machine store object programs in a binary
form, and we must be sure that our file and device conventions do not cause some of the program
bytes to be interpreted as control characters.
Begin
read Header record
verify program name and length

read first Text record

while record type is <> ‘E’ do
begin
{
if object code is in character form, convert into internal representation
}
move object code to specified location in memory
read next object program record
end
jump to address specified in End record
end

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3.1.2 A SIMPLE BOOTSTRAP LOADER

When a computer is first turned on or restarted, a special type of absolute loader, called
bootstrap loader is executed. This bootstrap loads the first program to be run by the computer -- usually
an operating system. The bootstrap itself begins at address 0. It loads the OS starting address 0x80. No
header record or control information, the object code is consecutive bytes of memory.
The algorithm for the bootstrap loader is as
follows Begin
X=0x80 (the address of the next memory location to be loaded
Loop


A GETC (and convert it from the ASCII
character code to the value of the hexadecimal
digit) save the value in the high-order 4 bits of S

A GETC

combine the value to form one byte A (A+S)
store the value (in A) to the address in register X

X X+1
End

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It uses a subroutine GETC, which is


GETC A read one character
if A=0x04 then jump to 0x80
if A<48 then GETC

A-48 (0x30) if
A<10 then return

A-7
Return

3.2 MACHINE-DEPENDENT LOADER FEATURES

Absolute loader is simple and efficient, but the scheme has potential disadvantages One of the
most disadvantage is the programmer has to specify the actual starting address, from where the program
to be loaded. This does not create difficulty, if one program to run, but not for several programs. Further
it is difficult to use subroutine libraries efficiently.

This needs the design and implementation of a more complex loader. The loader must provide
program relocation and linking, as well as simple loading functions.

3.2.1 RELOCATION
The concept of program relocation is, the execution of the object program using any part of the
available and sufficient memory. The object program is loaded into memory wherever there is room for
it. The actual starting address of the object program is not known until load time. Relocation provides
the efficient sharing of the machine with larger memory and when several independent programs are to
be run together. It also supports the use of subroutine libraries efficiently. Loaders that allow for
program relocation are called relocating loaders or relative loaders.

Methods for specifying relocation

Use of modification record and, use of relocation bit, are the methods available for specifying
relocation. In the case of modification record, a modification record M is used in the object program to
specify any relocation. In the case of use of relocation bit, each instruction is associated with one
relocation bit and, these relocation bits in a Text record is gathered into bit masks.
Modification records are used in complex machines and is also called Relocation and Linkage Directory
(RLD) specification. The format of the modification record (M) is as follows. The object program with
relocation by Modification records is also shown here.

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Modification record
Col 1: M
Col 2-7: relocation address
Col 8-9: length (half byte)
Col 10: flag (+/-)
Col 11-17: segment name

H^COPY ^000000 001077

T^000000 ^1D^17202D^69202D^48101036^…^4B105D^3F2FEC^032010
T^00001D^13^0F2016^010003^0F200D^4B10105D^3E2003^454F46
T^001035 ^1D^B410^B400^B440^75101000^…^332008^57C003^B850
T^001053^1D^3B2FEA^134000^4F0000^F1^...^53C003^DF2008^B850
T^00070^07^3B2FEF^4F0000^05
M^000007^05+COPY
M^000014^05+COPY
M^000027^05+COPY
E^000000

The relocation bit method is used for simple machines. Relocation bit is 0: no modification is
necessary, and is 1: modification is needed. This is specified in the columns 10-12 of text record (T),
the format of text record, along with relocation bits is as follows.

Text record
Col 1 :T
Col 2-7 : starting address
Col 8-9 : length (byte)
Col 10-12 : relocation bits
Col 13-72 : object code

Twelve-bit mask is used in each Text record (col:10-12 – relocation bits), since each text record
contains less than 12 words, unused words are set to 0, and, any value that is to be modified during
relocation must coincide with one of these 3-byte segments. For absolute loader, there are no relocation
bits column 10-69 contains object code. The object program with relocation by bit mask is as shown
below. Observe FFC - means all ten words are to be modified and, E00 - means first three records are
to be modified.

H^COPY ^000000 00107A

T^000000^1E^FFC^140033^481039^000036^280030^300015^…^3C0003 ^ …

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T^00001E^15^E00^0C0036^481061^080033^4C0000^…^000003^000000
T^001039^1E^FFC^040030^000030^…^30103F^D8105D^280030^...
T^001057^0A^800^100036^4C0000^F1^001000
T^001061^19^FE0^040030^E01079^…^508039^DC1079^2C0036^...
E^000000

3.2.2 PROGRAM LINKING

The Goal of program linking is to resolve the problems with external references (EXTREF)
and external definitions (EXTDEF) from different control sections.
EXTDEF (external definition) - The EXTDEF statement in a control section names symbols,
called external symbols, that are defined in this (present) control section and may be used by other
sections.
Ex: EXTDEF BUFFER, BUFFEND, LENGTH
EXTDEF LISTA, ENDA

EXTREF (external reference) - The EXTREF statement names symbols used in this (present) control
section and are defined elsewhere.
Ex: EXTREF RDREC, WRREC
EXTREF LISTB, ENDB, LISTC, ENDC

How to implement EXTDEF and EXTREF

The assembler must include information in the object program that will cause the loader to
insert proper values where they are required – in the form of Define record (D) and, Refer record(R).

Define record
The format of the Define record (D) along with examples is as shown here.
Col. 1 D
Col. 2-7 Name of external symbol defined in this control section
Col. 8-13 Relative address within this control section (hexadecimal)
Col.14-73 Repeat information in Col. 2-13 for other external symbols

Example records
D LISTA 000040 ENDA 000054
D LISTB 000060 ENDB 000070

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Refer record
The format of the Refer record (R) along with examples is as shown here.
Col. 1 R
Col. 2-7 Name of external symbol referred to in this control section
Col. 8-73 Name of other external reference symbols

Example records
R LISTB ENDB LISTC ENDC
R LISTA ENDA LISTC ENDC
R LISTA ENDA LISTB ENDB

Here are the three programs named as PROGA, PROGB and PROGC, which are separately
assembled and each of which consists of a single control section. LISTA, ENDA in PROGA, LISTB,
ENDB in PROGB and LISTC, ENDC in PROGC are external definitions in each of the control sections.
Similarly LISTB, ENDB, LISTC, ENDC in PROGA, LISTA, ENDA, LISTC, ENDC in PROGB, and
LISTA, ENDA, LISTB, ENDB in PROGC, are external references. These sample programs given here
are used to illustrate linking and relocation. The following figures give the sample programs and their
corresponding object programs. Observe the object programs, which contain D and R records along
with other records.
0000 PROGA START 0
EXTDEF LISTA, ENDA
EXTREF LISTB, ENDB, LISTC, ENDC
………..
……….
0020 REF1 LDA LISTA 03201D
0023 REF2 +LDT LISTB+4 77100004
0027 REF3 LDX #ENDA-LISTA 050014
.
.
0040 LISTA EQU *
0054 ENDA EQU *
0054 REF4 WORD ENDA-LISTA+LISTC 000014
0057 REF5 WORD ENDC-LISTC-10 FFFFF6
005A REF6 WORD ENDC-LISTC+LISTA-1 00003F
005D REF7 WORD ENDA-LISTA-(ENDB-LISTB) 000014
0060 REF8 WORD LISTB-LISTA FFFFC0
END REF1

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0000 PROGB START 0

EXTDEF LISTB, ENDB
EXTREF LISTA, ENDA, LISTC, ENDC
………..
……….
0036 REF1 +LDA LISTA 03100000
003A REF2 LDT LISTB+4 772027
003D REF3 +LDX #ENDA-LISTA 05100000
.
.
0060 LISTB EQU *
0070 ENDB EQU *
0070 REF4 WORD ENDA-LISTA+LISTC 000000
0073 REF5 WORD ENDC-LISTC-10 FFFFF6
0076 REF6 WORD ENDC-LISTC+LISTA-1 FFFFFF
0079 REF7 WORD ENDA-LISTA-(ENDB-LISTB) FFFFF0
007C REF8 WORD LISTB-LISTA 000060
END

0000 PROGC START 0

EXTDEF LISTC, ENDC
EXTREF LISTA, ENDA, LISTB, ENDB
………..
………..
0018 REF1 +LDA LISTA 03100000
001C REF2 +LDT LISTB+4 77100004
0020 REF3 +LDX #ENDA-LISTA 05100000
.
.
0030 LISTC EQU *
0042 ENDC EQU *
0042 REF4 WORD ENDA-LISTA+LISTC 000030
0045 REF5 WORD ENDC-LISTC-10 000008
0045 REF6 WORD ENDC-LISTC+LISTA-1 000011
004B REF7 WORD ENDA-LISTA-(ENDB-LISTB) 000000
004E REF8 WORD LISTB-LISTA 000000
END

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H PROGA 000000 000063

LISTA 000040 ENDA 000054
RLISTB ENDB LISTC ENDC
.
.
T000020 0A 03201D 77100004 050014
.
.
T000054 0F 000014 FFFF6 00003F 000014 FFFFC0
M000024 05+LISTB
M000054 06+LISTC
M000057 06+ENDC
M000057 06 -LISTC
M00005A06+ENDC
00005A06 -LISTC
M00005A06+PROGA
M 00005D06-ENDB
M 00005D06+LISTB
M 00006006+LISTB
M 00006006-PROGA
E 000020

H PROGB 000000 00007F

LISTB 000060 ENDB 000070
RLISTA ENDA LISTC ENDC
.
T000036 0B 03100000 772027 05100000
.
T000007 0F 000000 FFFFF6 FFFFFF FFFFF0 000060
M000037 05+LISTA
M00003E 06+ENDA
M00003E 06 -LISTA
M000070 06 +ENDA
M000070 06 -LISTA
M000070 06 +LISTC
M000073 06 +ENDC
M000073 06 -LISTC

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000073 06 +ENDC
M000076 06 –LISTC
M000076 06+LISTA
M000079 06+ENDA
M000079 06 -LISTA
M00007C 06+PROGB
M 00007C 06-LISTA E

H PROGC 000000 000051

LISTC 000030 ENDC 000042
RLISTA ENDA LISTB ENDB
.
T000018 0C 03100000 77100004 05100000
.
T000042 0F 000030 000008 000011 000000 000000
M000019 05+LISTA
M00001D 06+LISTB
M000021 06+ENDA
M000021 06 -LISTA
M000042 06+ENDA
M000042 06 -LISTA
M000042 06+PROGC
M000048 06+LISTA

00004B 06+ENDA
M00004B 006-LISTA
M00004B 06-ENDB
M00004B 06+LISTB
M00004E 06+LISTB
M 00004E 06-LISTA E

The following figure shows these three programs as they might appear in memory after loading
and linking. PROGA has been loaded starting at address 4000, with PROGB and PROGC immediately
following.

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For example, the value for REF4 in PROGA is located at address 4054 (the beginning address
of PROGA plus 0054, the relative address of REF4 within PROGA). The following figure shows the
details of how this value is computed.

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The initial value from the Text record

T0000540F000014FFFFF600003F000014FFFFC0 is 000014. To this is added the address
assigned to LISTC, which is 4112 (the beginning address of PROGC plus 30). The result is 004126.
That is REF4 in PROGA is ENDA-LISTA+LISTC=4054-4040+4112=4126.
Similarly the load address for symbols LISTA: PROGA+0040=4040, LISTB:
PROGB+0060=40C3 and LISTC: PROGC+0030=4112
Keeping these details work through the details of other references and values of these references
are the same in each of the three programs.

3.2.3 ALGORITHM AND DATA STRUCTURES FOR A LINKING LOADER

The algorithm for a linking loader is considerably more complicated than the absolute loader
program, which is already given. The concept given in the program linking section is used for
developing the algorithm for linking loader. The modification records are used for relocation so that the
linking and relocation functions are performed using the same mechanism.

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Linking Loader uses two-pass logic. ESTAB (external symbol table) is the main data structure
for a linking loader.
Pass 1: Assign addresses to all external symbols
Pass 2: Perform the actual loading, relocation, and linking

ESTAB - ESTAB for the example (refer three programs PROGA PROGB and PROGC). The
ESTAB has four entries in it; they are name of the control section, the symbol appearing in the control
section, its address and length of the control section.

Pass 1 assign addresses to all external symbols. The variables & Data structures used during
pass 1 are, PROGADDR (program load address) from OS, CSADDR (control section address), CSLTH
(control section length) and ESTAB. The pass 1 processes the Define Record. The algorithm for Pass
1 of Linking Loader is given below.

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Program Logic for Pass 2

Pass 2 of linking loader perform the actual loading, relocation, and linking. It uses modification
record and lookup the symbol in ESTAB to obtain its address. Finally it uses end record of a main
program to obtain transfer address, which is a starting address needed for the execution of the program.
The pass 2 process Text record and Modification record of the object programs. The algorithm for Pass
2 of Linking Loader is given below.

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How to improve Efficiency?

The question here is can we improve the efficiency of the linking loader. Also observe that,
even though we have defined Refer record (R), we haven’t made use of it. The efficiency can be
improved by the use of local searching instead of multiple searches of ESTAB for the same symbol.
For implementing this we assign a reference number to each external symbol in the Refer record. Then
this reference number is used in Modification records instead of external symbols.01 is assigned to
control section name, and other numbers for external reference symbols.
The object programs for PROGA, PROGB and PROGC are shown below, with above
modification to Refer record (Observe R records).

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Symbol and Addresses in PROGA, PROGB and PROGC are as shown below. These are
the entries of ESTAB. The main advantage of reference number mechanism is that it avoids multiple
searches of ESTAB for the same symbol during the loading of a control section

Ref No. Symbol Address

1 PROGA 4000
2 LISTB 40C3

3 ENDB 40D3

4 LISTC 4112

5 ENDC 4124

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Ref No. Symbol Address

1 PROGB 4063
2 LISTA 4040

3 ENDA 4054

4 LISTC 4112

5 ENDC 4124

Ref No. Symbol Address

1 PROGC 4063
2 LISTA 4040

3 ENDA 4054

4 LISTB 40C3

5 ENDB 40D3

3.3 MACHINE-INDEPENDENT LOADER FEATURES

Here we discuss some loader features that are not directly related to machine architecture and
design. Automatic Library Search and Loader Options are such Machine-independent Loader Features.

3.3.1 AUTOMATIC LIBRARY SEARCH

This feature allows a programmer to use standard subroutines without explicitly including them
in the program to be loaded. The routines are automatically retrieved from a library as they are needed
during linking. This allows programmer to use subroutines from one or more libraries. The subroutines
called by the program being loaded are automatically fetched from the library, linked with the main
program and loaded. The loader searches the library or libraries specified for routines that contain the
definitions of these symbols in the main program.

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3.3.2 LOADER OPTIONS

Loader options allow the user to specify options that modify the standard processing. The
options may be specified in three different ways. They are, specified using a command language,
specified as a part of job control language that is processed by the operating system, and can be specified
using loader control statements in the source program.
Here are the some examples of how option can be specified.
INCLUDE program-name (library-name) - read the designated object program from a library
DELETE csect-name – delete the named control section from the set pf programs being loaded.
CHANGE name1, name2 - external symbol name1 to be changed to name2 wherever it appears
in the object programs.
LIBRARY MYLIB – search MYLIB library before standard libraries
NOCALL STDDEV, PLOT, CORREL – no loading and linking of unneeded routines

Here is one more example giving, how commands can be specified as a part of object file, and the
respective changes are carried out by the loader.
LIBRARY UTLIB
INCLUDE READ (UTLIB)
INCLUDE WRITE (UTLIB)
DELETE RDREC, WRREC
CHANGE RDREC, READ
CHANGE WRREC, WRITE
NOCALL SQRT, PLOT
The commands are, use UTLIB (say utility library), include READ and WRITE control sections
from the library, delete the control sections RDREC and WRREC from the load, the change command
causes all external references to the symbol RDREC to be changed to the symbol READ, similarly
references to WRREC is changed to WRITE, finally, no call to the functions SQRT, PLOT, if they are
used in the program.

3.4 LOADER DESIGN OPTIONS

There are some common alternatives for organizing the loading functions, including relocation
and linking. Linking Loaders – Perform all linking and relocation at load time. TheOther Alternatives
are Linkage editors, which perform linking prior to load time and, dynamic linking, in which linking
function is performed at execution time

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3.4.1 LINKING LOADERS

The above diagram shows the processing of an object program using Linking Loader. The
source program is first assembled or compiled, producing an object program. A linking loader performs
all linking and loading operations, and loads the program into memory for execution.

3.4.2 LINKAGE EDITORS

The figure below shows the processing of an object program using Linkage editor. A linkage
editor produces a linked version of the program – often called a load module or an executable image –
which is written to a file or library for later execution. The linked program produced is generally in a
form that is suitable for processing by a relocating loader.

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Some useful functions of Linkage editor are, an absolute object program can be created, if
starting address is already known. New versions of the library can be included without changing the
source program. Linkage editors can also be used to build packages of subroutines or other control
sections that are generally used together. Linkage editors often allow the user to specify that external
references are not to be resolved by automatic library search – linking will be done later by linking
loader – linkage editor + linking loader – savings in space

3.4.3 DYNAMIC LINKING

The scheme that postpones the linking functions until execution. A subroutine is loaded and
linked to the rest of the program when it is first called – usually called dynamic linking, dynamic loading
or load on call. The advantages of dynamic linking are, it allow several executing programs to share
one copy of a subroutine or library. In an object oriented system, dynamic linking makes it possible for
one object to be shared by several programs. Dynamic linking provides the ability to load the routines
only when (and if) they are needed. The actual loading and linking can be accomplished using operating
system service request.

Dynamic Linking Applications

Dynamic linking is often used to allow several executing programs to share one copy of a
subroutine or library.
For example, a single copy of the standard C library can be loaded into memory.
All C programs currently in execution can be linked to this one copy, instead of linking a separate
copy into each object program.
In an object-oriented system, dynamic linking is often used for references to software object.
This allows the implementation of the object and its method to be determined at the time the
program is run. (e.g., C++)
The implementation can be changed at any time, without affecting the program that makes use of
the object.

Dynamic Linking Advantage

The subroutines that diagnose errors may never need to be called at all.
However, without using dynamic linking, these subroutines must be loaded and linked every time
the program is run.

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Using dynamic linking can save both space for storing the object program on disk and in memory,
and time for loading the bigger object program.

Dynamic Linking Implementation

A subroutine that is to be dynamically loaded must be called via an operating system service
request.
– This method can also be thought of as a request to a part of the loader that is kept in
memory during execution of the program
Instead of executing a JSUB instruction to an external symbol, the program makes a load-and-call
service request to the OS.
The parameter of this request is the symbolic name of the routine to be called.
The OS examines its internal tables to determine whether the subroutine is already loaded.
If needed, the subroutine is loaded from the library.
Then control is passed from the OS to the subroutine being called.
When the called subroutine completes its processing, it returns to its caller (operating system).
The OS then returns control to the program that issues the request.
After the subroutine is completed, the memory that was allocated to it may be released.
However, often this is not done immediately. If the subroutine is retained in memory, it can be used
by later calls to the same subroutine without loading the same subroutine multiple times.
Control can simply pass from the dynamic loader to the called routine directly.

Implementation Example

Issue a Load and Call Service Request.

Load the called subroutine into memory
Control is passed to the loaded subroutine Program
Control is returned to the loader and returned to the user.
The called subroutine, this time already loaded.

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3.4.4 BOOTSTRAP LOADERS

If the question, how is the loader itself loaded into the memory? is asked, then the answer is,
when computer is started – with no program in memory, a program present in ROM ( absolute address)
can be made executed – may be OS itself or A Bootstrap loader, which in turn loads OS and prepares it
for execution. The first record (or records) is generally referred to as a bootstrap loader – makes the OS
to be loaded. Such a loader is added to the beginning of all object programs that are to be loaded into
an empty and idle system.

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Two Marks Questions

1. What are the basic functions of loaders?
Loading – brings the object program into memory for execution
Relocation – modifies the object program so that it can be loaded at an address different from the
location originally specified
Linking – combines two or more separate object programs and also supplies the information
needed to reference them.

2. Define absolute loader

The loader, which is used only for loading, is known as absolute loader.
E.g. Bootstrap loader

3. What is meant by bootstrap loader?

This is a special type of absolute loader which loads the first program to be run by the computer.
(Usually an operating system)

4. What are relative (relocative) loaders?

Loaders that allow for program relocation are called relocating (relocative) loaders.

5. What is the use of modification record?

Modification record is used for program relocation. Each modification record specifies the
starting address and the length of the field whose value is to be altered and also describes the
modification to be performed.

What are the 2 different techniques used for relocation?

Modification record method and relocation bit method.

Relocation bit method

If the relocation bit corresponding to a word of object code is set to 1, the program’s starting
address is to be added to this word when the program is relocated. Bit value 0 indicates no modification
is required.

8. Define bit mask

The relocation bits are gathered together following the length indicator in each text record and
which is called as bit mask. For e.g. the bit mask FFC (111111111100) specifies that the first 10 words
of object code are to be modified during relocation.

9. What is the need of ESTAB?

It is used to store the name and address of the each external symbol. It also indicates in which
control section the symbol is defined.

10. What is the use of the variable PROGADDR?

It gives the beginning address in memory where the linked program is to be loaded. The starting
address is obtained from the operating system.

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Write the two passes of a linking loader. Pass1:

assigns address to all external symbols
Pass2: it performs actual loading, relocation and linking.

Define automatic library search.

In many linking loaders the subroutines called by the program being loaded are automatically
fetched from the library, linked with the main program and loaded. This feature is referred to as
automatic library search.

List the loader options INCLUDE &DELETE.

The general format of INCLUDE is
INCLUDE program name (library name)
This command direct the loader to read the designated object program from a library and treat
it as the primary loader input.
The general format of DELETE command is
DELETE Csect-name
It instructs the loader to delete the named control sections from the sets of programs loaded.

14. Give the functions of the linking loader.

The linking loader performs the process of linking and relocation. It includes the operation of
automatic library search and the linked programs are directly loaded into the memory.

15. Give the difference between linking loader and linkage editors.

16. Define dynamic linking.

If the subroutine is loaded and linked to the program during its first call (run time),then it is
called as dynamic loading or dynamic linking.

Write the advantage of dynamic linking.

It has the ability to load the routine only when they are needed
The dynamic linking avoids the loading of entire library for each execution

What is meant by static executable and dynamic executable?

In static executable, all external symbols are bound and ready to run. In dynamic executables
some symbols are bound at run time.

19. What is shared and private data?

The data divided among processing element is called shared data. If the data is not shared
among processing elements then it is called private data.

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Write the absolute loader algorithm.

Begin
Read Header record
Verify program name and
length Read first text record
While record type! = ‘E’ do
Begin
Moved object code to specified location in memory
Read next object program record
End
Jump to address specified in End record

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UNIT-IV
Macro Processors: Functions – Machine independent macro processor features – macro
processor design option-Implementation examples.

A Macro represents a commonly used group of statements in the source programming language.
A macro instruction (macro) is a notational convenience for the programmer
It allows the programmer to write shorthand version of a program (module
programming)
The macro processor replaces each macro instruction with the corresponding group of source
language statements (expanding)
Normally, it performs no analysis of the text it handles.

It does not concern the meaning of the involved statements during macro expansion.
The design of a macro processor generally is machine independent!
Two new assembler directives are used in macro definition
MACRO: identify the beginning of a macro definition

MEND: identify the end of a macro definition

Prototype for the macro
Each parameter begins with ‘&’
name MACRO parameters
:
body
:
MEND
Body: the statements that will be generated as the expansion of the macro.

4.1 BASIC MACRO PROCESSOR FUNCTIONS

Macro Definition and Expansion

Macro Processor Algorithms and Data structures

4.1.1 Macro Definition and Expansion

Figure shows the MACRO expansion. The left block shows the MACRO definition and the
right block shows the expanded macro replacing the MACRO call with its block of executable
instruction.

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M1 is a macro with two parameters D1 and D2. The MACRO stores the contents of register A
in D1 and the contents of register B in D2. Later M1 is invoked with the parameters DATA1 and
DATA2, Second time with DATA4 and DATA3. Every call of MACRO is expended with the

executable statements.

Fig 4.1: macro call

The statement M1 DATA1, DATA2 is a macro invocation statements that gives the name of
the macro instruction being invoked and the arguments (M1 and M2) to be used in expanding. A macro
invocation is referred as a Macro Call or Invocation.

Macro Expansion
The program with macros is supplied to the macro processor. Each macro invocation statement
will be expanded into the statement s that form the body of the macro, with the arguments from the
macro invocation substituted for the parameters in the macro prototype. During the expansion, the
macro definition statements are deleted since they are no longer needed.
The arguments and the parameters are associated with one another according to their positions.
The first argument in the macro matches with the first parameter in the macro prototype and so on.
After macro processing the expanded file can become the input for the Assembler. The Macro
Invocation statement is considered as comments and the statement generated from expansion is treated
exactly as though they had been written directly by the programmer.
The difference between Macros and Subroutines is that the statement s from the body of the
Macro is expanded the number of times the macro invocation is encountered, whereas the statement

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of the subroutine appears only once no matter how many times the subroutine is called. Macro
instructions will be written so that the body of the macro contains no labels.
Problem of the label in the body of macro:
If the same macro is expanded multiple times at different places in the program …

There will be duplicate labels, which will be treated as errors by the assembler.
Solutions:
Do not use labels in the body of macro.

Explicitly use PC-relative addressing instead.

Ex, in RDBUFF and WRBUFF macros,
JEQ *+11

JLT *-14
It is inconvenient and error-prone.

The following program shows the concept of Macro Invocation and Macro Expansion.

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4.1.2 Macro Processor Algorithm and Data Structure

Design can be done as two-pass or a one-pass macro. In case of two-pass assembler.

Two-pass macro processor
You may design a two-pass macro processor o
Pass 1:
Process all macro definitions
Pass 2:
Expand all macro invocation statements
However, one-pass may be enough
Because all macros would have to be defined during the first pass before any macro
invocations were expanded.
The definition of a macro must appear before any statements that invoke that
macro.
Moreover, the body of one macro can contain definitions of the other macro

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Fig 4.1(a) MACROS for SIC machine

Consider the example of a Macro defining another Macro.

In the example below, the body of the first Macro (MACROS) contains statement that define
RDBUFF, WRBUFF and other macro instructions for SIC machine.

The body of the second Macro (MACROX) defines the se same macros for SIC/XE machine.

A proper invocation would make the same program to perform macro invocation to run on either
SIC or SIC/XE machine.

Fig 4.1(b) MACROS for SIC/XE machine

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A program that is to be run on SIC system could invoke MACROS whereas a program to be run
on SIC/XE can invoke MACROX.
However, defining MACROS or MACROX does not define RDBUFF and WRBUFF.
These definitions are processed only when an invocation of MACROS or MACROX is expanded.

One-Pass Macro Processor

A one-pass macro processor that alternate between macro definition and macro expansion in a
recursive way is able to handle recursive macro definition.
Restriction
The definition of a macro must appear in the source program before any statements
that invoke that macro.
This restriction does not create any real inconvenience.

The design considered is for one-pass assembler. The data structures required are:

DEFTAB (Definition Table)

Stores the macro definition including macro prototype and macro body
Comment lines are omitted.
References to the macro instruction parameters are converted to a positional notation
for efficiency in substituting arguments.

NAMTAB (Name Table)

Stores macro names
Serves as an index to DEFTAB
Pointers to the beginning and the end of the macro definition (DEFTAB)

ARGTAB (Argument Table)

Stores the arguments according to their positions in the argument list.
As the macro is expanded the arguments from the Argument table are substituted for
the corresponding parameters in the macro body.
The figure below shows the different data structures described and their relationship.

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Fig 4.2: data structures and their relationship.

The above figure shows the portion of the contents of the table during the processing of the program.
In fig 4.2(a) definition of RDBUFF is stored in DEFTAB, with an entry in NAMTAB having
the pointers to the beginning and the end of the definition. The arguments referred by the
instructions are denoted by their positional notations. For example,
TD =X’? 1’
The above instruction is to test the availability of the device whose number is given by the
parameter &INDEV. In the instruction this is replaced by its positional value? 1.

Figure 4.2(b) shows the ARTAB as it would appear during expansion of the RDBUFF
statement as given below:
CLOOP RDBUFF F1, BUFFER, LENGTH
For the invocation of the macro RDBUFF, the first parameter is F1 (input device code), second is
BUFFER (indicating the address where the characters read are stored), and the third is
LENGTH (which indicates total length of the record to be read). When the? n notation is
encountered in a line from DEFTAB, a simple indexing operation supplies the proper argument
from ARGTAB.

The algorithm of the Macro processor is given below. This has the procedure DEFINE to make the
entry of macro name in the NAMTAB, Macro Prototype in DEFTAB. EXPAND is called to
set up the argument values in ARGTAB and expand a Macro Invocation statement. Procedure
GETLINE is called to get the next line to be processed either from the DEFTAB or from the
file itself.

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When a macro definition is encountered it is entered in the DEFTAB. The normal approach is to
continue entering till MEND is encountered. If there is a program having a Macro defined
within another Macro?

While defining in the DEFTAB the very first MEND is taken as the end of the Macro definition.
This does not complete the definition as there is another outer Macro which completes the
definition of Macro as a whole. Therefore the DEFINE procedure keeps a counter variable
LEVEL.

Every time a Macro directive is encountered this counter is incremented by 1. The moment the
innermost Macro ends indicated by the directive MEND it starts decreasing the value of the counter
variable by one. The last MEND should make the counter value set to zero. So when LEVEL becomes
zero, the MEND corresponds to the original MACRO directive.
Most macro processors allow the definitions of the commonly used instructions to appear in a
standard system library, rather than in the source program. This makes the use of macros convenient;
definitions are retrieved from the library as they are needed during macro processing.

Fig 4.3: Macro library

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Algorithms:

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Comparison of Macro Processor Design

One-pass algorithm
Every macro must be defined before it is called

One-pass processor can alternate between macro definition and macro expansion

Nested macro definitions are allowed but nested calls are not allowed.
Two-pass algorithm
Pass1: Recognize macro definitions

Pass2: Recognize macro calls

Nested macro definitions are not allowed

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4.2 MACHINE-INDEPENDENT MACRO-PROCESSOR FEATURES

The design of macro processor doesn’t depend on the architecture of the machine. We will be
studying some extended feature for this macro processor. These features are:
Concatenation of Macro Parameters
Generation of unique labels
Conditional Macro Expansion
Keyword Macro Parameters

4.2.1 Concatenation of unique labels

Most macro processor allows parameters to be concatenated with other character strings. Suppose
that a program contains a series of variables named by the symbols XA1, XA2,
XA3,…, another series of variables named XB1, XB2, XB3,…, etc. If similar processing is to
be performed on each series of labels, the programmer might put this as a macro instruction.

The parameter to such a macro instruction could specify the series of variables to be operated on
(A, B, etc.). The macro processor would use this parameter to construct the symbols required
in the macro expansion (XA1, Xb1, etc.).
Suppose that the parameter to such a macro instruction is named &ID. The body of the macro
definition might contain a statement like
LDA X&ID1

is the starting character of the macro instruction; but the end of the parameter is not marked. So in
the case of &ID1, the macro processor could deduce the meaning that was intended.
If the macro definition contains contain &ID and &ID1 as parameters, the situation would be
unavoidably ambiguous.

Most of the macro processors deal with this problem by providing a special concatenation
→
operator. In the SIC macro language, this operator is the character . Thus the statement
LDA X&ID1 can be written as LDA
→
X&ID .

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The above figure shows a macro definition that uses the concatenation operator as previously
described. The statement SUM A and SUM BETA shows the invocation statements and the
corresponding macro expansion.

4.2.2 Generation of Unique Labels

It is not possible to use labels for the instructions in the macro definition, since every expansion of
macro would include the label repeatedly which is not allowed by the assembler.

This in turn forces us to use relative addressing in the jump instructions. Instead we can use the
technique of generating unique labels for every macro invocation and expansion.

During macro expansion each $ will be replaced with $XX, where xx is a two-character
alphanumeric counter of the number of macro instructions expansion.
For example, XX = AA, AB, AC…
This allows 1296 macro expansions in a single program.

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The following program shows the macro definition with labels to the instruction.

The following figure shows the macro invocation and expansion first time.

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If the macro is invoked second time the labels may be expanded as $ABLOOP $ABEXIT.
4.2.3 Conditional Macro Expansion
There are applications of macro processors that are not related to assemblers or assembler
programming.
Conditional assembly depends on parameters provides
MACRO &COND
……..
IF (&COND NE ‘’)
Part I
ELSE
Part II
ENDIF
………
ENDM
Part I is expanded if condition part is true, otherwise part II is expanded. Compare operators: NE, EQ,
LE, and GT.

Macro-Time Variables
Macro-time variables (often called as SET Symbol) can be used to store working values during
the macro expansion. Any symbol that begins with symbol & and not a macro instruction parameter is
considered as macro-time variable. All such variables are initialized to zero.

Fig 4.4(a): The macro RDBUFF with the parameters &INDEV, &BUFADR, &RECLTH,
&EOR, &MAXLTH

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Figure 4.4(a) gives the definition of the macro RDBUFF with the parameters &INDEV,
&BUFADR, &RECLTH, &EOR, &MAXLTH. According to the above program if &EOR has any
value, then &EORCK is set to 1 by using the directive SET, otherwise it retains its default value 0.

Fig 4.4(b): Use of Macro-Time Variable with EOF being NOT NULL

Fig 4.4(c) Use of Macro-Time conditional statement with EOF being NULL

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Fig 4.4(d) Use of Time-variable with EOF NOT NULL and MAXLENGTH being NULL

The above programs show the expansion of Macro invocation statements with different values
for the time variables. In figure 4.4(b) the &EOF value is NULL. When the macro invocation is done,
IF statement is executed, if it is true EORCK is set to 1, otherwise normal execution of the other part
of the program is continued.
The macro processor must maintain a symbol table that contains the value of all macro-time
variables used. Entries in this table are modified when SET statements are processed. The table is used
to look up the current value of the macro-time variable whenever it is required.
When an IF statement is encountered during the expansion of a macro, the specified Boolean
expression is evaluated.
If the value of this expression TRUE,
The macro processor continues to process lines from the DEFTAB until it encounters the ELSE or
ENDIF statement.
If an ELSE is found, macro processor skips lines in DEFTAB until the next ENDIF.
Once it reaches ENDIF, it resumes expanding the macro in the usual way.

If the value of the expression is FALSE,

The macro processor skips ahead in DEFTAB until it encounters next ELSE or ENDIF statement.
The macro processor then resumes normal macro expansion.

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The macro-time IF-ELSE-ENDIF structure provides a mechanism for either generating (once)
or skipping selected statements in the macro body. There is another construct WHILE statement which
specifies that the following line until the next ENDW statement, are to be generated repeatedly as long
as a particular condition is true. The testing of this condition, and the looping are done during the macro
is under expansion. The example shown below shows the usage of Macro-Time Looping statement.

WHILE-ENDW structure
When a WHILE statement is encountered during the expansion of a macro, the specified Boolean
expression is evaluated.

TRUE
The macro processor continues to process lines from DEFTAB until it encounters the
next ENDW statement.

When ENDW is encountered, the macro processor returns to the preceding WHILE,
re-evaluates the Boolean expression, and takes action based on the new value.
FALSE
The macro processor skips ahead in DEFTAB until it finds the next ENDW statement

and then resumes normal macro expansion.

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4.2.4 Keyword Macro Parameters

All the macro instruction definitions used positional parameters. Parameters and arguments are
matched according to their positions in the macro prototype and the macro invocation
statement.
The programmer needs to be careful while specifying the arguments. If an argument is to be omitted
the macro invocation statement must contain a null argument mentioned with two commas.
Positional parameters are suitable for the macro invocation. But if the macro invocation has large
number of parameters, and if only few of the values need to be used in a typical invocation, a
different type of parameter specification is required
Ex:XXX MACRO &P1, &P2… &P20, …. XXX
A1, A2… A20…
Null arguments

Keyword parameters
Each argument value is written with a keyword that names the corresponding parameter.
Arguments may appear in any order.
Null arguments no longer need to be used.
Ex: XXX P1=A1, P2=A2, P20=A20.
It is easier to read and much less error-prone than the positional method.

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Fig 4.5 Example showing the usage of Keyword Parameter

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4.3 MACRO PROCESSOR DESIGN OPTIONS

4.3.1 Recursive Macro Expansion
We have seen an example of the definition of one macro instruction by another. But we have
not dealt with the invocation of one macro by another. The following example shows the invocation of
one macro by another macro.

Problem of Recursive Expansion

Previous macro processor design cannot handle such kind of recursive macro invocation and
expansion
o The procedure EXPAND would be called recursively, thus the invocation arguments
in the ARGTAB will be overwritten.

The Boolean variable EXPANDING would be set to FALSE when the “inner” macro
expansion is finished, i.e., the macro process would forget that it had been in the middle
of expanding an “outer” macro.
Solutions
Write the macro processor in a programming language that allows recursive calls,
thus local variables will be retained.

If you are writing in a language without recursion support, use a stack to take care of
pushing and popping local variables and return addresses.

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The procedure EXPAND would be called when the macro was recognized. The arguments from the
macro invocation would be entered into ARGTAB as follows:

Parameter Value
1 BUFFER
2 LENGTH
3 F1
4 (unused)
- -

The Boolean variable EXPANDING would be set to TRUE, and expansion of the macro invocation
statement would begin. The processing would proceed normally until statement invoking RDCHAR is
processed. This time, ARGTAB would look like

Parameter Value

1 F1
2 (Unused)
-- --

At the expansion, when the end of RDCHAR is recognized, EXPANDING would be set to
FALSE. Thus the macro processor would ‘forget’ that it had been in the middle of expanding a macro
when it encountered the RDCHAR statement. In addition, the arguments from the original macro
invocation (RDBUFF) would be lost because the value in ARGTAB was overwritten with the arguments
from the invocation of RDCHAR.

4.3.2 General-Purpose Macro Processors

Macro processors that do not dependent on any particular programming language, but can be used
with a variety of different languages
Pros
Programmers do not need to learn many macro languages.
Although its development costs are somewhat greater than those for a language specific
macro processor, this expense does not need to be repeated for each language, thus save
substantial overall cost.
Cons
Large number of details must be dealt with in a real programming language
Situations in which normal macro parameter substitution should not occur, e.g.,
comments.
Facilities for grouping together terms, expressions, or statements
Tokens, e.g., identifiers, constants, operators, keywords

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Syntax had better be consistent with the source programming language

4.3.3 Macro Processing within Language Translators
The macro processors we discussed are called “Preprocessors”. o
Process macro definitions
o Expand macro invocations
o Produce an expanded version of the source program, which is then used as input to an
assembler or compiler
You may also combine the macro processing functions with the language translator:
Line-by-line macro processor
Integrated macro processor

4.4 LINE-BY-LINE MACRO PROCESSOR

Used as a sort of input routine for the assembler or compiler o
Read source program
o Process macro definitions and expand macro invocations
o Pass output lines to the assembler or compiler
Benefits
Avoid making an extra pass over the source program.
Data structures required by the macro processor and the language translator can be
combined (e.g., OPTAB and NAMTAB)
Utility subroutines can be used by both macro processor and the language translator.
Scanning input lines
Searching tables
Data format conversion

It is easier to give diagnostic messages related to the source statements

Integrated Macro Processor
An integrated macro processor can potentially make use of any information about the source
program that is extracted by the language translator.
o Ex (blanks are not significant in FORTRAN)
DO 100 I = 1,20
a DO statement
DO 100 I = 1
An assignment statement
DO100I: variable (blanks are not significant in FORTRAN).
An integrated macro processor can support macro instructions that depend upon the context in
which they occur.

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Two Marks Questions

Define Macro.
A macro instruction (macro) is a notational convenience for the programmer.
It allows the programmer to write a shorthand version of a program
A macro represents a commonly used group of statements in the source programming
language.
Expanding the macros - the macro processor replaces each macro instruction with the
corresponding group of source language statements.
What is a macro processor?
A macro processor - Essentially involve the substitution of one group of characters or lines for
another. Normally, it performs no analysis of the text it handles. It doesn’t concern the meaning of the
involved statements during macro expansion. The design of a macro processor generally is machine
independent.
Three examples of actual macro processors:

A macro processor designed for use by assembler language programmers

Used with a high-level programming language
General-purpose macro processor, which is not tied to any particular language

What are the basic macro processor functions?

Basic Macro Processors Functions

Macro processor should processes the Macro definitions

Define macro name, group of instructions

Macro invocation (macro calls)

A body is simply copied or substituted at the point of call Expansion with substitution of
parameters
Arguments are textually substituted for the parameters
The resulting procedure body is textually substituted for the call

What are the Assembler directives used for Macro Definition?

Macro Definition
Two new assembler directives are used in macro definition:
MACRO: identify the beginning of a macro definition
MEND: identify the end of a macro definition, label op operands
name MACRO parameters
:

Body

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MEND

Parameters: the entries in the operand field identify the parameters of the macro instruction.
We require each parameter begins with ‘&’
Body: the statements that will be generated as the expansion of the macro.
Prototype for the macro:

The macro name and parameters define a pattern or prototype for the macro instructions
used by the programmer

Give an example program which uses Macro Definition.

Macro Definition

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How Macro is invoked in a program? Give

example. Macro Invocation

What is Macro Expansion? Give an

example. Macro Expansion

Each macro invocation statement will be expanded into the statements that form the body of
the macro.
Arguments from the macro invocation are substituted for the parameters in the macro
prototype.
The arguments and parameters are associated with one another according to their positions.
The first argument in the macro invocation corresponds to the first parameter in the
macro prototype, etc.

Macro Expansion Example

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Program From Fig. 4.1 with Macros Expanded (fig. 4.2) (Cont.)

8) Explain the functions of two pass macro processor.

Two-pass macro processor

Pass1: process all macro definitions

Pass2: expand all macro invocation statements
Problem
Does not allow nested macro definitions
Nested macro definitions
The body of a macro contains definitions of other macros. Because all macros would
have to be defined during the first pass before any macro invocations were expanded
Solution
One-pass macro processor

9) What is the characteristic of one pass macro processor?

One-pass macro processor

Every macro must be defined before it is called
One-pass processor can alternate between macro definition and macro expansion o
Nested macro definitions are allowed

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What are the data structures used by the macro processor?

Data Structures
MACRO DEFINITION TABLE (DEFTAB) o
Macro prototype
o States that make up the macro body
o Reference to parameters are converted to a positional notation.
MACRO NAME TABLE (NAMTAB)
Role: an index to DEFTAB
Pointers to the beginning and end of the definition in DEFTAB
MACRO ARGUMENT TABLE (ARGTAB)
Used during the expansion
Invocation  Arguments are stored in ARGTAB according to their position

Write an algorithm for the Macro processor and explain.

Algorithm and Data Structure (4)

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What is the difference between a Macro and a subroutine?

Differences between Macro and Subroutine

After macro processing, the expanded file can be used as input to the assembler.
The statements generated from the macro expansions will be assembled exactly as though
they had been written directly by the programmer.
The differences between macro invocation and subroutine call
The statements that form the body of the macro are generated each time a macro is
expanded.
Statements in a subroutine appear only once, regardless of how many times the
subroutine is called.

What are the machine independent features of macro processors?

Concatenation of macro parameters
Generation of unique labels
Conditional macro expansion
Keyword Macro Parameters

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UNIT-V
Text editors - Overview of the Editing Process - User Interface – Editor Structure. - Interactive
debugging systems - Debugging functions and capabilities – Relationship with other parts of the system
– User-Interface Criteria.

EDITORS AND DEBUGGING SYSTEMS

An Interactive text editor has become an important part of almost any computing environment.
Text editor acts as a primary interface to the computer for all type of “knowledge workers” as they
compose, organize, study, and manipulate computer-based information.
An interactive debugging system provides programmers with facilities that aid in testing and
debugging of programs. Many such systems are available during these days. Our discussion is broad in
scope, giving the overview of interactive debugging systems – not specific to any particular existing
system.

5.1 TEXT EDITORS

An Interactive text editor has become an important part of almost any computing environment. Text
editor acts as a primary interface to the computer for all type of “knowledge workers” as they
compose, organize, study, and manipulate computer-based information.

A text editor allows you to edit a text file (create, modify etc…). For example the Interactive text
editors on Windows OS - Notepad, WordPad, Microsoft Word, and text editors on UNIX OS -
vi, emacs , jed, pico.

Normally, the common editing features associated with text editors are, Moving the cursor,
Deleting, Replacing, Pasting, Searching, Searching and replacing, Saving and loading, and,
Miscellaneous(e.g. quitting).

5.1.1 OVERVIEW OF THE EDITING PROCESS

An interactive editor is a computer program that allows a user to create and revise a target
document. Document includes objects such as computer diagrams, text, equations tables, diagrams, line
art, and photographs. In text editors, character strings are the primary elements of the target text.

Document-editing process in an interactive user-computer dialogue has four tasks:

Select the part of the target document to be viewed and manipulated
Determine how to format this view on-line and how to display it
Specify and execute operations that modify the target document

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Update the view appropriately

The above task involves traveling, filtering and formatting. Editing phase involves – insert,
delete, replace, move, copy, cut, paste, etc…
Traveling – locate the area of interest

Filtering - extracting the relevant subset

Formatting – visible representation on a display screen

There are two types of editors. Manuscript-oriented editor and program oriented editors.
Manuscript-oriented editor is associated with characters, words, lines, sentences and paragraphs.
Program-oriented editors are associated with identifiers, keywords, statements. User wish – what he
wants – formatted.

5.1.2 USER INTERFACE

Conceptual model of the editing system provides an easily understood abstraction of the target
document and its elements. For example, Line editors – simulated the world of the key punch – 80
characters, single line or an integral number of lines, Screen editors – Document is represented as a
quarter-plane of text lines, unbounded both down and to the right.
The user interface is concerned with, the input devices, the output devices and, the interaction
language. The input devices are used to enter elements of text being edited, to enter commands. The
output devices, lets the user view the elements being edited and the results of the editing operations
and, the interaction language provides communication with the editor.

Input Devices are divided into three categories:

text devices

button devices

Locator devices.

Text Devices are keyboard. Button Devices are special function keys, symbols on the screen.
Locator Devices are mouse, data tablet. There are voice input devices which translates spoken
words to their textual equivalents.

Output Devices are Teletypewriters (first output devices), Glass teletypes (Cathode ray tube
(CRT) technology), Advanced CRT terminals, TFT Monitors and Printers (Hard-copy).

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The interaction language could be, typing oriented or text command oriented and menu-oriented
user interface. Typing oriented or text command oriented interaction was with oldest editors, in
the form of use of commands, use of function keys, control keys etc.

Menu-oriented user interface has menu with a multiple choice set of text strings or icons. Display
area for text is limited. Menus can be turned on or off.

5.1.3 EDITOR STRUCTURE

Most text editors have a structure similar to that shown in the following figure. That is most
text editors have a structure similar to shown in the figure regardless of features and the computers
Command language Processor accepts command, uses semantic routines – performs functions
such as editing and viewing. The semantic routines involve traveling, editing, viewing and display
functions.

Editing operations are specified explicitly by the user and display operations are specified implicitly
by the editor. Traveling and viewing operations may be invoked either explicitly by the user or
implicitly by the editing operations.

In editing a document, the start of the area to be edited is determined by the current editing pointer
maintained by the editing component. Editing component is a collection of modules

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dealing with editing tasks. Current editing pointer can be set or reset due to next paragraph,
next screen, cut paragraph, paste paragraph etc..,.

When editing command is issued, editing component invokes the editing filter – generates a new
editing buffer – contains part of the document to be edited from current editing pointer. Filtering
and editing may be interleaved, with no explicit editor buffer being created.

In viewing a document, the start of the area to be viewed is determined by the current viewing
pointer maintained by the viewing component. Viewing component is a collection of modules
responsible for determining the next view. Current viewing pointer can be set or reset as a result
of previous editing operation.
When display needs to be updated, viewing component invokes the viewing filter – generates a new
viewing buffer – contains part of the document to be viewed from current viewing pointer. In
case of line editors – viewing buffer may contain the current line, Screen editors - viewing
buffer contains a rectangular cutout of the quarter plane of the text.
Viewing buffer is then passed to the display component of the editor, which produces a display by
mapping the buffer to a rectangular subset of the screen – called a window. Identical – user
edits the text directly on the screen. Disjoint – Find and Replace (For example, there are 150
lines of text, user is in 100th line, decides to change all occurrences of
‘text editor’ with ‘editor’).

The editing and viewing buffers can also be partially overlapped, or one may be completely
contained in the other. Windows typically cover entire screen or a rectangular portion of it. May
show different portions of the same file or portions of different file. Inter-file editing operations
are possible.

The components of the editor deal with a user document on two levels: In main memory and in the
disk file system. Loading an entire document into main memory may be infeasible – only part
is loaded – demand paging is used – uses editor paging routines.

Documents may not be stored sequentially as a string of characters. Uses separate editor data
structure that allows addition, deletion, and modification with a minimum of I/O and character
movement.

Types of editors based on computing environment

Editors function in three basic types of computing environments:
Time sharing

Stand-alone

Distributed.

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Each type of environment imposes some constraints on the design of an editor.

In time sharing environment, editor must function swiftly within the context of the load on the
computer’s processor, memory and I/O devices.

In stand-alone environment, editors on stand-alone system are built with all the functions to carry
out editing and viewing operations – The help of the OS may also be taken to carry out some
tasks like demand paging.

In distributed environment, editor has both functions of stand-alone editor; to run independently on
each user’s machine and like a time sharing editor, contend for shared resources such as files.

5.2 INTERACTIVE DEBUGGING SYSTEMS

An interactive debugging system provides programmers with facilities that aid in testing and
debugging of programs. Many such systems are available during these days. Our discussion is broad in
scope, giving the overview of interactive debugging systems – not specific to any particular existing
system.
Here we discuss
Introducing important functions and capabilities of IDS
Relationship of IDS to other parts of the system
The nature of the user interface for IDS

5.2.1 DEBUGGING FUNCTIONS AND CAPABILITIES

One important requirement of any IDS is the observation and control of the flow of program
execution. Setting break points – execution is suspended, use debugging commands to analyze the
progress of the program, résumé execution of the program. Setting some conditional expressions,
evaluated during the debugging session, program execution is suspended, when conditions are met,
analysis is made, later execution is resumed.
A Debugging system should also provide functions such as tracing and trace back.

Tracing can be used to track the flow of execution logic and data modifications. The control flow
can be traced at different levels of detail – procedure, branch, individual instruction, and so
on…

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Trace back can show the path by which the current statement in the program was reached. It can
also show which statements have modified a given variable or parameter. The statements are
displayed rather than as hexadecimal displacements

Program-Display capabilities
A debugger should have good program-display capabilities.
Program being debugged should be displayed completely with statement numbers.

The program may be displayed as originally written or with macro expansion.

Keeping track of any changes made to the programs during the debugging session. Support for
symbolically displaying or modifying the contents of any of the variables and constants in the
program. Resume execution – after these changes.

To provide these functions, a debugger should consider the language in which the program
being debugged is written. A single debugger – many programming languages – language independent.
The debugger- a specific programming language– language dependent. The debugger must be sensitive
to the specific language being debugged.
The context being used has many different effects on the debugging interaction. The statements
are different depending on the language

COBOL - MOVE 6.5 TO X

FORTRAN - X = 6.5
C - X = 6.5

Examples of assignment statements

Similarly, the condition that X be unequal to Z may be expressed as
COBOL- IF X NOT EQUAL TO Z
FORTRAN- IF (X.NE.Z)
C- IF(X<> Z)
Similar differences exist with respect to the form of statement labels, keywords and so on.
The notation used to specify certain debugging functions varies according to the language of
the program being debugged. Sometimes the language translator itself has debugger interface modules
that can respond to the request for debugging by the user. The source code may be displayed by the
debugger in the standard form or as specified by the user or translator.
It is also important that a debugging system be able to deal with optimized code. Many
optimizations like

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Invariant expressions can be removed from loops

Separate loops can be combined into a single loop
Redundant expression may be eliminated
Elimination of unnecessary branch instructions
Leads to rearrangement of segments of code in the program. All these optimizations create
problems for the debugger, and should be handled carefully.

5.2.2 RELATIONSHIP WITH OTHER PARTS OF THE SYSTEM

The important requirement for an interactive debugger is that it always be available. Must appear
as part of the run-time environment and an integral part of the system.

When an error is discovered, immediate debugging must be possible. The debugger must
communicate and cooperate with other operating system components such as interactive
subsystems.
Debugging is more important at production time than it is at application-development time. When
an application fails during a production run, work dependent on that application stops.
The debugger must also exist in a way that is consistent with the security and integrity
components of the system.
The debugger must coordinate its activities with those of existing and future language compilers
and interpreters.

5.2.3 USER-INTERFACE CRITERIA

Debugging systems should be simple in its organization and familiar in its language, closely
reflect common user tasks.

The simple organization contribute greatly to ease of training and ease of use.

The user interaction should make use of full-screen displays and windowing-systems as much as
possible.

With menus and full-screen editors, the user has far less information to enter and remember. There
should be complete functional equivalence between commands and menus – user where unable
to use full-screen IDSs may use commands.
The command language should have a clear, logical and simple syntax.
Command formats should be as flexible as possible.
Any good IDSs should have an on-line HELP facility. HELP should be accessible from any state
of the debugging session.

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Two Marks Questions

1. Define Text-Editors

They are the primary interface to the computer for all types of “Knowledge workers” as they
compose, organize, study and manipulate computer-based information.

Give an overview of the editing process.

An interactive editor is a computer program that allows a user to create and revise a target
document.
The term document includes objects such as computer programs, texts, equations, tables,
diagrams, line arts and photographs-anything that one might find on a printed page.
Text editor is one in which the primary elements being edited are character strings of the
target text.
The document editing process is an interactive user-computer dialogue designed to
accomplish four takes:
Select the part of the target document to be viewed and manipulated
Determine how to format this view on-line and how to display it.
Specify and execute operations that modify the target document.
Update the view appropriately.

Define Traveling.

Traveling – Selection of the part of the document to be viewed and edited. It involves first
traveling through the document to locate the area of interest such as “next screenful”,”bottom”, and
“find pattern”
Traveling specifies where the area of interest is;
Filtering: The selection of what is to be viewed and manipulated is controlled by filtering.

Filtering extracts the relevant subset of the target document at the point of interest, such as next
screenful of text or next statement.

Formatting: Formatting then determines how the result of filtering will be seen as a visible
representation (the view) on a display screen or other device.

Editing: In the actual editing phase, the target document is created or altered with a set of
operations such as insert, delete, replace, move or copy.

4. Explain the User-Interface of an Editor.

The user of an interactive editor is presented with a conceptual model of the editing system. The
model is an abstract framework on which the editor and the world on which the operations are based.
Some of the early line editors simulated the world of 80-character card image lines.

The Screen-editors define a world in which a document is represented as a quarter-plane of text

lines. Unbounded both down and to the right. The user sees, through a cutout, only a rectangular subset
of this plane on a multi-line display terminal. The cutout can be move left or right, and up or down, to
display other portions of the document.
5. Define Input Devices.

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Input Devices: The input devices are used to enter elements of text being edited, to enter commands,
and to designate editable elements.
INPUT DEVICES are categorized as:

Text or string devices are typically typewriter like keyboards on which user presses and
release keys, sending unique code for each key. Virtually all computer key boards are of the QWERTY
type.

Button or Choice devices generate an interrupt or set a system flag, usually causing an
invocation of an associated application program. Also special function keys are also available on the
key board.

Locator devices: They are two-dimensional analog-to-digital converters that position a

cursor symbol on the screen by observing the user’s movement of the device. The most common such
devices are the mouse and the tablet.
Define Data Tablet.

The Data Tablet is a flat, rectangular, electromagnetically sensitive panel. Either the ballpoint
pen like stylus or a puck, a small device similar to a mouse are moved over the surface. The tablet
returns to a system program the co-ordinates of the position on the data tablet at which the stylus or
puck is currently located. The program can then map these data-tablet coordinates to screen coordinates
and move the cursor to the corresponding screen position.

.Text devices with arrow (Cursor) keys can be used to simulate locator devices. Each of these
keys shows an arrow that points up, down, left, or right. Pressing an arrow key typically generates an
appropriate character sequence, the program interprets this sequence and moves the cursor in the
direction of the arrow on the key pressed.

Voice-input Devices: which translate spoken words to their textual equivalents, may prove to be
the text input devices of the future
7. Define Output Devices

The output devices let the user view the elements being edited and the result of the editing
operations. The first output devices were teletypewriters and other character-printing terminals that
generated output on paper. Next CRT (Cathode Ray Tube) technology which uses CRT screen
essentially to simulate the hard-copy teletypewriter. Todays advanced CRT terminals use hardware
assistance for such features as moving the cursor, inserting and deleting characters and lines, and
scrolling lines and pages.
8. What is Interaction Language?

Interaction Language: The interaction language of the text editor is generally one of several
common types.

The typing oriented or text command-oriented method is the oldest of the major editing
interfaces. The user communicate with the editor by typing text strings both for command names and
for operands. These strings are sent to the editor and are usually echoed to the output device.

Typed specification often requires the user to remember the exact form of all commands, or at
least their abbreviations.

Help facility have to be used or manuals have to be referred. Time consuming for in-
experienced users.

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2) Function key interfaces:

Each command is associated with marked key on the key

board E.g. Insert key, Shift key, Control key
Menu oriented interfaces

A menu is a multiple choice set of text strings or icons which are graphical symbols that
represent objects or operations

The user can perform actions by selecting items for the menus
The editor prompts the user with a menu

One problem with menu oriented system can arise when there are many possible actions and
several choices are required to complete an action.

9. Explain with a neat diagram the structure of an Editor.

Editing Editing
component buffer Editing
filter

Traveling Main
component memory

input Command
language Viewing
processor Viewing Viewing filter
component buffer

Paging
Routines

Output
devices Display File
component system

Control
Data
Typical Editor Structure
10. What is the Command Language Processor?

The command Language Processor accepts input from the user’s input devices, and analyzes
the tokens and syntactic structure of the commands. It functions much like the lexical and syntactic
phases of a compiler. The command language processor may invoke the semantic routines directly. In
a text editor, these semantic routines perform functions such as editing and viewing.

11. What are interactive debug systems?

An interactive debugging system provides programmers with facilities that aid in testing and
debugging of programs interactively.

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What are all the Debugging Functions and Capabilities?

One important requirement of any IDS is the observation and control of the flow of
program execution
Setting break points – execution is suspended, use debugging commands to analyze the
progress of the program, résumé execution of the program
Setting some conditional expressions, evaluated during the debugging session, program
execution is suspended, when conditions are met, analysis is made, later execution is
resumed
A Debugging system should also provide functions such as tracing and trace back.

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