BMS COLLEGE OF ENGINEERING, BENGALURU-19

Autonomous Institute, Affiliated to VTU

COURSE PLAN
Course Title: DIGITAL SYSTEM DESIGN USING VERILOG (V Semester)
Course Code: 23MD5PE1DV Credits: 3
Faculty handling the course: Dr.Suma M.S

A Course Outcomes

At the end of the course the student will have the

Analyze the knowledge of HDL for modeling and functional

CO1
verification of digital circuits.
CO2 Analyze digital circuits using suitable Verilog HDL modeling.
Design a digital circuit for complex systems using Verilog HDL
CO3
and state machines.
Program a given application/problem statement using EDA tools,
CO4
demonstrate and document the same.
B CO-PO mapping

PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PS03
CO1 3 3
CO2 3 3
CO3 3 3
CO4 2 2 2 2

Indicate strength of mapping (1/2/3) with justification

C Proposed Assessment Plan (for 50 marks of CIE)

Tool Remarks Marks

Internals Best 2 of 3 40
QUIZ 1 Quiz and 1 Assignment -

Lab Component If applicable

Self-Study Component If applicable -
AAT Seminar/ Mini-project/ 10
any other (specify)
Total 50

NOTE: Add/Delete ROW as required

 BMS COLLEGE OF ENGINEERING, BENGALURU-19
Autonomous Institute, Affiliated to VTU
D Proposed Lecture Plan

Lecture # Unit # Topic Remarks

1 to 8 1
Introduction:Design Methodology-An
Introduction to Verilog History, System
representation, Number representation and
Verilog ports. Verilog Data Types: Net,
Register and Constant.
Verilog Operators: Logical, Arithmetic,
Bitwise, Reduction, Relational,
Concatenation and Conditional. Verilog
Primitives.
9 to 16 2
Modeling Styles:
Dataflow Modeling: Boolean Equation-
Based Models of Combinational Logic,
Propagation Delay and Continuous
Assignments.
Structural Modeling: Design of
Combinational Logic, Verilog Structural
Models, Module Ports, Top-Down Design
and Nested Modules. Gate level modelling.
17 to 24 3
Behavioral Modeling:
Behavioral Models of Flip-Flops and
Latches, Comparison of Styles for
Behavioral modeling, Behavioral Models of
Multiplexers, Encoders, and Decoders.
25 to 32 4 Synchronous sequential circuits: Moore
and Mealy FSM, Design and implementation
of sequence detector, serial adder, code
converter.
33 to 40 5 Implementation Fabrics: Introduction of
Programmable Logic Array (PLA),
Programmable Array Logic (PAL),
Programmability of PLDs. Complex PLDs
(CPLDs), Field-Programmable Gate Arrays
(FPGA).The Role of FPGAs in the ASIC
Market, FPGA Technologies. Comparison of
design implementation using CPDs, FPGA
and ASIC.
E Proposed Tutorial Plan (if applicable) NA
F Proposed Laboratory Plan (if applicable)

G Proposed AAT (if applicable)

 AAT Description (10 Marks)

Propose and execution of an open ended project in a group of maximum up to three
students. Project domain must be a circuit relevant to the application in the
Biomedical field. Self-Study Evaluation Rubrics
Problem Definition 2M
 BMS COLLEGE OF ENGINEERING, BENGALURU-19
Autonomous Institute, Affiliated to VTU
Execution 3 M
Description/(Marks) 1 2 3

Problem definition(2) The key elements of The group identifies

the problem and key elements of the
clearly outlines the problem and clearly
objectives in an Outlines the
effective manner objectives in an
with effective manner
Little assistance. with no assistance.
Execution(3) Implements the Implements the Implements the
solution in a manner solution in a manner solution in a manner
that addresses the that addresses that addresses
problem statement multiple contextual thoroughly and deeply
but ignores relevant factors of the multiple contextual
contextual factors. problem in a surface factors of the problem
manner.

Presentation(2) Visual aids are well Length of

prepared, presentation is
informative, within the assigned
effective, and not time limits.
distracting. Information was well
communicated
Report(3) Writing is clear, Work is written with All sources identified
logical, and clarity and without and referenced
organized. error. appropriately.

Presentation and Report 5M

H List the suggestions/Comments for improvement of the course (or similar course) delivered during
the previous Academic year (as mentioned in the Course File)
.
I Proposed Action Plan to address the suggestions/Comments

K Proposed innovations in TLP/Best Practices (delivery/assessment)

Group discussions and activity related to course in regular class.
L Any other Nil

Signature of the Faculty Signature of the HOD

Date: