Resume 199991
Resume 199991
Resume 199991
Career Objective
To secure a challenging position where I can effectively contribute my skills, and innovative
ideas to gain knowledge in the work oriented environment.
Education
Bachelor of Technology, Electronics & communication engineering , Dhanekula institute
of engineering, Vijayawada, 61 %
Board of Intermediate Education (10+2) , sri chaitnya jr College, Vijayawada, 74 %
Secondary School Certificate , Vignan Bharath high School, Vijayawada, 87 %
Academic Project
Project Name : RF based speed control system
Duration : 2 months
Role : Design and Development
Environment : aurdino ide
Technologies : Raspberri pi,Embedded c.
The main objective of this project is to design a RF based speed control system meant for
vehicle's speed control and monitors the zones which can run on an embedded system. Smart
Display and Control (SDC) can be custom designed to fit into a vehicle's dashboard and displays
information on the vehicle. Once the information is received from the zones, the vehicle's
embedded unit automatically alerts the driver, to reduce the speed according to the zone, it waits
for few seconds and otherwise vehicle's SDC unit automatically reduces the speed..
Achievements
Participated in college and school level Essay competition and received applauds.
Event organizer in school annual day functions and other technical events.
Strengths
Personal Details
Name : Rajesh Khanna Kalapala
Father’s Name : Anand Kalapala
Gender : Male
Date of Birth : 01-09-1997
Contact Address : 9014153835