Testing & Verification of PLC Code For Process Control
Testing & Verification of PLC Code For Process Control
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Automated tests allow a better implementation of repeti- However the object functionality is not expressed and
tive or tedious duties and can be hardly accomplished by validated at this stage.
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Proceedings of ICALEPCS2013, San Francisco, CA, USA THPPC080
this need, as its main purpose is to send an order and a global model (representing the whole system) meets the
retrieve a result. The test script appeared to be simple requirements. It is feasible to automatize the creation of
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THPPC080 Proceedings of ICALEPCS2013, San Francisco, CA, USA
programs have been studied before for different application PLC software development lacks of modern software
areas and description languages. The reference [7] applies engineering best practices such as unit test or daily builds.
algorithmic verification to the SFC language. Untimed Automated testing via SCADA is feasible and in certain
SFC models are transformed into the input language cases allows to save the time spend on testing. We
of the Cadence SMV tool. Timed SFC models are found examples where the test case can be shared between
transformed into timed automata and they can be analyzed different objects. We also reuse automated test scripts
by the UPPAAL tool. The reference [8] models and to test different types of PLC. Automatic testing permits
analyzes a safety-critical system using coloured Petri reducing human errors, though the approach has several
nets as formalism and symbolic model checking for the issues: (1) it involves many components (the systems must
analysis. In [9] they model and apply formal verification be operative and properly communicating) which makes
to a particular timed multitask PLC to a specific platform it hard to support and replicate; (2) it is not possible to
from the Bosch Group. test all possible combinations of parameters of a baseline
object; the cost of each parameter’s combination test is
Our Approach and Contribution For the verifi- relatively high; (3) it is a black box testing of PLC code
cation of UNICOS-CPC baseline objects, we propose - it is not possible to manipulate or observe the variables
a methodology for its formalization in automata based which are not communicated. Additional PLC code must
models for further treatment with verification tools (see also be implemented to simulate PLC events and inputs via
Copyright ○
Fig. 3). Baseline objects are formalized in a generic the supervision scripts.
intermediate model and then using another transformation Formal verification techniques are not widely used in
ISBN 978-3-95450-139-7
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Proceedings of ICALEPCS2013, San Francisco, CA, USA THPPC080
Table 2: Overview of Automatic Testing and Formal Verification for UNICOS Baseline Objects
Advantages Disadvantages
Automatic Testing with the real system Sophisticated maintenance
Testing Technology is available High price for new test case
Reduce human errors Black box testing
Reusable for different PLC Difficult to find the source of the problem
Model Explores all the combinations Verification of a system model
Checking Earlier bug detection Need of automatic generation tools
Avoid human errors Need to prove the transformations
Complexity hidden by the generation tools State space explosion
Counter-examples to find the source problem Applying abstractions techniques is not trivial
industry because of the complexity of, both, building tool to produce models of our control systems and verify
the models of the PLC systems and formalizing the them with different model checkers is under development.
specifications. Control system engineers are usually not A mathematical proof of the transformations rules (se-
familiar with these techniques, rising the need of automatic mantics preservation) is required as providing a formalism
generation tools to hide this complexity. Another common to specify unambiguously the test catalog, hiding the
problem in formal verification is the state explosion complexity of temporal logic for control engineers.
problem. As an example, trying to verify UNICOS-CPC
objects with about 750 lines of ST code and about 120 REFERENCES
variables, integers or float, causes some severe issues with [1] ANSI/ISA 62381: Factory Acceptance Test (FAT), Site
the performance of the model checker. However, providing Acceptance Test (SAT), and Site Integration Test (SIT),
(1) automatic generation tools for the models, (2) a good Automation Systems in the Process Industry.
language to express properties, and (3) the right technique [2] E. Dustin, T. Garrett, B. Gauf. Implementing Automated
for abstraction, model checking can be an useful and Software Testing: How to Save Time and Lower Costs
powerful technique to verify PLC control programs. Model While Raising Quality”. Addison-Wesley Professional,
checkers provide counter-examples, when the model does March 2009.
not reach a specification property. This feature definitely [3] E. Blanco et al. UNICOS Evolution: CPC version 6,
helps the developer to find the original problem. ICALEPCS, Grenoble (France), 2011.
Table 2 summarizes some of the advantages and disad- [4] B. Copy et al. Model Oriented Application Generation for
vantages of both approaches. Industrial Control Systems, ICALEPCS, Grenoble (France),
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CONCLUSIONS AND FUTURE WORK [5] IEC 61131: Programming languages for programmable
This paper present an analysis of two different tech- logic controllers, International Electrotechnical Commis-
niques aimed to test and verification PLC control systems, sion.
specifically applied to UNICOS-CPC baseline objects. [6] J. O. Blech and S. O. Biha. Verification of PLC Properties
Automatic testing and formal verification approaches are Based on Formal Semantics in Coq, 9th SEFM, Montevideo
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