S.

NO PART QUESTION CO KL MARK

1 A State Associative law CO1 Remember 2

2 A Convert Binary to Octal number 010101011 CO1 Understand 2

3 A State the principles of duality theorem. CO1 Remember 2

4 A Define Binary Logic. CO1 Understand 2

5 A Prove the following using Demorgan’ theorem [(X+Y)’+(X+Y)’]’= X+Y CO1 Apply 2

6 A Simplify the following Boolean function. F= x'y'+xy+x'y CO1 Analysis 2

7 A What are the methods adopted to reduce Boolean function? CO1 Understand 2
8 A Express the Boolean function F =A+B’C in sum of minterms. CO1 Understand 2

9 A Express the Boolean function F=xy+x’z in production of maxterms. CO1 Understand 2

14 A Describe the canonical forms of the Boolean function. CO1 Remember 2

15 A Realize G = AB'C +DE+F' CO1 Analysis 2
20 A What are the limitations of K-Map? CO1 Remember 2
21 A List out the advantage and disadvantage of K-map methode. CO1 Remember 2
22 A Write down the use of Don’t care conditions? CO1 Remember 2
28 A Why we go in for tabulation method? CO1 Remember 2
29 A What are prime-implicants? CO1 Remember 2

30 A List out the advantages and disadvantages of Quine-McCluskeymethod? CO1 Understand 2

32 A Implement AND gate using only NOR gate CO1 Understand 2

33 A Why NAND and NOR gates are called Universal gates? CO1 Remember 2
34 A What is binary number System? CO1 Remember 2
What is the algebraic function of Exclusive-OR gate and Exclusive-NOR
35 A CO1 Remember 2
gate?
36 A Implement NOR using NAND only. CO1 Understand 2
37 A Using Demorgan's theorem find a. (A+B+C)' b. (A(B+C))' CO1 Apply 2
38 A Illustrate NOR Operation with a truth table CO1 Evaluate 2
Simplify the Boolean expression using K-Map F(A, B, C, D)= ∏M
13 B CO1 Analysis 4
(1,3,7,13,15)
16 B Describe prime implicants and essential prime implicants. CO1 Remember 6
 Simplify the Boolean expression using K-Map F= A’B’C’+ B’CD’+
12 B CO1 Analysis 8
A’BCD’+ AB’C’
25 B Minimize the following Boolean function: AB + (AC)' + AB’C (AB + C) CO1 Understand 8
Convert the following Boolean expression to standard SOP form: 1) Y=
26 B CO1 Remember 8
A+ B’C and 2) Y= (A+B’) (B+C) (A+C’).
Simplify the Boolean expression using K-Map F(A, B, C, D)= ∏M (0, 2, 3,
27 B CO1 Apply 8
8, 9, 12, 13, 14, 15)
Interpret the logical expression using K-map in SOP and POS form : F (A,
17 B CO1 Apply 10
B, C, D) =∑m (0, 2, 3, 6, 7) + d (8, 10, 11, 15).
Find the complement of the following functions: i) F= (xy + y’z + xz) x
19 B CO1 Apply 10
and ii) F = wx’y + xy’+ wxz
Simplify the Boolean function in Sum of Products(SOP) and Product of
11 B CO1 Analysis 12
Sum(POS) F(w,x,y,z)=∑m(0,1,2,5,8,9,10).
State and prove the following: i) Demorgan's Theorem, ii) Associative
10 B CO1 Apply 16
Law, iii) Distributive Law and Commutative Law
Minimize the expression using quineMccluskey(tabulation)
18 B CO1 Apply 16
F(w,x,y,z)=∑m(0,1,2,3,10,11,12,14,15) Method
Simplify the following switching functions using Karnaugh map method
23 B CO1 Apply 16
and realize expression using gates F(A,B,C,D) = Σ(0,3,5,7,8,9,10,12,15).
Simplify the given boolean function in POS form using K- map and draw
24 B the logic diagram using Only NOR gates F(A,B,C,D)= ∑m CO1 Apply 16
(0,1,4,7,8,10,12,15)+d(2,6,11,14).
Minimize the expression using quineMccluskey(tabulation)
31 B CO1 Analysis 16
F=∑m(0,1,9,15,24,29,30) +∑d(8,11,31). Method
39 A Write about the design procedure for combinational circuits. CO2 Apply 2
40 A What is BCD adder? CO2 Remember 2
41 A Define Full adder and mention its types. CO2 Understand 2
42 A Construct full adder circuit using two half adder CO2 Apply 2
43 A Convert BCD code 1001 into its Excess-3 equivalent. CO2 Understand 2
44 A Sketch the logic diagram for Full adder circuit. CO2 Apply 2
45 A Draw the logic circuit of Half subtractor. CO2 Analysis 2
46 A Write down the limitations of Half adder CO2 Apply 2
47 A Difference between encoder and decoder CO2 Understand 2
64 A Distinguish between demultiplexer and decoder CO2 Analysis 2
65 A Define Combinational logic circuits? Give examples CO2 Understand 2
Develop the following function using suitable multiplexer F=
66 A CO2 Apply 2
Σm(0,2,5,7).
67 A Sketch the general logic diagram of Demultiplexer? CO2 Apply 2
68 A List out the applications of multiplexer CO2 Remember 2
69 A Construct 2:1 multiplexer? CO2 Apply 2
70 A Why the Mux is called data selector CO2 Remember 2
71 A Convert gray code 101011 into its binary equivalent. CO2 Understand 2
72 A List out the applications of decoder CO2 Remember 2
73 A Differentiate between MUX and DE-MUX. CO2 Understand 2
74 A Convert Binary code 10101101 into its gray equivalent. CO2 Understand 2
75 A What is code converter? CO2 Remember 2
76 A Construct the truth table of full subtractor. CO2 Apply 2
Identify the basic principle used in order to check or generate the
77 A CO2 Remember 2
proper parity bit in a given code word.
78 A Specify the advantages of parallel adders. CO2 Remember 2
Implement the function with an 8:1 multiplexer. F (A,B,C,D) = Σm
55 B CO2 Apply 4
(0,1,2,6,9)
60 B Deduce the design of a 1:8 demultiplexer circuit. CO2 Analysis 6
Implement the function with an 8:1 multiplexer. F (A,B,C,D) = Σm
63 B CO2 Analysis 6
(0,1,2,5,6,9)
56 B How would you design a 3:8 decoder using basic gates? CO2 Analysis 8
Formulate the following Boolean function using 4 x 1 multiplexers. F(A,
58 B CO2 Analysis 8
B,C, D) = Σm(1,2,3,6,7,8,11,12,14).
With necessary diagrams, explain in detail about the working of a 4-bit
48 B carry look ahead adder. Also mention its advantages over conventional CO2 Understand 10
adder.
54 B Draw and explain the working of 2 x 4 decoder circuit. CO2 Understand 10
61 B Design a Excess - 3 to BCD code convertor using logic gates. CO2 Analysis 10
62 B Design a BCD to Excess – 3 code converter using logic gates CO2 Analysis 10
Design a full Adder and derive the expressions for sum and carry.
53 B CO2 Analysis 12
Realize using gates.
Draw the truth table of a full subtractor. Minimize the expression of
49 B difference and borrow and implement them by using AND, OR and NOT CO2 Apply 16
gates. Obtain the equivalent circuit with NAND gates alone.

51 B Design a 4-bit gray to binary code converter using gates. CO2 Apply 16
52 B Design a code convertor that converts 8421 to EXCESS-3 code. CO2 Analysis 16
57 B Design a Binary to gray code converter using gates. CO2 Apply 16
59 B How would you design full adder using two half adder? CO2 Apply 16
Implement the Boolean function. F (A, B, C, D) = Σ (0, 1, 5, 7, 8, 13, 14)
50 B CO2 Analysis
with a 8 x 1 multiplexer.
79 A State synchronous counter?And mention designing steps? CO3 Remember 2
80 A what is the problem encountered in JK flio flop? CO3 Remember 2
81 A Draw the truth table for JK flip flop CO3 Understand 2
85 A Draw the logic circuit of a clocked jk flip-flop CO3 Understand 2
86 A compare coimbinational circuit and sequential circuits CO3 Analysis 2
87 A what is the drawback of SR flip flop? CO3 Remember 2
88 A Compare the logics of synchronous and aynchrnous counter CO3 Analysis 2
89 A list some examples of the applications of flip flop CO3 Remember 2
90 A write the Excitation Table for T Flip flop CO3 Apply 2
94 A what is an excitation table? CO3 Remember 2
95 A define shift register? CO3 Remember 2
96 A Mention the different types of shift registers? CO3 Apply 2
84 B Explain the working of D-Flip flop. CO3 Understand 6
Draw the logic diagram of JK flip flop and give its characteristic table
82 B CO3 Understand 8
and exciatation table.
83 B Explain the working of three bit synchronous binary up counter CO3 Understand 8
92 B Design and explain any of shift register in details. CO3 Analysis 8
Design a Synchronous counter using JK flip flop to count the following
93 B CO3 Analysis 10
sequence 7,4,3,1,5,0,7…
91 B Design A synchronous counter wit states 0,1,2,3,0,1 using JK flip flop CO3 Apply 16

97 B Explain the different types of shift registers with neat diagram CO3 Understand 16
98 B Design a synchronous MOD-10 counter using D Flip flop CO3 Apply 16
 DPCO UNIT 1 QB
S.No Q.Part Questions Cos
1 A State Associative law CO1

2 A Convert Binary to Octal number 010101011 CO1

3 A State the principles of duality theorem. CO1

4 A Define Binary Logic. CO1

5 A Prove the following using Demorgan’ theorem [(X+Y)’+(X+Y)’]’= X+Y CO1

6 A Simplify the following Boolean function. F= x'y'+xy+x'y CO1

7 A What are the methods adopted to reduce Boolean function? CO1

8 A Express the Boolean function F =A+B’C in sum of minterms. CO1

9 A Express the Boolean function F=xy+x’z in production of maxterms. CO1

10 A Describe the canonical forms of the Boolean function. CO1

11 A Realize G = AB'C +DE+F' CO1

12 A What are the limitations of K-Map? CO1

13 A List out the advantage and disadvantage of K-map methode. CO1

14 A Write down the use of Don’t care conditions? CO1

15 A Why we go in for tabulation method? CO1

16 A What are prime-implicants? CO1

List out the advantages and disadvantages of Quine-

17 A CO1
McCluskeymethod?

18 A Implement AND gate using only NOR gate CO1

19 A Why NAND and NOR gates are called Universal gates? CO1

20 A What is binary number System? CO1

What is the algebraic function of Exclusive-OR gate and Exclusive-NOR

21 A CO1
gate?

22 A Implement NOR using NAND only. CO1

23 A Using Demorgan's theorem find a. (A+B+C)' b. (A(B+C))' CO1

24 A Illustrate NOR Operation with a truth table CO1

Simplify the Boolean expression using K-Map F(A, B, C, D)= ∏M

25 B CO1
(1,3,7,13,15)

26 B Describe prime implicants and essential prime implicants. CO1

 Simplify the Boolean expression using K-Map F= A’B’C’+ B’CD’+
27 B CO1
A’BCD’+ AB’C’

28 B Minimize the following Boolean function: AB + (AC)' + AB’C (AB + C) CO1

Convert the following Boolean expression to standard SOP form: 1) Y=

29 B CO1
A+ B’C and 2) Y= (A+B’) (B+C) (A+C’).
Simplify the Boolean expression using K-Map F(A, B, C, D)= ∏M (0, 2,
30 B CO1
3, 8, 9, 12, 13, 14, 15)
Interpret the logical expression using K-map in SOP and POS form : F
31 B CO1
(A, B, C, D) =∑m (0, 2, 3, 6, 7) + d (8, 10, 11, 15).
Find the complement of the following functions: i) F= (xy + y’z + xz) x
32 B CO1
and ii) F = wx’y + xy’+ wxz
Simplify the Boolean function in Sum of Products(SOP) and Product of
33 B CO1
Sum(POS) F(w,x,y,z)=∑m(0,1,2,5,8,9,10).
State and prove the following: i) Demorgan's Theorem, ii) Associative
34 B CO1
Law, iii) Distributive Law and Commutative Law
Minimize the expression using quineMccluskey(tabulation)
35 B CO1
F(w,x,y,z)=∑m(0,1,2,3,10,11,12,14,15) Method
Simplify the following switching functions using Karnaugh map method
36 B and realize expression using gates F(A,B,C,D) = CO1
Σ(0,3,5,7,8,9,10,12,15).
Simplify the given boolean function in POS form using K- map and draw
37 B the logic diagram using Only NOR gates F(A,B,C,D)= ∑m CO1
(0,1,4,7,8,10,12,15)+d(2,6,11,14).
Minimize the expression using quineMccluskey(tabulation)
38 B CO1
F=∑m(0,1,9,15,24,29,30) +∑d(8,11,31). Method
 BLT MARKS
Remember 2

Understand 2

Remember 2

Understand 2

Apply 2

Analysis 2

Understand 2

Understand 2

Understand 2

Remember 2

Analysis 2

Remember 2

Remember 2

Remember 2

Remember 2

Remember 2

Understand 2

Understand 2

Remember 2

Remember 2

Remember 2

Understand 2

Apply 2

Evaluate 2

Analysis 4

Remember 6
 Analysis 8

Understand 8

Remember 8

Apply 8

Apply 10

Apply 10

Analysis 12

Apply 16

Apply 16

Apply 16

Apply 16

Analysis 16
 DPCO Unit 2 QB
S.No Q.Part Questions Cos BLT
A Write about the design procedure for combinational circuits. CO2 Apply
1
A What is BCD adder? CO2 Remember
2
A Define Full adder and mention its types. CO2 Understand
3
A Construct full adder circuit using two half adder CO2 Apply
4
A Convert BCD code 1001 into its Excess-3 equivalent. CO2 Understand
5
A Sketch the logic diagram for Full adder circuit. CO2 Apply
6
A Draw the logic circuit of Half subtractor. CO2 Analysis
7
A Write down the limitations of Half adder CO2 Apply
8
A Difference between encoder and decoder CO2 Understand
9
A Distinguish between demultiplexer and decoder CO2 Analysis
10
A Define Combinational logic circuits? Give examples CO2 Understand
11
Develop the following function using suitable multiplexer F=
A CO2 Apply
12 Σm(0,2,5,7).

A Sketch the general logic diagram of Demultiplexer? CO2 Apply

13
A List out the applications of multiplexer CO2 Remember
14
A Construct 2:1 multiplexer? CO2 Apply
15
A Why the Mux is called data selector CO2 Remember
16
A Convert gray code 101011 into its binary equivalent. CO2 Understand
17
A List out the applications of decoder CO2 Remember
18
A Differentiate between MUX and DE-MUX. CO2 Understand
19
A Convert Binary code 10101101 into its gray equivalent. CO2 Understand
20
A What is code converter? CO2 Remember
21
A Construct the truth table of full subtractor. CO2 Apply
22
 Identify the basic principle used in order to check or generate
A CO2 Remember
23 the proper parity bit in a given code word.

A Specify the advantages of parallel adders. CO2 Remember

24
Implement the function with an 8:1 multiplexer. F (A,B,C,D) =
B CO2 Apply
25 Σm (0,1,2,6,9)

B Deduce the design of a 1:8 demultiplexer circuit. CO2 Analysis

26
Implement the function with an 8:1 multiplexer. F (A,B,C,D) =
B CO2 Analysis
27 Σm (0,1,2,5,6,9)

B How would you design a 3:8 decoder using basic gates? CO2 Analysis
28
Formulate the following Boolean function using 4 x 1
B CO2 Analysis
29 multiplexers. F(A, B,C, D) = Σm(1,2,3,6,7,8,11,12,14).
With necessary diagrams, explain in detail about the working of
B a 4-bit carry look ahead adder. Also mention its advantages over CO2 Understand
30 conventional adder.
B Draw and explain the working of 2 x 4 decoder circuit. CO2 Understand
31
B Design a Excess - 3 to BCD code convertor using logic gates. CO2 Analysis
32
B Design a BCD to Excess – 3 code converter using logic gates CO2 Analysis
33
Design a full Adder and derive the expressions for sum and
B CO2 Analysis
34 carry. Realize using gates.
Draw the truth table of a full subtractor. Minimize the expression
of difference and borrow and implement them by using AND, OR
B CO2 Apply
35 and NOT gates. Obtain the equivalent circuit with NAND gates
alone.
B Design a 4-bit gray to binary code converter using gates. CO2 Apply
36
B Design a code convertor that converts 8421 to EXCESS-3 code. CO2 Analysis
37
B Design a Binary to gray code converter using gates. CO2 Apply
38
B How would you design full adder using two half adder? CO2 Apply
39
Implement the Boolean function. F (A, B, C, D) = Σ (0, 1, 5, 7, 8,
B CO2 Analysis
40 13, 14) with a 8 x 1 multiplexer.
MARKS
2

2
2

10

10

10

10

12

16

16

16

16

16
 DPCO Unit 3 QB
S.No Q.Part Questions Cos

1 A State synchronous counter?And mention designing steps? CO3

2 A what is the problem encountered in JK flio flop? CO3

3 A Draw the truth table for JK flip flop CO3

7 A Draw the logic circuit of a clocked jk flip-flop CO3

8 A compare coimbinational circuit and sequential circuits CO3

9 A what is the drawback of SR flip flop? CO3

10 A Compare the logics of synchronous and aynchrnous counter CO3

11 A list some examples of the applications of flip flop CO3

12 A write the Excitation Table for T Flip flop CO3

16 A what is an excitation table? CO3

17 A define shift register? CO3

18 A Mention the different types of shift registers? CO3

6 B Explain the working of D-Flip flop. CO3

Draw the logic diagram of JK flip flop and give its characteristic
4 B CO3
table and exciatation table.

5 B Explain the working of three bit synchronous binary up counter CO3

14 B Design and explain any of shift register in details. CO3

Design a Synchronous counter using JK flip flop to count the

15 B CO3
following sequence 7,4,3,1,5,0,7…

Design A synchronous counter wit states 0,1,2,3,0,1 using JK flip

13 B CO3
flop

19 B Explain the different types of shift registers with neat diagram CO3

20 B Design a synchronous MOD-10 counter using D Flip flop CO3

 BLT MARKS

Remember 2

Remember 2

Understand 2

Understand 2

Analysis 2

Remember 2

Analysis 2

Remember 2

Apply 2

Remember 2

Remember 2

Apply 2

Understand 6

Understand 8

Understand 8

Analysis 8

Analysis 10

Apply 16

Understand 16

Apply 16