IC PACKAGE
RELIABILITY
TESTS
RAGHAVENDRA ANJANAPPA
RAGHAVENDRA
ANJANAPPA IC PACKAGE RELIABILITY - OVERVIEW
Integrated circuits (ICs) are at the heart of modern electronics, enabling a vast array of applications from consumer
gadgets to critical industrial systems. However, the performance and longevity of these ICs heavily depend on the
reliability of their packaging. IC package reliability refers to the ability of the packaging to protect the integrated circuit
from environmental stresses and maintain functionality throughout its intended lifespan.
Importance of IC Package Reliability
Protection from Environmental Factors: IC packages safeguard sensitive semiconductor components from moisture,
temperature fluctuations, mechanical stress, and contaminants. Reliable packaging ensures that the IC can withstand
various environmental conditions without degradation.
Electrical Performance: The packaging affects electrical characteristics such as signal integrity, power dissipation, and
thermal management. A reliable package ensures consistent performance and minimizes failures related to electrical
issues.
Market Confidence: High reliability in IC packaging fosters consumer trust and confidence. Manufacturers that prioritize
package reliability can differentiate themselves in a competitive market, leading to increased sales and customer loyalty.
Cost Efficiency: Reliable packaging reduces the likelihood of field failures, returns, and warranty claims, ultimately
lowering costs associated with rework, repairs, and replacements.
RAGHAVENDRA
ANJANAPPA IC PACKAGE RELIABILITY – KEY FACTORS
Key Factors Influencing IC Package Reliability
Materials: The choice of materials for the package (e.g., mold compounds, substrates,
encapsulants) significantly impacts reliability. Advanced materials can enhance moisture resistance
and thermal conductivity.
Design: The package design, including dimensions, lead frames, and thermal interfaces, plays a
crucial role in reliability. Proper design minimizes stress concentrations and facilitates efficient heat
dissipation.
Manufacturing Processes: The quality of the manufacturing processes (e.g., die attach, wire
bonding, encapsulation) affects the integrity of the package. Rigorous quality control measures are
essential to ensure reliability.
Testing and Qualification: Comprehensive testing, including thermal cycling, moisture sensitivity,
and mechanical stress testing, is necessary to evaluate and qualify IC packages for reliability under
various conditions.
RAGHAVENDRA
ANJANAPPA
MOISTURE SENSITIVITY LEVEL TESTING
Moisture Sensitivity Level testing (MSL testing) identifies the
classification level of non-hermetic solid state surface mount
devices (SMDs) that are sensitive to moisture-induced stress.
Moisture sensitivity level testing determines how to properly
package, store and handle SMDs to avoid damage during reflow
solder attachment.
It is essential to establish a package’s moisture sensitivity level
prior to subjecting the part to the preconditioning sequence. This Specification Test Sequence
MSL level will dictate storage times for unsealed devices awaiting ► J-STD-020 ► Initial visual inspection
assembly. MSL testing is usually performed at two levels to ► J-STD-035 ► 1st acoustical microscope
determine the level of capability at the highest and lowest ► CSAM ► Bake for 24 hours at 125°C
temperatures that the SMD is expected to see during its actual ► Moisture Soak
assembly. ► Reflow 3X
► Final visual inspection
IPC/JEDEC J-STD-020 is the standard approach in determining a ► 2nd acoustical microscope
package’s moisture sensitivity level. The reflow temperatures are
dependent on package thickness, volume and whether Pb-free or
SnPb solder is used.
https://orslabs.com/services/environmental-testing/msl-testing/
RAGHAVENDRA
ANJANAPPA
PRECONDITIONING
Preconditioning is performed to assess the reliability of the package during board assembly and recreate the conditions on the
production floor, wherein the packages might be exposed to the open environment, away from their protective dry-pack bags
or dry boxes, and could absorb moisture. It is not meant to be stand-alone test. From JESD22-A113F, preconditioning should be
done prior to and in addition to other reliability tests.
Preconditioning Test Method for Nonhermetic Solid-state Surface Mount Devices
1. Initial Electrical Test
2. Visual Inspection
3. Temperature Cycling
4. Bake out
5. Moisture soak
6. Reflow
7. Flux Application
8. Cleaning
9. Drying
10. Final Electrical Test
https://www.caplinq.com/semiconductors/reliability/preconditioning/#:~:text=Preconditioning%20is%20performed%20to%20assess,boxes%2C%2
0and%20could%20absorb%20moisture.
RAGHAVENDRA
ANJANAPPA
HIGHLY ACCELERATED STRESS TEST (HAST)
The Highly Accelerated Stress Test (HAST) combines high temperature,
high humidity, high pressure and time to measure component reliability
with or without electrical bias. In a controlled manner, HAST testing
accelerates the stresses of the more traditional tests. It essentially
functions as a corrosion failure test. Corrosion type failures are accelerated,
uncovering flaws such as in packaging seals, materials and joints over a
shorter period of time.
Typical HAST test conditions consist of 110 or 130°C
Biased Highly Accelerated Stress Tests (BHAST) utilize the same variables temperature, and 85%RH humidity and a test run
time of 96 hours. Once the highly accelerated stress
(high pressure, high temperature and time) as HAST Tests, but add a
test is completed, tested samples are returned to the
voltage bias. The goal of BHAST testing is to accelerate corrosion within the customer in moisture-proof bags with time-to-test
device, thereby speeding up the test period. labels. HAST testing generally follows JEDEC spec
JESD22 A110, “Highly Accelerated Temperature and
As an accelerated version of the traditional non-condensing THB Humidity Stress Test (HAST).”
(temperature humidity bias) test, the HAST test has the advantage of
SPECIFICATIONS
adding high pressure and higher temperatures (up to 149°C) to accelerate
► JESD22-A118 (unbiased)
temperature and moisture induced failures in roughly one-tenth the time
► JESD22-A110 (biased)
of THB. HAST and BHAST testing is usually run at 130°C/85%RH, but the
conditions can also vary.
https://orslabs.com/services/environmental-testing/accelerated-stress-test/
RAGHAVENDRA
ANJANAPPA
TEMPERATURE CYCLE (T/C)
During the temperature cycling test (TCT), semiconductor packages are exposed to extremely low and extremely high
temperatures commonly for 1000 cycles. Therefore, TCT measures the ability of semiconductor packages to withstand
mechanical failure due to cyclic exposure to thermal effects.
TCT is performed in a chamber wherein the semiconductor package is held at high and low temperatures. Typically, the
sample is held at one extreme temperature setting after stabilization for a certain period of time, which is commonly referred
to as the soak time. After the intended soak time, the sample is transitioned to the other temperature setting. The number of
test cycles and soak time are often varied to trigger different failure mechanisms in the packages or parts being evaluated.
Source: JESD22-A104C Standard for Temperature Cycling
https://www.caplinq.com/semiconductors/reliability/common-reliability-
tests/#:~:text=During%20the%20temperature%20cycling%20test,cyclic%20exposure%20to%20thermal%20effects.
RAGHAVENDRA
ANJANAPPA HIGH TEMPERATURE STORAGE - HTS
The High-Temperature Storage (HTS) test is performed to determine the effect on
devices of long-term storage at elevated temperatures without any electrical stresses
applied. HTS is similar to Stabilization Bake (Mil-Std-883 Method 1008), except that
HTS is done over a much longer period of time (1000 hours vs. 24 hours for Stab Bake
at 150 deg C). The purpose of HTS is to assess the long-term reliability of devices under
high temperature conditions while that of Stabilization bake is merely to serve as part
of a screening sequence or as a preconditioning treatment prior to the conduct of
other tests.
Example of a Bake Chamber/Oven that can be
used for High Temperature Storage
Both HTS and stab bake consist of storing the parts at the specified ambient
temperature for a specified amount of time. The devices must be allowed to reach the Summary of industry-standard
specified temperature before the duration starts counting. End-point measurements HTS conditions: 1000 hours at 150 deg C.
must be conducted within 96 hours after the specified test conditions are removed.
Mil Std 883, Method 1008, Stabilization Bake Specs :
For HTS, end-point measurements include external visual inspection and electrical
testing. - storage at a high temperature for a specified duration
- Test Condition A : 75 deg C / 24 hours minimum
HTS is not a substitute for burn-in because it does not subject its samples to electrical - Test Condition B : 125 deg C / 24 hours minimum
stresses. Nonetheless, HTS is effective for the reliability testing of samples in terms of - Test Condition C : 150 deg C / 24 hours minimum
mechanisms accelerated by temperature only, e.g., oxidation, bond and lead finish - Test Condition D : 200 deg C / 24 hours minimum
- Test Condition E : 250 deg C / 24 hours minimum
intermetallic growths, etc. Any oven or chamber capable of providing controlled
- Test Condition F : 300 deg C / 24 hours minimum
elevated temperature may be used for HTS (see example in Fig). - Test Condition G : 350 deg C / 24 hours minimum
- Test Condition H : 400 deg C / 24 hours minimum
https://www.eesemi.com/HTS.htm
RAGHAVENDRA
ANJANAPPA TEMPERATURE STORAGE TESTING
Temperature storage testing determines the effect of time and
temperature on thermally activated failure mechanisms of solid state
electronic devices — including non-volatile memory devices. The
temperature storage test is intended to determine failure rates in
storage conditions only. Samples are typically subjected to a
specified temperature for an extended period of time as required by
a particular test standard or by potential end users. For extended
test durations, samples are often removed from the chamber for
interim electrical testing and inspection.
High Temperature Storage Test
TEST SPECIFICATIONS/STANDARDS
► AEC-Q100, AEC-Q200
The high temperature storage test is an accelerated, elevated
► GR-468-CORE (3.3.2.1) temperature test that thermally stresses samples without
► JESD22-A103 Cond A-G electrical bias. Test standards include, but are not limited to,
► MIL-STD-202 Method 108 JESD22-A103, AEC-Q100, AEC-Q200, and MIL-STD 202, MIL-STD
► MIL-STD-750 Method 1031 750 and MIL-STD 883. Oneida Research Services conducts this
► MIL-STD-883 Method 1008 testing from ambient temperatures up to +300°C. Unless
otherwise specified, this test is performed in an inert (N2)
ambient condition.
https://orslabs.com/services/environmental-testing/temperature-storage/
RAGHAVENDRA
ANJANAPPA CYCLE TEMPERATURE HUMIDITY
Cyclic Temperature Humidity (CTH) testing for semiconductors
is a critical reliability assessment technique used to evaluate
how semiconductor devices perform under varying
temperature and humidity conditions. Here’s an overview of its
key aspects:
Environmental Stress Evaluation: Simulates real-world
conditions that devices may encounter in different
environments, particularly in humid climates.
Failure Mode Analysis: Identifies potential failure mechanisms
such as corrosion, moisture ingress, and delamination of
packaging materials
Reliability Assurance: Ensures that semiconductor devices can
operate reliably throughout their intended lifespan.
RAGHAVENDRA
ANJANAPPA SOLDER BALL INTEGRITY
Solder ball integrity in a package can be assessed by
performing a solder ball test or a package assembly
integrity test:
Failure Mode
Solder ball test
This test is performed on BGA/WLCSP packaged ICs
before shipment to check the solderability of the
solder balls. It can assess BGA wetting quality and
quickly identify defective devices.
Package assembly integrity test
This test is a key part of verifying the reliability of
automotive electronics. It covers solder ball shear,
wire bond shear, wire bond pull, solderability,
physical dimensions, and lead integrity
https://www.istgroup.com/en/service/solder-ball-test/
SPECIFICATIONS
► MIL-STD
► IPC J-STD-002
RAGHAVENDRA
ANJANAPPA SOLDERABILITY TESTING
Solderability testing provides a means of determining the solderability of device package
terminations that are intended to be joined to another surface using SnPb or Pb-free solder.
The procedure, considered to be destructive, tests whether the packaging materials and
processes used during manufacturing operations produce a component that can be
successfully soldered in the next level assembly.
There are two methods of testing device solderability:
Method 1 is known as ‘dip and look,’ which is for leaded and leadless terminations. It
includes preconditioning if needed, the application of flux and the immersion of the
terminations into molten solder.
Method 2 is a Surface Mount Simulation test.
SPECIFICATIONS
► J-STD-002
► MIL-STD-750 Method 2026
► MIL-STD-883 Method 2003
► AEC-Q100
► AEC-Q101 https://orslabs.com/services/mechanical-testing/solderability-testing/
RAGHAVENDRA
ANJANAPPA SHADOW MOIRÉ (THERMAL WARPAGE)
An optical noncontact method to measure warpage using a moiré fringe pattern resulting
from the geometric interference between a flat reference grating and the projected shadow
of the grating on a warped test object.
SPECIFICATIONS
► JESD22-B112, 5/05
► IPC/JEDEC J-STD-020D
► MIL-STD-883G
Shadow Moiré Measurement System
https://lomss.umd.edu/facilities/shadow-moire-measurement-system/
