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COA Tutorial 2

Tutorial 3

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24 views5 pages

COA Tutorial 2

Tutorial 3

Uploaded by

sarthaklakade2024
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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COSP Tutorial 2

1. Which of the architecture is power efficient?

a) RISC b) ISA c) IANA d) CISC


2. In CISC architecture most of the complex instructions are stored in _____
a) CMOS b) Register c) Transistors d) Diodes

3. The main virtue for using single Bus structure is ____________

a) Fast data transfers b) Cost effective connectivity and speed

c) Cost effective connectivity and ease of attaching peripheral devices

d) None of the mentioned

4. ______ are used to overcome the difference in data transfer speeds of


various devices.

a) Speed enhancing circuitry b) Bridge circuits c) Multiple Buses

d) Buffer registers
5. To extend the connectivity of the processor bus we use ________
a) PCI bus b) SCSI bus c) Controllers d) Multiple bus
6. In the case of, Zero-address instruction method the operands are stored in
_____
a) Registers b) Accumulators c) Push down stack d) Cache
7. The instruction, Add #45,R1 ,example of which addressing mode?
a. Immediate addressing mode
b. Indirect addressing mode
c. Implied addressing mode
d. Displacement addressing mode
8. The addressing mode which makes use of in-direction pointers is ______
a) Indirect addressing mode b) Index addressing mode
c) Relative addressing mode d) Offset addressing mode
COSP Tutorial 2
9. In the following indexed addressing mode instruction, MOV 5(R1), LOC
the effective address is ______
a) EA = 5+R1 b) EA = R1 c) EA = [R1] d) EA = 5+[R1]

10. When we use auto increment or auto decrements, which of the following is/are
true?
1) In both, the address is used to retrieve the operand and then the address gets
altered
2) In auto increment, the operand is retrieved first and then the address altered
3) Both of them can be used on general purpose registers as well as memory
locations
a) 1, 2, 3 b) 2 c) 1, 3 d) 2, 3

11. The addressing mode, where you directly specify the operand value is
_______

a) Immediate b) Direct c) Definite d) Relative

12. Carry, Overflow, negative, zero results are also called ___.
a) Flag bits b) Conditional bits c) Status bits d) None of the above

13. Which of them is a CPU register.


a. PC b. MAR c. MDR d. All of the above

14. __ is a special purpose register designated to hold the result of an operation


performed by the ALU.
a. PC b. IR c. MDR d. ACC

15. Which of the operation is not performed by the CPU.

a. Fetch instruction b. Interpret instruction c. Fetch data d. Input data


COSP Tutorial 2

16. The processing required for a single instruction is called ___.


a. Fetch cycle b. Execution cycle c. Instruction cycle d. Branch cycle

17. The fetched instruction is stored in the CPU register known as.
a. IRC Instruction register b. PC Program counter c. MARC Memory address
Register d. MDRC memory Data Register

18. The communication between the components in a microcomputer takes place


via the address and

(A) I/O bus (B) Data bus (C) Address bus (D) Control lines

19. The operation executed on data stored in registers is called

(A) Macro-operation (B) Micro-operation (C) Bit-operation (D) Byte-


operation

20. If the value V(x) of the target operand is contained in the address field itself,
the addressing mode is

(A) Immediate (B) Direct (C) Indirect (D) Implied

Descriptive Questions

21. Explain CPU performance?

22. Program A runs in 10 seconds on a machine with a 100 MHz clock.


How many clock cycles does program A require?
COSP Tutorial 2
23. Our favorite program runs in 10 seconds on computer A, which has a400
Mhz. clock. We are trying to help a computer designer build a new
(faster) machine B. The designer can use new technology to
substantially increase the clock rate, but has informed us that this
increase will affect the rest of the CPU design, causing machine B to
require 1.2 times as many clock cycles as machine A for the same
program. What clock rate is therefore necessary for machine B, if we
want it to be able to run our “favorite program” in just6 seconds?

24. We wish to compare the performance of two different computers: M1and


M2. The following measurements have been made on these computers:

Time on M1 Time on M2

Program 12.0 seconds 1.5 seconds

Instruction executed on M1 Instruction executed on M2

5 x 109 6 x 109

25. Program A runs in 0.34 seconds on a 500 Mhz machine. You know that
this program requires 100 million instructions of which:

–10% are multiplication . instructions that take an unknown number of


cycle
–60% are other arithmetic instructions taking 1 cycle
–30% are memory instructions taking 2 cycles
How many cycles does a multiplication take on this machine?

26. Explain term Data path in CPU working with proper diagram.
27. With a neat schematic, Explain about DMA controller
28. What are the different mode of data transfer explain programmed I/O,
interrupt I/O.
29. Write about hierarchy of buses, bus signals and its functionalities.
COSP Tutorial 2
30. Imagine you are storing a video game in your computer and you want to play it now.
With this assumption answer the following questions
a. In which type of memory reserved bootable information resides and why?
b. Which memory component contains your video game and why?
c. Once you click on the video game, where will it be loaded and why?
31. Mostly Hard disk is preferred as secondary storage device rather than SRAM. Justify
it

32. Discuss the Memory Hierarchy in computer system with regard to Speed, Size and
Cost?

33. What is Locality of Reference and explain about Cache memory in detail.
34.

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