Research Paper Proceedings of the
ISC High Performance 2024
Hamburg, Germany, May 12 - 16, 2024
The 39th International Conference, ISC High Performance 2024 Research Paper Proceedings
will be made Open Access under the terms of the Creative Commons Attribution License
([Link] which permits use, distribution and reproduction
in any medium, provided that the Contribution is properly cited.
ISBN: 978-3-9826336-0-2
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Proceedings of ISC-High Performance 2024
Reinventing HPC. This is the tagline of this year’s ISC-High Performance Conference,
formerly known as the International Supercomputing Conference, that took place in Hamburg,
Germany, during the week of May 12 - 16, 2024. ISC-High Performance is ready to take
on the challenge and deliver transformative and inclusive solutions, presenting cutting-edge
technology, redefining HPC research, and reaching out to the broader communities with the
first-of-its-kind open-access effort to technical papers. This volume contains the accepted tech-
nical papers and captures the best current research in all HPC aspects. ISC-High Performance
was founded in 1986 as the Supercomputer Seminar. Organized initially by Dr. Hans Meuer,
Professor of Computer Science at the University of Mannheim and former director of its com-
puter center, the conference has witnessed a steady increase in the number of submissions of
high-quality research papers submitted to the conference and corresponding growth in the num-
ber of conference attendees. The proceedings complement the high-quality material presented
at the conference this year, including posters, tutorials, panels, birds-of-a-feather, workshops,
topics sessions, and a cutting-edge exhibition showcasing industry, research laboratories, and
universities.
Transitioning Towards Open Access. The ISC-High Performance Conference is dedic-
ated to promoting open science. In alignment with this commitment, ISC-High Performance
has taken a pioneering step for 2024: the accepted papers in these proceedings will be made
fully open access in the IEEE Xplore Digital Library. This marks the beginning of a signi-
ficant transformation in HPC that pragmatically fosters inclusion. Going forward, ISC-High
Performance technical papers will be permanently accessible to everyone through the IEEE
Xplore Digital Library, without the need for an IEEE subscription or membership. ISC-High
Performance’s goal is to ensure wider access to HPC research for the entire community, in-
cluding those who cannot attend the conference due to geographical limitations, lack access to
digital libraries because of socioeconomic reasons, or work in various fields that could benefit
from HPC research.
A Strong Technical Program. The ISC-High Performance Conference 2024 issued its call
for submissions in the fall of 2023, inviting researchers and developers from around the world
to submit their latest findings for review by the Program Committee. In total, 80 papers were
received from authors globally. The Research Papers Program Committee consisted of 95 mem-
bers from 18 different countries. Following the review phase, a comprehensive rebuttal process
was initiated, allowing authors to respond to the reviewers’ inquiries and address any concerns.
Subsequently, a virtual meeting of the Program Committee was convened to evaluate the pa-
pers and reach a consensus. Through a rigorous selection process, the committee ultimately
identified 24 papers of exceptional quality for publication.
Celebrating Excellence. Over the past several years, the ISC-High Performance Confer-
ence has been recognizing outstanding research in high-performance computing (HPC) through
the awarding of the best research paper accepted for publication at the conference. This award
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honors the late Dr. Hans Meuer, the general chair of the ISC-HPC conference from 1986
to 2014, and a co-founder of the TOP500 project. This year, among the accepted research
papers, the Research Papers Program Committee selected the winning paper based on its tech-
nical merit, innovation, and potential impact on the HPC community. In a live ceremony, the
Hans Meuer Award was presented for the paper titled Evaluation of the Classical Hardware
Requirements for Large-Scale Quantum Computations by Daan Camps, Ermal Rrapaj, Kather-
ine Klymko, Brian Austin, and Nick Wright, all affiliated with the Lawrence Berkeley National
Laboratory’s National Energy Research Scientific Computing Center (NERSC) at the Berkeley
Laboratory. This paper proposes a new model to evaluate the classical computing and net-
working resources required to support a large-scale, fault-tolerant quantum computer based on
superconducting qubits and a surface code architecture. The team focused on quantum error
decoding, which is the primary classical computational task required to enable fault tolerance
during runtime. The paper analysis shows that error correction can be enabled for a quantum
computer with 2,000 logical qubits with approximately one petaflop of computational power,
although integrating classical HPC resources with quantum computers operating at cryogenic
temperatures remains a challenge.
Grateful for the Support of Many. We extend our heartfelt gratitude to the HPC com-
munity for their contributions of papers to the ISC-High Performance Conference. We also
express our profound thanks to the track chairs, the members of the Best Paper Committee, and
the Research Papers Committee members for their diligent reviews and invaluable assistance,
which were crucial in guiding us to the final decisions on manuscript acceptance. Addition-
ally, we want to acknowledge all the conference attendees and the readers of these proceedings.
We hope the collected papers will offer valuable insights and contribute significantly to the
ISC-High Performance mission of reinventing HPC.
May 2024 Michela Taufer
Torsten Hoefler
Jeff Hammond
Amanda Randles
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Organization
Program Chair
Michela Taufer The University of Tennessee, USA
Program Deputy Chair
Torsten Hoefler ETH Zurich, Microsoft, Switzerland
Research Papers Program Committee
Research Papers Chair
Jeff Hammond NVIDIA, Finland
Program Deputy Chair
Amanda Randles Duke University, USA
Algorithms, Methods & Tuning
Hatem Ltaief (Chair) KAUST, Saudi Arabia
Ahmad Abdelfattah University of Tennessee, USA
Sameh Abdulah KAUST, Saudi Arabia
Qinglei Cao Saint Louis University, USA
Kate Clark NVIDIA, USA
Aimad Er-Raiy Airbus, France
Aniello Esposito HPE, Switzerland
Huda Ibeid Intel, USA
Mathias Jacquelin Cerebras Systems, USA
Kamer Kaya SabancıUniversity, Turkey
Xinhua Lin Shanghai Jiao Tong University, China
Lena Oden Fernuniversität in Hagen, Forschungszentrum Jülich GMBH,
Germany
Jesmin Jahan Tithi Intel, USA
Miwako Tsuji RIKEN, AHUG, Japan
Ichitaro Yamazaki Sandia National Laboratories, USA
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Applications & Use Cases
Bronson Messer (Chair) Oak Ridge National Laboratory, USA
Reuben Budiardja, Oak Ridge National Laboratory, USA
Anshu Dubey Argonne National Laboratory, University of Chicago, USA
Ian Karlin NVIDIA, USA
Christopher Knight Argonne National Laboratory, USA
Nicholas Malaya AMD, USA
Bronson Messer Oak Ridge National Laboratory, USA
Ramesh Pankajakshan Lawrence Livermore National Lab, USA
Scott Parker Argonne Leadership Computing Facility, USA
Markus Rampp Max Planck Computing & Data Facility, Germany
Tjerk Straatsma Oak Ridge National Laboratory, USA
Machine Learning & AI
Sofia Vallecorsa (Chair) CERN, Switzerland
Vishakha Agrawal SiFive, USA
Maxwell Cai Intel, Leiden University, Netherlands
Renato Cardoso CERN, Switzerland
Adel Chaibi Intel, France
Nadya Chernyavskaya Predictive Layer, Switzerland
Nikoli Dryden Lawrence Livermore National Laboratory, USA
Pratik Jawahar University of Manchester, France
Vladimir Loncar MIT, USA
Lukasz Miroslaw Microsoft, Switzerland
Diana Moise Cray, HPE, Switzerland
Bogdan Nicolae Argonne National Laboratory, USA
David Ojika University of Florida, USA
Piyush Raikwar CERN, Switzerland
Vikram A. Saletore Intel Corporation, USA
Amarjit Singh RIKEN, Japan
Mudhakar Srivatsa IBM, USA
Kyongmin Yeo IBM, USA
Programming Environments & System Software
Tom Deakin (Chair) University of Bristol, United Kingdom
Sunita Chandrasekaran University of Delaware, USA
Biagio Cosenza University of Salerno, Italy
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Johannes Doerfert Lawrence Livermore National Laboratory, USA
Yehia Elkhatib University of Glasgow, United Kingdom
Bilel Hadri KAUST Supercomputing Laboratory, Saudi Arabia
Georg Hager University of Erlangen-Nuremberg, Erlangen Regional Comput-
ing Center, Germany
Guido Juckeland Helmholtz-Zentrum Dresden-Rossendorf (HZDR), Germany
Pekka Jääskeläinen Tampere University, Intel Finland Oy, Finland
Pouya Kousha The Ohio State University, USA
John Linford NVIDIA, USA
Glenn Lockwood Microsoft Corporation, USA
James Richings Edinburgh Parallel Computing Centre (EPCC), United Kingdom
Roxana Rusitoru Arm, United Kingdom
Sameer Shende University of Oregon; ParaTools, Inc., USA
Osman Seckin Simsek University of Basel, Switzerland
Quantum Computing
Stefan Knecht (Chair) Algorithmiq, Germany
Ayush Asthana University of North Dakota, USA
Werner Dobrautz Chalmers University of Technology, Sweden
Luigi Iapichino Leibniz Supercomputing Centre, Germany
Jeanette Lorenz Fraunhofer Institute for Cognitive Systems IKS, LMU Munich,
Germany
Stefano Mensa The Hartree Centre, STFC, United Kingdom
Stephan P. A. Sauer University of Copenhagen, Denmark
Francesco Tacchino IBM Research Zürich, Switzerland
Phillip Wagner Kastberg University of Copenhagen, Denmark
Jensen
System Architecture & Hardware Components
Samantika Sury (Chair) Samsung Semiconductor Inc., USA
Eric Borch Samsung Semiconductor Inc., USA
Aditya Deshpande Samsung Semiconductor Inc., USA
David D. Donofrio Tactical Computing Laboratories, USA
Jayesh Iyer Esperanto Technologies, USA
Nikhil Jain NVIDIA, USA
Kalyan Kumaran Argonne National Laboratory, USA
Divya Prasad AMD, USA
Roxana Rusitoru Arm, United Kingdom
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Jaehoon Yu Samsung Advanced Institute of Technology, South Korea
Proceedings
Proceedings Chair
Carola Kruse CERFACS, France
Proceedings Deputy Chair
Tobias Weinzierl Durham University, United Kingdom
