Application Note: SA22115

High Efficiency, 15A Synchronous Boost Regulator

General Description Features

The SA22115 develops a high efficiency, high power  Wide Input Range:
density synchronous Boost regulator. The device  2.7V to 16V Start-up Voltage
operates over a wide input voltage range from 1.2V to  1.2V to 16V Operation Voltage
16V with 15A switch current capability. The SA22115  400kHz Pseudo-constant Frequency
adopts adaptive constant off time peak current control.  True Shutdown Function
The switching frequency is 400kHz.  Low RDS(ON) Internal Switch
 Main FET: 10mΩ
The SA22115 has low shutdown current to extend the  Rectifier FET: 20mΩ
battery life time. Other features include programmable  Disconnect FET: 30 mΩ
peak current limitation, programmable soft-start, output  External Loop Compensation
over voltage protection etc.  Programmable Peak Current Limit Threshold
 Battery Voltage Monitoring
The SA22115 is available in compact QFN3x4-15  Programmable Soft-Start Limits the Inrush Current
package.  Input Voltage UVLO
 Over Temperature Protection
 Output Over Voltage Protection
Ordering Information  RoHS Compliant and Halogen Free
 Compact Package: QFN3x4-15
SA22115 □(□□□ )  Automotive AEC- Q100 Grade 1 Certified
Package Code
Optional Spec Code Applications
Ordering Number Package type Note
SA22115VPA QFN3x4-15 ----  Backup Battery
 Automotive Boost

Typical Applications
CBS CBD

L BS BD
VIN VOUT
LX OUT
CIN R1 COUT
SVIN
FB
ON/OFF EN R2

BAT FGND

COMP SS
RZ ILIM CSS
VCC
CZ CVCC PGND SGND
RILMT

Figure 1. Schematic Diagram

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 SA22115
Pinout (top view)

COMP

SGND
FGND

SVIN
BAT
VCC
ILIM

SS

EN
9 8 7 6 5 4 3 2 1

FB 10 15 BS

11 12 13 14

OUT BDPGND LX
(QFN3x4-15)
Top mark: CUUxyz for SA22115VPA (Device code: CUU, x=year code, y=week code, z= lot number code)

Pin Name Pin Number Pin Description

SVIN 1 IC power supply pin. Decouple this pin to the SGND pin with a 1μF ceramic capacitor.
SGND 2 Signal ground pin
Enable control. Pull this pin high to enable the IC, pull this pin low to disable the IC.
EN 3
Do not leave it floating.
Battery voltage monitor input pin. The Boost regulator is in active mode when the
BAT 4 voltage on this pin is lower than BAT falling threshold. The Boost regulator is in
standby mode when the voltage on this pin is higher than BAT rising threshold.
Internal 3.3V LDO output. Decouple this pin to SGND with a 1µF ceramic capacitor.
VCC 5
VCC is powered by the higher voltage of either SVIN or BD.
COMP voltage soft-start programming pin. Connect a capacitor from this pin to SGND
SS 6
to program the soft-start time. tSS(ms)=CSS(nF)1V/6μA
Peak current limit program pin. Connect a resistor RILIM from this pin to SGND to
ILIM 7 program peak current limitation threshold.
ILIM(A)=1200/ RILIM(kΩ)
Loop compensation pin. Connect a RC network across this pin and ground to stabilize
COMP 8
the control loop.
Feedback ground pin. This pin integrates a N-FET to SGND. The N-FET is turn off
FGND 9
when the IC is disable.
Feedback pin. Connect to the center of resistor voltage divider to program the output
FB 10
voltage: VOUT=1V×(R1/R2+1)
OUT 11 The output of disconnect FET
The output of the Boost regulator and the input of disconnect FET. Bypass at least a
BD 12
10µF ceramic capacitor to PGND.
LX 13 Inductor node. Connect an inductor from power input to the LX pin.
PGND 14 Power ground pin
Boot-strap pin. Supply Rectified FET’s gate driver. Connect a 0.1μF ceramic capacitor
BS 15
between the BS pin and the LX pin.

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 SA22115
Block Diagram
VIN L CBS

CBD
CIN LX BS BD
Disconnect FET
OUT VOUT
SVIN SVIN BD
Rectifier FET COUT
LDO
VCC
Charge CVCC
Pump
Main FET VCC SS
R1

Current Sense
CSS
1V
FB
PWM Control
ILIM & COMP
Protection Logic
RILMT RZ R2
1V CZ
SS
Thermal FGND
Sense

EN
1V

BAT

VBAT Monitoring

PGND SGND

Figure 2. Block Diagram

Absolute Maximum Ratings (Note 1)

SVIN, OUT, EN, BAT, FB, FGND, BD -------------------------------------------------------------------------- -0.3V to 28V
LX -------------------------------------------------------------------------------------------------------------------- -0.3V to 18V
VCC, COMP, ILIM, SS ----------------------------------------------------------------------------------------------- -0.3V to 4V
BS-LX ------------------------------------------------------------------------------------------------------------------- -0.3V to 4V
Power Dissipation, PD @ TA = 25°C QFN3x4-15----------------------------------------------------------------------3.1W
Package Thermal Resistance (Note 2)
θ JA ---------------------------------------------------------------------------------- ------------------------------ 32°C/W
θ JC -----------------------------------------------------------------------------------------------------------------14°C/W
Junction Temperature Range ------------------------------------------------------------------------------------ -40°C to 150°C
Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------------ 260°C
Storage Temperature Range ------------------------------------------------------------------------------------- -65°C to 150°C

Recommended Operating Conditions (Note 3)

Start-up Input Voltage----------------------------------------------------------------------------------------------- 2.7V to 16V
Operating Input Voltage--------------------------------------------------------------------------------------------- 1.2V to 16V
Junction Temperature Range ------------------------------------------------------------------------------------ -40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------ -40°C to 125°C

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 SA22115
Electrical Characteristics
(VIN =3.3V, VOUT=12V, TJ = -40°C to 125°C. Typical values are at TJ=25°C, unless otherwise specified. The values
are guaranteed by test, design or statistical correlation.)
Parameter Symbol Test Conditions Min Typ Max Unit
Operating Input Voltage VIN 1.2 16 V
2.7 V
Start-up Input Voltage VSVIN
VBD≥4V 1.2 V
FB=1.1V, SVIN=EN=3V, VOUT=12V,
IQ,IN 5 µA
no switching, measured on VIN
Quiescent Current
FB=1.1V, SVIN=EN=3V, VOUT=12V,
IQ,OUT 300 380 µA
no switching, measured on VOUT
Shutdown Current ISHDN EN=0, TJ = -40℃ to 125℃ 2.2 10 µA
Standby Current ISTBY EN=1, BAT=3V 25 µA
EN=0, SVIN=3.3V,
OUT Pin Leakage Current IOUT,LK 2.2 7 µA
VOUT=12V, TJ = -40℃ to 125℃
VCC UVLO Rising
VVCC,UVLO 2.2 2.4 2.6 V
Threshold
VCC UVLO Hysteresis VVCC,HYS 0.2 V
Main N-FET RON RDS(ON),M 10 mΩ
Rectifier N-FET RON RDS(ON),R 20 mΩ
Disconnect N-FET RON RDS(ON),D 30 mΩ
FGND N-FET RON RDS(ON),F 10 Ω
Feedback Reference TJ =25°C. 0.99 1 1.01 V
VREF
Voltage TJ = -40°C to 125°C 0.985 1 1.015 V
FB Input Current IFB VFB=3V -50 50 nA
VOUT,OVP 15.5 17 18 V
Output Voltage OVP
VFB,OVP 1.15 V
Main N-FET Current Limit
ILMT,RNG 3 15 A
Program Range
Current Limit Setting
ILMT RILMT=120kΩ 8 10 12 A
Accuracy
Peak Current Limit
VILIM 1 V
Reference Voltage
Output Current Limit ILMT,OUT VOUT>VIN 3 3.3 A
Linear Current Limit ICHARGE VO<VIN 1.5 A
Error Amplifier Trans-
GM 120 μA
conductance
Current Sense Gain RI 75 mΩ
EN Input Voltage High VEN,H 0.9 V
EN Input Voltage Low VEN,L 0.4 V
EN ON to LX switching, CVCC=1µF
EN Turn-on Delay td 100 250 µs
TJ = -40°C to 125°C
BAT Rising Threshold VBAT,R 1.1 1.2 1.3 V
BAT Falling Threshold VBAT,F 0.9 1 1.1 V
Switching Frequency fSW 320 400 480 kHz
Soft-start Charging
ISS 3 6 9 µA
Current
Minimum ON Time tON,MIN 100 ns
Minimum OFF Time tOFF,MIN 80 ns
Maximum ON Time tON,MAX 3.6 4.8 6 µs
Thermal Shutdown
TSD 150 °C
Temperature

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 SA22115
Thermal Shutdown
THYS 15 °C
Hysteresis

Note 1: Stresses beyond the “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specification is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.

Note 2: θJA is measured in the natural convection at TA = 25°C on a four-layer Silergy Evaluation Board.

Note 3: The device is not guaranteed to function outside its operating conditions.

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Typical Performance Characteristics
Efficiency vs. Load Current Load Transient
(L=1μH/PCMB104T-1R0MT) (VIN =3.3V, VOUT=8V, IO=1 ~ 2A)
100

90

VOUT(AC) 500mV/div
Efficiency (%)

80

70

VIN=1.8V, VOUT=8.0V IOUT 5A/div

60
VIN=3.3V, VOUT=8.0V
VIN=4.0V, VOUT=8.0V
50

40
0.001 0.01 0.1 1 3
Time (400μs/div)
Load Current (A)

Output Ripple Output Ripple

(VIN=3.3V, VOUT=8V, IO=0A) (VIN =3.3V, VOUT=8V, IO=2A)

VOUT(AC) 100mV/div
VOUT(AC) 10mV/div

VLX 5V/div

VLX 5V/div

IL 2A/div
IL 5A/div

Time (400µs/div) Time (4μs/div)

Startup from VIN Shutdown from VIN

(VIN=3.3V, VOUT=8V, IO=0A) (VIN =3.3V, VOUT=8V, IO=0A)

VOUT 5V/div
VOUT 5V/div

VIN 2V/div VIN 2V/div

VLX 5V/div VLX 5V/div

IL 5A/div IL 5A/div

Time (20ms/div) Time (20ms/div)

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 SA22115
Startup from VIN Shutdown from VIN
(VIN=3.3V, VOUT=8V, IO=2A) (VIN =3.3V, VOUT=8V, IO=2A)

VOUT 5V/div
VOUT 5V/div

VIN 2V/div VIN 2V/div

VLX 5V/div VLX 5V/div

IL 5A/div IL 5A/div

Time (20ms/div) Time (20ms/div)

Startup from Enable Shutdown from Enable

(VIN=3.3V, VOUT=8V, IO=0A) (VIN =3.3V, VOUT=8V, IO=0A)

VOUT 5V/div
VOUT 5V/div

EN 5V/div
EN 2V/div

VLX 5V/div VLX 5V/div

IL 5A/div IL 5A/div

Time (20ms/div) Time (20ms/div)

Startup from Enable Shutdown from Enable

(VIN=3.3V, VOUT=8V, IO=2A) (VIN =3.3V, VOUT=8V, IO=2A)

VOUT 5V/div VOUT 5V/div

EN 5V/div
EN 2V/div

VLX 5V/div VLX 5V/div

IL 5A/div IL 5A/div

Time (20ms/div) Time (800µs/div)

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 SA22115

Short Circuit Protection Short Circuit Protection

(VIN=3.3V, VOUT=8V, IO=0A) (VIN=3.3V, VOUT=8V, IO=2A)

VOUT 5V/div VOUT 5V/div

VLX 5V/div VLX 5V/div

IL 5A/div IL 5A/div

Time (20ms/div) Time (20ms/div)

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 SA22115
Boost Output Capacitor CBD and Disconnection
Applications Information FET Output Capacitor COUT
The Boost Output capacitor CBD and disconnection
The SA22115 develops a high efficiency FET Output capacitor COUT are selected to handle the
synchronous Boost regulator with programmable output ripple noise requirements. Both steady state
peak current limit. The device adopts adaptive ripple and transient requirements must be taken into
constant off time and current mode control. The account when selecting these capacitors. For the best
integrated low RDS(ON) switches minimize the performance, it is recommended to use X5R or better
conduction loss. grade ceramic capacitor with 25V rating and more
than 44µF capacitors.
The SA22115 features cycle-by-cycle peak current limit,
output short circuit protection and true shutdown. Low
Boost Inductor L
output voltage ripple and small external inductor and
There are several considerations in choosing this
capacitor size are achieved with 400kHz pseudo-
inductor.
constant frequency.
1) Choose the inductance to provide the desired
Feedback Resistor divider R1 and R2
ripple current. It is suggested to choose the ripple
Choose R1 and R2 to program the proper output
current to be about 40% of the maximum
voltage. To minimize the power consumption under
average input current. The inductance is
light load, it is desirable to choose large resistance
calculated as:
values for both R1 and R2. A value between 10k and
(VOUT  VIN)
2
1M is recommended for both resistors. If R1=200k is  VIN 
L  (H)
chosen, then R2 can be calculated to be:  VOUT  fSW  IOUT_MAX  40%
R1
R2   
VOUT  1 Where fSW is the switching frequency and IOUT_MAX
VOUT is the maximum load current.

R1 The SA22115 regulator is less sensitive to the ripple

FB current variations. Consequently, the final choice of
inductance can be slightly off the calculation value
R2
without significantly impacting the performance.

2) The saturation current rating of an inductor must

Input Capacitor CIN be selected to guarantee an adequate margin to
The ripple current through input capacitor is the peak inductor current under full load
calculated as: conditions.
VIN  (VOUT  VIN)  VOUT  VIN(VOUT  VIN)
ICIN_RMS  ISAT, MIN     IOUT, MAX 
(A)
2 3  L  fSW  VOUT  VIN  2  fSW  L  VOUT

To minimize the potential noise problem, place a

3) The DCR of the inductor and the core loss at the
typical X5R or better grade ceramic capacitor really
switching frequency must be low enough to
close to the VIN and PGND pin. Care should be
achieve the desired efficiency requirement. It is
taken to minimize the loop area formed by C IN, VIN,
desirable to choose an inductor with
and the PGND pin. In this case a 10μF low ESR
DCR<10mΩ to achieve a good overall efficiency.
ceramic capacitor is recommended.
Enable Operation
The SVIN capacitor must be close to the SVIN and
Pulling the EN pin low (<0.4V) will shut down the
SGND pins to minimize the potential noise problem.
device. During shutdown mode. Driving the EN pin
Care should be taken to minimize the loop area
high (>0.8V) will turn on the IC again.
formed by CIN, and SVIN/SGND pins. In this case a
2.2μF low ESR ceramic is recommended.
Soft-start
The SA22115 provides programmable COMP
voltage soft-start time to limits the inrush current

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 SA22115
during start up. Connect a capacitor across the SS pin
and SGND to lengthen the soft-start time. Over-temperature Protection (OTP)
1(V) The SA22115 includes over-temperature protection
tss(ms)  Css(nF)  (OTP) circuitry to prevent overheating due to
6(µA)
excessive power dissipation. This will shut down
switching operation when the junction temperature
External Bootstrap Capacitor exceeds 150°C. Once the junction temperature cools
This capacitor provides the gate driver voltage for down by approximately 15°C the IC will resume
internal rectifier. A 100nF low ESR ceramic capacitor normal operation after a complete soft-start cycle.
connected between the BS pin and the LX pin is For continuous operation, provide adequate cooling
recommended. so that the junction temperature does not exceed the
BS
OTP threshold.
CBS
100nF
Application for Automotive Backup Battery
LX System
For applications where the system power supply
voltage (VSYS) may change greatly or the BD pin may
be shorted to GND, excessive large current will flow
Peak Current Limit Setting through the body diode of the disconnection
The peak current limit can be programmed with a
MOSFET, and that may cause the IC damage. A
resistor RILIM connecting from the ILIM pin to Schottky diode D2 is recommended to block current
ground: from VSYS to the BD when VSYS changes greatly, and
ILIM(A)=1200/ RILIM(kΩ). Schottky diode D3 can be used for shunting current
through the body diode of disconnection MOSFET
Short-circuit Protection
when the BD is shorted to GND.
The SA22115 integrates hic-cup mode short circuit D1
C BD
protection function. If the device is operated in C BS
Main
current limit continuously and VOUT drops below VIN, Battery L BS BD D3
D2
V IN V O UT
the short-circuit protection mode will be initiated. Backup
C IN
LX OUT
R1
System
Battery S V IN C O UT
The device will shut down for approximately 20ms, O N /O F F EN
FB
R2
and then restart with a complete soft-start cycle that BAT FG N D

is approximately 5ms. If the short circuit condition COMP SS

remains another ‘hiccup’ cycle of shutdown and RZ
VC C ILIM C SS

restart will continue indefinitely. CZ C VCC PG N D SG N D

R ILM T

Output Current Limit

The SA22115 senses the Disconnect FET current, Battery Voltage Monitor Function
this current sense voltage is fed to the negative input The battery voltage monitor function is used for
of the current-limit error amplifier. The current-limit monitoring main battery voltage when SA22115 is
amplifier output clamps VCOMP if the output current used as backup power supply and make the SA22115
signal is higher than the current limit threshold. As a in standby mode when the main battery voltage
result, the output current is limited by the internal overtops a user-set threshold voltage.
COMP signal, and the output voltage decreases.
BD OUT The function can greatly reduce the standby current
form 300μA to 25μA and improve the standby power
supply start up speed.
Disconnect
FET
During normal operation, the Boost regulator is in
Charge
Pump
active mode when the voltage on the BAT pin is
lower than BAT falling threshold(1V). The Boost
Internal
regulator is in standby mode when the voltage on the
COMP BAT pin is higher than BAT rising threshold (1.2V).
1V
Current Limit Error Amplifier
Monitor main battery voltage, can be programmed
with a resistive divider connected to the BAT pin. If

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 SA22115
the Battery voltage monitor function is not used, the response of the system. The system has faster
BAT pin should be connected to GND. Do not leave response at higher crossover frequency.
the BAT pin floating. (1  DMAX )2  VOUT
f RHPZ 
2π  L  IOUT
CBS CBD
Main
Battery BD
L BS
VIN VOUT
Backup
LX OUT 2. Select a Rz value of the R-C series combination
CIN R1 COUT

R3
Battery
ON/OFF
SVIN
FB connected to the COMP pin.
EN R2

BAT FGND VOUT

R4 RZ =
RZ
COMP SS g m  G fc  VREF
ILIM CSS
VCC
CZ CVCC PGND SGND
RILMT
Where gm is the error amplifier trans-conductance,
which is typically 120uS; Gfc is gain of the power
stage at crossover frequency.
Loop Compensation
The SA22115 incorporates constant off time current (1  DMAX )
mode control scheme. The current mode control G fc 
scheme has two feedback loops. The inner loop, 2π  fc  COUT  R i
current loop, does not require any external Where Ri is the current sense gain, which is typically
compensation component. The outer loop, voltage 75mΩ.
loop, is compensated with external components.
3. Select a Cz value of the R-C series combination
In most applications, a Type 2 or Type 2a connected to the COMP pin. The compensation zero
compensation network shown below can be used to decides phase margin at the crossover frequency.
stabilize the voltage loop. The Type 2 is the most Place a compensation zero at or before the dominant
widely used and works fine for power stages lagging pole of RL and CO. RL is the load resistance, which
down to -90˚ and where the boost brought by the equals to VOUT/IOUT.
output capacitor ESR must be canceled. Type 2a is VOUT  COUT
used where the output capacitor ESR effect can be CZ =
IOUT  R Z
neglected.

VOUT
4. A high frequency pole is recommended to
1V
attenuate the high frequency noise. Place this pole to
COMP cancel the ESR zero of COUT
R1 Gm
FB
RZ R  CO
R2 CP
C P = ESR
CZ RZ
Type 2
Layout Design
VOUT
The layout design of the SA22115 regulator is highly
1V simplified. To achieve a higher efficiency and better
COMP noise immunity, the following components should be
R1 Gm
FB placed close to the IC: CSVIN, CBD, COUT, CVCC, L, R1
RZ
and R2.
R2
CZ
Type 2a 1) It is desirable to maximize the PCB copper area
connecting to the PGND pin to achieve a better
Follow the steps below to calculate the value of thermal performance and noise immunity. If the
external components for voltage loop compensation. board space allowed, a designated ground plane
layer is highly recommended.
1. Select the crossover frequency fc of the closed
loop. It is recommending that the crossover 2) CSVIN must be close to the SVIN and the SGND
frequency is chosen to be the minimum value of 1/5 pins. The loop area formed by CSVIN, the SVIN
of right half plane zero (fRHPZ) and 1/10 of switching and the SGND pins must be minimized.
frequency for the tradeoff of stability and transient

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 SA22115
3) CBD must be close to the BD and the PGND pins.
The loop area formed by CBD, BD and the PGND 6) If the system chip interfacing with the EN pin
pins must be minimized. has a high impedance state at shutdown mode
and the SVIN pin is connected directly to a
4) The PCB copper area associated with the LX pin power source such as a Li-Ion battery, it is
must be minimized to improve the noise desirable to add a pull-down 1MΩ resistor across
immunity. the EN and the SGND pins to prevent the noise
from falsely turning on the regulator at shutdown
5) The components R1 and R2 and the trace mode.
connecting to the FB pin must NOT be adjacent
to the LX node on the PCB layout to minimize
the noise coupling to FB pin.

Figure 3. PCB Layout Suggestion

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 SA22115
QFN3x4-15 Package Outline Drawing

Top View Bottom View

Front View Recommended PCB Layout

(only for reference)

Notes: All dimension in millimeter and exclude mold flash & metal burr.

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 SA22115
Taping & Reel Specification
1. Taping orientation for packages

Feeding direction
2. Carrier Tape & Reel specification for packages

Reel
Size

Package Tape width Pocket Reel size Trailer Leader length Qty per
type (mm) pitch(mm) (Inch) length(mm) (mm) reel

QFN3x4 12 8 13" 400 400 5000

3. Others: NA

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 SA22115
Revision History
The revision history provided is for informational purpose only and is believed to be accurate, however, not
warranted. Please make sure that you have the latest revision.
Date Revision Change
Jun. 09, 2023 Revision 0.9 Initial Release.

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 SA22115
IMPORTANT NOTICE
1. Right to make changes. Silergy and its subsidiaries (hereafter Silergy) reserve the right to change any information
published in this document, including but not limited to circuitry, specification and/or product design, manufacturing or
descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the
publication hereof. Buyers should obtain the latest relevant information before placing orders and should verify that such
information is current and complete. All semiconductor products are sold subject to Silergy’s standard terms and conditions of
sale.
2. Applications. Application examples that are described herein for any of these products are for illustrative purposes only.
Silergy makes no representation or warranty that such applications will be suitable for the specified use without further testing or
modification. Buyers are responsible for the design and operation of their applications and products using Silergy products.
Silergy or its subsidiaries assume no liability for any application assistance or designs of customer products. It is customer’s sole
responsibility to determine whether the Silergy product is suitable and fit for the customer’s applications and products planned.
To minimize the risks associated with customer’s products and applications, customer should provide adequate design and
operating safeguards. Customer represents and agrees that it has all the necessary expertise to create and implement safeguards
which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures
that might cause harm and take appropriate remedial actions. Silergy assumes no liability related to any default, damage, costs or
problem in the customer’s applications or products, or the application or use by customer’s third-party buyers. Customer will
fully indemnify Silergy, its subsidiaries, and their representatives against any damages arising out of the use of any Silergy
components in safety-critical applications. It is also buyers’ sole responsibility to warrant and guarantee that any intellectual
property rights of a third party are not infringed upon when integrating Silergy products into any application. Silergy assumes no
responsibility for any said applications or for any use of any circuitry other than circuitry entirely embodied in a Silergy product.
3. Limited warranty and liability. Information furnished by Silergy in this document is believed to be accurate and reliable.
However, Silergy makes no representation or warranty, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such information. In no event shall Silergy be liable for
any indirect, incidental, punitive, special or consequential damages, including but not limited to lost profits, lost savings, business
interruption, costs related to the removal or replacement of any products or rework charges, whether or not such damages are
based on tort or negligence, warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer
might incur for any reason whatsoever, Silergy’ aggregate and cumulative liability towards customer for the products described
herein shall be limited in accordance with the Standard Terms and Conditions of Sale of Silergy.
4. Suitability for use. Customer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory
and safety-related requirements concerning its products, and any use of Silergy components in its applications, notwithstanding
any applications-related information or support that may be provided by Silergy. Silergy products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where
failure or malfunction of an Silergy product can reasonably be expected to result in personal injury, death or severe property or
environmental damage. Silergy assumes no liability for inclusion and/or use of Silergy products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own risk.
5. Terms and conditions of commercial sale. Silergy products are sold subject to the standard terms and conditions of
commercial sale, as published at http://www.silergy.com/stdterms, unless otherwise agreed in a valid written individual
agreement specifically agreed to in writing by an authorized officer of Silergy. In case an individual agreement is concluded only
the terms and conditions of the respective agreement shall apply. Silergy hereby expressly objects to and denies the application
of any customer’s general terms and conditions with regard to the purchase of Silergy products by the customer.
6. No offer to sell or license. Nothing in this document may be interpreted or construed as an offer to sell products that is
open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or
intellectual property rights. Silergy makes no representation or warranty that any license, either express or implied, is granted
under any patent right, copyright, mask work right, or other intellectual property right. Information published by Silergy
regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from Silergy under the patents or other intellectual property of Silergy.
For more information, please visit: www.silergy.com
© 2023 Silergy Corp. All Rights Reserved.

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© 2023 Silergy Corp. All Rights Reserved.

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